git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@16239 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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/*
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ChibiOS - Copyright (C) 2006,2007,2008,2009,2010,2011,2012,2013,2014,
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2015,2016,2017,2018,2019,2020,2021 Giovanni Di Sirio.
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This file is part of ChibiOS.
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ChibiOS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation version 3 of the License.
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ChibiOS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file errcodes.h
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* @brief Errors handling header file.
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*
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* @addtogroup UTILS_ERRCODES
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* @{
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*/
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#ifndef ERRCODES_H
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#define ERRCODES_H
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#include <errno.h>
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/*===========================================================================*/
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/* Module constants. */
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/*===========================================================================*/
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/**
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* @name Error codes
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* @{
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*/
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#define CH_RET_SUCCESS (int)MSG_OK /* Success */
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#define CH_RET_TIMEOUT (int)MSG_TIMEOUT /* Timeout */
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#define CH_RET_INNER_ERROR (int)-3 /* Unexpected condition */
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/** @} */
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/**
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* @name Extra error codes mapped on Posix errors
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* @{
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*/
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#define CH_RET_ENOENT CH_ENCODE_ERROR(ENOENT) /* No such file or directory */
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#define CH_RET_EIO CH_ENCODE_ERROR(EIO) /* I/O error */
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#define CH_RET_EBADF CH_ENCODE_ERROR(EBADF) /* Bad file number */
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#define CH_RET_ENOMEM CH_ENCODE_ERROR(ENOMEM) /* Not enough space */
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#define CH_RET_EACCES CH_ENCODE_ERROR(EACCES) /* Permission denied */
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#define CH_RET_EFAULT CH_ENCODE_ERROR(EACCES) /* Bad address */
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#define CH_RET_EEXIST CH_ENCODE_ERROR(EEXIST) /* File exists */
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#define CH_RET_ENOTDIR CH_ENCODE_ERROR(ENOTDIR) /* Not a directory */
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#define CH_RET_EISDIR CH_ENCODE_ERROR(EISDIR) /* Is a directory */
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#define CH_RET_EINVAL CH_ENCODE_ERROR(EINVAL) /* Invalid argument */
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#define CH_RET_EMFILE CH_ENCODE_ERROR(EMFILE) /* Too many open files in process */
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#define CH_RET_ENFILE CH_ENCODE_ERROR(ENFILE) /* Too many open files in system */
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#define CH_RET_EFBIG CH_ENCODE_ERROR(EFBIG) /* File too large */
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#define CH_RET_ENOSPC CH_ENCODE_ERROR(ENOSPC) /* No space left on device */
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#define CH_RET_ESPIPE CH_ENCODE_ERROR(ESPIPE) /* Illegal seek */
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#define CH_RET_EROFS CH_ENCODE_ERROR(EROFS) /* Read-only file system */
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#define CH_RET_ERANGE CH_ENCODE_ERROR(ERANGE) /* Result too large */
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#define CH_RET_ENAMETOOLONG CH_ENCODE_ERROR(ENAMETOOLONG)/* File or path name too long */
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#define CH_RET_ENOSYS CH_ENCODE_ERROR(ENOSYS) /* Syscall not implemented */
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#define CH_RET_EOVERFLOW CH_ENCODE_ERROR(EOVERFLOW) /* File offset overflow */
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#define CH_RET_ENOEXEC CH_ENCODE_ERROR(ENOEXEC) /* Invalid executable */
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#define CH_RET_EXDEV CH_ENCODE_ERROR(EXDEV) /* Not same volume */
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/** @} */
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/*===========================================================================*/
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/* Module pre-compile time settings. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Module data structures and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Module macros. */
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/*===========================================================================*/
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/**
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* @name Errors handling macros
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* @{
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*/
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#define CH_ERRORS_MASK (int)0xFF
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#define CH_ENCODE_ERROR(posixerr) (~CH_ERRORS_MASK | (int)(posixerr))
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#define CH_DECODE_ERROR(err) ((int)(err) & CH_ERRORS_MASK)
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#define CH_RET_IS_ERROR(x) (((int)(x) & ~CH_ERRORS_MASK) == ~CH_ERRORS_MASK)
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#define CH_BREAK_ON_ERROR(err) \
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if (CH_RET_IS_ERROR(err)) break
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#define CH_RETURN_ON_ERROR(err) do { \
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int __ret = (err); \
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if (CH_RET_IS_ERROR(__ret)) { \
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return __ret; \
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} \
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} while (false)
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/** @} */
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef __cplusplus
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}
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#endif
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/*===========================================================================*/
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/* Module inline functions. */
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/*===========================================================================*/
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#endif /* ERRCODES_H */
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/** @} */
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@ -63,8 +63,8 @@
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<field name="state" ctype="driver_state_t">
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<field name="state" ctype="driver_state_t">
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<brief>Driver state.</brief>
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<brief>Driver state.</brief>
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</field>
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</field>
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<field name="owner" ctype="void$I*">
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<field name="arg" ctype="void$I*">
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<brief>Driver owner.</brief>
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<brief>Driver argument.</brief>
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</field>
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</field>
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<condition check="HAL_USE_MUTUAL_EXCLUSION == TRUE">
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<condition check="HAL_USE_MUTUAL_EXCLUSION == TRUE">
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<field name="mutex" ctype="mutex_t">
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<field name="mutex" ctype="mutex_t">
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@ -86,12 +86,12 @@
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<methods>
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<methods>
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<objinit callsuper="true">
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<objinit callsuper="true">
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<implementation><![CDATA[
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<implementation><![CDATA[
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self->state = HAL_DRV_STATE_STOP;
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self->state = HAL_DRV_STATE_STOP;
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self->owner = NULL;
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self->arg = NULL;
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osalMutexObjectInit(&self->mutex);
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osalMutexObjectInit(&self->mutex);
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#if HAL_USE_REGISTRY == TRUE
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#if HAL_USE_REGISTRY == TRUE
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self->id = 0U;
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self->id = 0U;
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self->name = "unk";
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self->name = "unk";
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drv_reg_insert(self);
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drv_reg_insert(self);
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#endif]]></implementation>
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#endif]]></implementation>
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</objinit>
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</objinit>
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@ -198,23 +198,23 @@ return self->state;]]></implementation>
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self->state = state;]]></implementation>
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self->state = state;]]></implementation>
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</method>
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</method>
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<method name="drvGetOwnerX" ctype="void *">
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<method name="drvGetArgumentX" ctype="void *">
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<brief>Driver owner get.</brief>
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<brief>Driver argument get.</brief>
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<return>The driver owner.</return>
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<return>The driver argument.</return>
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<api />
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<api />
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<implementation><![CDATA[
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<implementation><![CDATA[
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return self->owner;]]></implementation>
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return self->arg;]]></implementation>
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</method>
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</method>
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<method name="drvSetOwnerX" ctype="void">
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<method name="drvSetArgumentX" ctype="void">
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<brief>Driver owner set.</brief>
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<brief>Driver argument set.</brief>
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<param ctype="void *" name="owner" dir="in">
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<param ctype="void *" name="arg" dir="in">
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New driver owner.
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New driver argument.
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</param>
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</param>
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<api />
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<api />
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<implementation><![CDATA[
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<implementation><![CDATA[
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self->owner = owner;]]></implementation>
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self->arg = arg;]]></implementation>
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</method>
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</method>
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<method name="drvGetNameX" ctype="const char *">
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<method name="drvGetNameX" ctype="const char *">
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<brief>Driver name get.</brief>
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<brief>Driver name get.</brief>
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</define>
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</define>
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</group>
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</group>
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<group description="Channel event flags">
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<group description="Channel event flags">
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<define name="CHN_FL_NONE" value="0" />
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<define name="CHN_FL_PARITY_ERR_POS" value="0" />
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<define name="CHN_FL_PARITY_ERR_POS" value="0" />
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<define name="CHN_FL_PARITY_ERR"
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<define name="CHN_FL_PARITY_ERR"
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value="(1U << CHN_FL_PARITY_ERR_POS)" />
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value="(1U << CHN_FL_PARITY_ERR_POS)" />
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<public>
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<public>
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<definitions_early>
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<definitions_early>
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<group description="SIO events">
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<group description="SIO events">
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<define name="SIO_EV_NONE" value="CHN_FL_NONE" />
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<define name="SIO_EV_PARITY_ERR_POS" value="CHN_FL_PARITY_ERR_POS" />
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<define name="SIO_EV_PARITY_ERR_POS" value="CHN_FL_PARITY_ERR_POS" />
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<define name="SIO_EV_PARITY_ERR" value="CHN_FL_PARITY_ERR" />
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<define name="SIO_EV_PARITY_ERR" value="CHN_FL_PARITY_ERR" />
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<define name="SIO_EV_FRAMING_ERR_POS" value="CHN_FL_FRAMING_ERR_POS" />
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<define name="SIO_EV_FRAMING_ERR_POS" value="CHN_FL_FRAMING_ERR_POS" />
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*/
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*/
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/**
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/**
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* @startuml {xhal_drvsm.png} "XHAL Drivers State Machine"
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* hide empty description
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*
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* state UNINIT
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* state STOP
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* state READY
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* state ACTIVE
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* state ERROR
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*
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* [*] -> UNINIT
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* UNINIT --> STOP : xxxObjectInit()
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* STOP --> READY : drvStart()
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* READY --> READY : drvStart()\nignored
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* READY --> READY : drvConfigure()
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* READY --> STOP : drvStop()
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* STOP --> STOP : drvStop()\nignored
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* READY --> ACTIVE : start operation
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* ACTIVE -[dotted]-> READY : asynchronous\nend operation\ncallback
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* ACTIVE --> STOP : drvStop()\nhard abort
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* ACTIVE -[dotted]-> ERROR : asynchronous\noperation error\ncallback
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* ERROR --> READY : drvStart()
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* ERROR --> STOP : drvStop()
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* ERROR --> READY : error cleared
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*
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* @enduml
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*
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* @startuml {xhal_drvsm.png} "XHAL Drivers State Machine"
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* @startuml {xhal_drvsm.png} "XHAL Drivers State Machine"
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* hide empty description
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* hide empty description
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*
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*
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@ -39,7 +65,7 @@
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* end note
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* end note
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*
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*
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* [*] -> UNINIT
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* [*] -> UNINIT
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* UNINIT --> STOP : drvObjectInit()
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* UNINIT --> STOP : xxxObjectInit()
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* STOP --> READY : drvOpen()\ncall start()
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* STOP --> READY : drvOpen()\ncall start()
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* READY --> READY : drvOpen() cnt++
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* READY --> READY : drvOpen() cnt++
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* READY -u-> RCLOSE : drvClose() cnt--
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* READY -u-> RCLOSE : drvClose() cnt--
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@ -159,9 +159,9 @@ struct hal_base_driver {
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*/
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*/
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driver_state_t state;
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driver_state_t state;
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/**
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/**
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* @brief Driver owner.
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* @brief Driver argument.
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*/
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*/
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void *owner;
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void *arg;
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#if (HAL_USE_MUTUAL_EXCLUSION == TRUE) || defined (__DOXYGEN__)
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#if (HAL_USE_MUTUAL_EXCLUSION == TRUE) || defined (__DOXYGEN__)
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/**
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/**
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* @brief Driver mutex.
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* @brief Driver mutex.
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@ -323,36 +323,36 @@ static inline void drvSetStateX(void *ip, driver_state_t state) {
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* @memberof hal_base_driver_c
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* @memberof hal_base_driver_c
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* @public
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* @public
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*
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*
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* @brief Driver owner get.
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* @brief Driver argument get.
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*
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*
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* @param[in,out] ip Pointer to a @p hal_base_driver_c instance.
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* @param[in,out] ip Pointer to a @p hal_base_driver_c instance.
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* @return The driver owner.
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* @return The driver argument.
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*
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*
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* @api
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* @api
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*/
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*/
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CC_FORCE_INLINE
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CC_FORCE_INLINE
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static inline void *drvGetOwnerX(void *ip) {
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static inline void *drvGetArgumentX(void *ip) {
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hal_base_driver_c *self = (hal_base_driver_c *)ip;
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hal_base_driver_c *self = (hal_base_driver_c *)ip;
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return self->owner;
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return self->arg;
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}
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}
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/**
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/**
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* @memberof hal_base_driver_c
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* @memberof hal_base_driver_c
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||||||
* @public
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* @public
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*
|
*
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* @brief Driver owner set.
|
* @brief Driver argument set.
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*
|
*
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* @param[in,out] ip Pointer to a @p hal_base_driver_c instance.
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* @param[in,out] ip Pointer to a @p hal_base_driver_c instance.
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* @param[in] owner New driver owner.
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* @param[in] arg New driver argument.
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*
|
*
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||||||
* @api
|
* @api
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||||||
*/
|
*/
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CC_FORCE_INLINE
|
CC_FORCE_INLINE
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static inline void drvSetOwnerX(void *ip, void *owner) {
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static inline void drvSetArgumentX(void *ip, void *arg) {
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hal_base_driver_c *self = (hal_base_driver_c *)ip;
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hal_base_driver_c *self = (hal_base_driver_c *)ip;
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|
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self->owner = owner;
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self->arg = arg;
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}
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}
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|
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/**
|
/**
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||||||
|
|
|
@ -91,9 +91,9 @@ struct hal_buffered_serial {
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*/
|
*/
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driver_state_t state;
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driver_state_t state;
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/**
|
/**
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||||||
* @brief Driver owner.
|
* @brief Driver argument.
|
||||||
*/
|
*/
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||||||
void *owner;
|
void *arg;
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||||||
#if (HAL_USE_MUTUAL_EXCLUSION == TRUE) || defined (__DOXYGEN__)
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#if (HAL_USE_MUTUAL_EXCLUSION == TRUE) || defined (__DOXYGEN__)
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||||||
/**
|
/**
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||||||
* @brief Driver mutex.
|
* @brief Driver mutex.
|
||||||
|
|
|
@ -55,6 +55,7 @@
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||||||
* @name Channel event flags
|
* @name Channel event flags
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
#define CHN_FL_NONE 0
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||||||
#define CHN_FL_PARITY_ERR_POS 0
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#define CHN_FL_PARITY_ERR_POS 0
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#define CHN_FL_PARITY_ERR (1U << CHN_FL_PARITY_ERR_POS)
|
#define CHN_FL_PARITY_ERR (1U << CHN_FL_PARITY_ERR_POS)
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||||||
#define CHN_FL_FRAMING_ERR_POS 1
|
#define CHN_FL_FRAMING_ERR_POS 1
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||||||
|
|
|
@ -37,6 +37,7 @@
|
||||||
* @name SIO events
|
* @name SIO events
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
#define SIO_EV_NONE CHN_FL_NONE
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||||||
#define SIO_EV_PARITY_ERR_POS CHN_FL_PARITY_ERR_POS
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#define SIO_EV_PARITY_ERR_POS CHN_FL_PARITY_ERR_POS
|
||||||
#define SIO_EV_PARITY_ERR CHN_FL_PARITY_ERR
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#define SIO_EV_PARITY_ERR CHN_FL_PARITY_ERR
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||||||
#define SIO_EV_FRAMING_ERR_POS CHN_FL_FRAMING_ERR_POS
|
#define SIO_EV_FRAMING_ERR_POS CHN_FL_FRAMING_ERR_POS
|
||||||
|
@ -553,9 +554,9 @@ struct hal_sio_driver {
|
||||||
*/
|
*/
|
||||||
driver_state_t state;
|
driver_state_t state;
|
||||||
/**
|
/**
|
||||||
* @brief Driver owner.
|
* @brief Driver argument.
|
||||||
*/
|
*/
|
||||||
void *owner;
|
void *arg;
|
||||||
#if (HAL_USE_MUTUAL_EXCLUSION == TRUE) || defined (__DOXYGEN__)
|
#if (HAL_USE_MUTUAL_EXCLUSION == TRUE) || defined (__DOXYGEN__)
|
||||||
/**
|
/**
|
||||||
* @brief Driver mutex.
|
* @brief Driver mutex.
|
||||||
|
|
|
@ -1,17 +1,17 @@
|
||||||
ifeq ($(USE_SMART_BUILD),yes)
|
ifeq ($(USE_SMART_BUILD),yes)
|
||||||
ifneq ($(findstring HAL_USE_SERIAL TRUE,$(HALCONF)),)
|
#ifneq ($(findstring HAL_USE_SERIAL TRUE,$(HALCONF)),)
|
||||||
PLATFORMSRC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USARTv3/hal_serial_lld.c
|
#PLATFORMSRC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USARTv3/hal_serial_lld.c
|
||||||
endif
|
#endif
|
||||||
ifneq ($(findstring HAL_USE_SIO TRUE,$(HALCONF)),)
|
ifneq ($(findstring HAL_USE_SIO TRUE,$(HALCONF)),)
|
||||||
PLATFORMSRC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USARTv3/hal_sio_lld.c
|
PLATFORMSRC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USARTv3/hal_sio_lld.c
|
||||||
endif
|
endif
|
||||||
ifneq ($(findstring HAL_USE_UART TRUE,$(HALCONF)),)
|
#ifneq ($(findstring HAL_USE_UART TRUE,$(HALCONF)),)
|
||||||
PLATFORMSRC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USARTv3/hal_uart_lld.c
|
#PLATFORMSRC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USARTv3/hal_uart_lld.c
|
||||||
endif
|
#endif
|
||||||
else
|
else
|
||||||
PLATFORMSRC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USARTv3/hal_serial_lld.c
|
#PLATFORMSRC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USARTv3/hal_serial_lld.c
|
||||||
PLATFORMSRC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USARTv3/hal_sio_lld.c
|
PLATFORMSRC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USARTv3/hal_sio_lld.c
|
||||||
PLATFORMSRC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USARTv3/hal_uart_lld.c
|
#PLATFORMSRC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USARTv3/hal_uart_lld.c
|
||||||
endif
|
endif
|
||||||
|
|
||||||
PLATFORMINC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USART \
|
PLATFORMINC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USART \
|
||||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -1,704 +0,0 @@
|
||||||
/*
|
|
||||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
|
||||||
|
|
||||||
Licensed under the Apache License, Version 2.0 (the "License");
|
|
||||||
you may not use this file except in compliance with the License.
|
|
||||||
You may obtain a copy of the License at
|
|
||||||
|
|
||||||
http://www.apache.org/licenses/LICENSE-2.0
|
|
||||||
|
|
||||||
Unless required by applicable law or agreed to in writing, software
|
|
||||||
distributed under the License is distributed on an "AS IS" BASIS,
|
|
||||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
||||||
See the License for the specific language governing permissions and
|
|
||||||
limitations under the License.
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @file USARTv3/hal_serial_lld.h
|
|
||||||
* @brief STM32 low level serial driver header.
|
|
||||||
*
|
|
||||||
* @addtogroup SERIAL
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef HAL_SERIAL_LLD_H
|
|
||||||
#define HAL_SERIAL_LLD_H
|
|
||||||
|
|
||||||
#if HAL_USE_SERIAL || defined(__DOXYGEN__)
|
|
||||||
|
|
||||||
#include "stm32_usart.h"
|
|
||||||
|
|
||||||
/*===========================================================================*/
|
|
||||||
/* Driver constants. */
|
|
||||||
/*===========================================================================*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Advanced buffering support switch.
|
|
||||||
* @details This constants enables the advanced buffering support in the
|
|
||||||
* low level driver, the queue buffer is no more part of the
|
|
||||||
* @p SerialDriver structure, each driver can have a different
|
|
||||||
* queue size.
|
|
||||||
*/
|
|
||||||
#define SERIAL_ADVANCED_BUFFERING_SUPPORT TRUE
|
|
||||||
|
|
||||||
/*===========================================================================*/
|
|
||||||
/* Driver pre-compile time settings. */
|
|
||||||
/*===========================================================================*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @name Configuration options
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
/**
|
|
||||||
* @brief USART1 driver enable switch.
|
|
||||||
* @details If set to @p TRUE the support for USART1 is included.
|
|
||||||
* @note The default is @p FALSE.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USE_USART1) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USE_USART1 FALSE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief USART2 driver enable switch.
|
|
||||||
* @details If set to @p TRUE the support for USART2 is included.
|
|
||||||
* @note The default is @p FALSE.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USE_USART2) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USE_USART2 FALSE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief USART3 driver enable switch.
|
|
||||||
* @details If set to @p TRUE the support for USART3 is included.
|
|
||||||
* @note The default is @p FALSE.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USE_USART3) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USE_USART3 FALSE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief UART4 driver enable switch.
|
|
||||||
* @details If set to @p TRUE the support for UART4 is included.
|
|
||||||
* @note The default is @p FALSE.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USE_UART4) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USE_UART4 FALSE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief UART5 driver enable switch.
|
|
||||||
* @details If set to @p TRUE the support for UART5 is included.
|
|
||||||
* @note The default is @p FALSE.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USE_UART5) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USE_UART5 FALSE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief USART6 driver enable switch.
|
|
||||||
* @details If set to @p TRUE the support for USART6 is included.
|
|
||||||
* @note The default is @p FALSE.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USE_USART6) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USE_USART6 FALSE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief UART7 driver enable switch.
|
|
||||||
* @details If set to @p TRUE the support for UART7 is included.
|
|
||||||
* @note The default is @p FALSE.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USE_UART7) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USE_UART7 FALSE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief UART8 driver enable switch.
|
|
||||||
* @details If set to @p TRUE the support for UART8 is included.
|
|
||||||
* @note The default is @p FALSE.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USE_UART8) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USE_UART8 FALSE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief UART9 driver enable switch.
|
|
||||||
* @details If set to @p TRUE the support for UART9 is included.
|
|
||||||
* @note The default is @p FALSE.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USE_UART9) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USE_UART9 FALSE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief USART10 driver enable switch.
|
|
||||||
* @details If set to @p TRUE the support for USART10 is included.
|
|
||||||
* @note The default is @p FALSE.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USE_USART10) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USE_USART10 FALSE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief LPUART1 driver enable switch.
|
|
||||||
* @details If set to @p TRUE the support for LPUART is included.
|
|
||||||
* @note The default is @p FALSE.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USE_LPUART1) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USE_LPUART1 FALSE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief USART1 interrupt priority level setting.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USART1_PRIORITY) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USART1_PRIORITY 12
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief USART2 interrupt priority level setting.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USART2_PRIORITY) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USART2_PRIORITY 12
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief USART3 interrupt priority level setting.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USART3_PRIORITY) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USART3_PRIORITY 12
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief UART4 interrupt priority level setting.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_UART4_PRIORITY) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_UART4_PRIORITY 12
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief UART5 interrupt priority level setting.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_UART5_PRIORITY) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_UART5_PRIORITY 12
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief USART6 interrupt priority level setting.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USART6_PRIORITY) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USART6_PRIORITY 12
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief UART7 interrupt priority level setting.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_UART7_PRIORITY) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_UART7_PRIORITY 12
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief UART8 interrupt priority level setting.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_UART8_PRIORITY) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_UART8_PRIORITY 12
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief UART9 interrupt priority level setting.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_UART9_PRIORITY) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_UART9_PRIORITY 12
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief USART10 interrupt priority level setting.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USART10_PRIORITY) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USART10_PRIORITY 12
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief LPUART1 interrupt priority level setting.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_LPUART1_PRIORITY) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_LPUART1_PRIORITY 12
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Input buffer size for USART1.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USART1_IN_BUF_SIZE) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USART1_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Output buffer size for USART1.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USART1_OUT_BUF_SIZE) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USART1_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Input buffer size for USART2.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USART2_IN_BUF_SIZE) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USART2_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Output buffer size for USART2.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USART2_OUT_BUF_SIZE) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USART2_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Input buffer size for USART3.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USART3_IN_BUF_SIZE) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USART3_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Output buffer size for USART3.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USART3_OUT_BUF_SIZE) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USART3_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Input buffer size for UART4.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_UART4_IN_BUF_SIZE) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_UART4_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Output buffer size for UART4.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_UART4_OUT_BUF_SIZE) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_UART4_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Input buffer size for UART5.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_UART5_IN_BUF_SIZE) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_UART5_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Output buffer size for UART5.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_UART5_OUT_BUF_SIZE) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_UART5_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Input buffer size for USART6.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USART6_IN_BUF_SIZE) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USART6_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Output buffer size for USART6.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USART6_OUT_BUF_SIZE) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USART6_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Input buffer size for UART7.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_UART7_IN_BUF_SIZE) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_UART7_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Output buffer size for UART7.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_UART7_OUT_BUF_SIZE) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_UART7_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Input buffer size for UART8.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_UART8_IN_BUF_SIZE) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_UART8_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Output buffer size for UART8.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_UART8_OUT_BUF_SIZE) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_UART8_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Input buffer size for UART9.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_UART9_IN_BUF_SIZE) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_UART9_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Output buffer size for UART9.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_UART9_OUT_BUF_SIZE) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_UART9_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Input buffer size for USART10.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USART10_IN_BUF_SIZE) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USART10_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Output buffer size for USART10.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_USART10_OUT_BUF_SIZE) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_USART10_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Input buffer size for LPUART1.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_LPUART1_IN_BUF_SIZE) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_LPUART1_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Output buffer size for LPUART1.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_SERIAL_LPUART1_OUT_BUF_SIZE) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_SERIAL_LPUART1_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
|
|
||||||
#endif
|
|
||||||
/** @} */
|
|
||||||
|
|
||||||
/*===========================================================================*/
|
|
||||||
/* Derived constants and error checks. */
|
|
||||||
/*===========================================================================*/
|
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_USART1 && !STM32_HAS_USART1
|
|
||||||
#error "USART1 not present in the selected device"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_USART2 && !STM32_HAS_USART2
|
|
||||||
#error "USART2 not present in the selected device"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_USART3 && !STM32_HAS_USART3
|
|
||||||
#error "USART3 not present in the selected device"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_UART4 && !STM32_HAS_UART4
|
|
||||||
#error "UART4 not present in the selected device"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_UART5 && !STM32_HAS_UART5
|
|
||||||
#error "UART5 not present in the selected device"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_USART6 && !STM32_HAS_USART6
|
|
||||||
#error "USART6 not present in the selected device"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_UART7 && !STM32_HAS_UART7
|
|
||||||
#error "UART7 not present in the selected device"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_UART8 && !STM32_HAS_UART8
|
|
||||||
#error "UART8 not present in the selected device"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_UART9 && !STM32_HAS_UART9
|
|
||||||
#error "UART9 not present in the selected device"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_USART10 && !STM32_HAS_USART10
|
|
||||||
#error "USART10 not present in the selected device"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_LPUART1 && !STM32_HAS_LPUART1
|
|
||||||
#error "LPUART1 not present in the selected device"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if !STM32_SERIAL_USE_USART1 && !STM32_SERIAL_USE_USART2 && \
|
|
||||||
!STM32_SERIAL_USE_USART3 && !STM32_SERIAL_USE_UART4 && \
|
|
||||||
!STM32_SERIAL_USE_UART5 && !STM32_SERIAL_USE_USART6 && \
|
|
||||||
!STM32_SERIAL_USE_UART7 && !STM32_SERIAL_USE_UART8 && \
|
|
||||||
!STM32_SERIAL_USE_UART9 && !STM32_SERIAL_USE_USART10 && \
|
|
||||||
!STM32_SERIAL_USE_LPUART1
|
|
||||||
#error "SERIAL driver activated but no USART/UART peripheral assigned"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if !defined(STM32_USART1_SUPPRESS_ISR) && \
|
|
||||||
STM32_SERIAL_USE_USART1 && \
|
|
||||||
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART1_PRIORITY)
|
|
||||||
#error "Invalid IRQ priority assigned to USART1"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if !defined(STM32_USART2_SUPPRESS_ISR) && \
|
|
||||||
STM32_SERIAL_USE_USART2 && \
|
|
||||||
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART2_PRIORITY)
|
|
||||||
#error "Invalid IRQ priority assigned to USART2"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if !defined(STM32_USART3_SUPPRESS_ISR) && \
|
|
||||||
STM32_SERIAL_USE_USART3 && \
|
|
||||||
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART3_PRIORITY)
|
|
||||||
#error "Invalid IRQ priority assigned to USART3"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if !defined(STM32_UART4_SUPPRESS_ISR) && \
|
|
||||||
STM32_SERIAL_USE_UART4 && \
|
|
||||||
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_UART4_PRIORITY)
|
|
||||||
#error "Invalid IRQ priority assigned to UART4"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if !defined(STM32_UART5_SUPPRESS_ISR) && \
|
|
||||||
STM32_SERIAL_USE_UART5 && \
|
|
||||||
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_UART5_PRIORITY)
|
|
||||||
#error "Invalid IRQ priority assigned to UART5"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if !defined(STM32_USART6_SUPPRESS_ISR) && \
|
|
||||||
STM32_SERIAL_USE_USART6 && \
|
|
||||||
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART6_PRIORITY)
|
|
||||||
#error "Invalid IRQ priority assigned to USART6"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if !defined(STM32_UART7_SUPPRESS_ISR) && \
|
|
||||||
STM32_SERIAL_USE_UART7 && \
|
|
||||||
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_UART7_PRIORITY)
|
|
||||||
#error "Invalid IRQ priority assigned to UART7"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if !defined(STM32_UART8_SUPPRESS_ISR) && \
|
|
||||||
STM32_SERIAL_USE_UART8 && \
|
|
||||||
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_UART8_PRIORITY)
|
|
||||||
#error "Invalid IRQ priority assigned to UART8"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if !defined(STM32_UART9_SUPPRESS_ISR) && \
|
|
||||||
STM32_SERIAL_USE_UART9 && \
|
|
||||||
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_UART9_PRIORITY)
|
|
||||||
#error "Invalid IRQ priority assigned to UART9"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if !defined(STM32_USART10_SUPPRESS_ISR) && \
|
|
||||||
STM32_SERIAL_USE_USART10 && \
|
|
||||||
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART10_PRIORITY)
|
|
||||||
#error "Invalid IRQ priority assigned to USART10"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if !defined(STM32_LPUART1_SUPPRESS_ISR) && \
|
|
||||||
STM32_SERIAL_USE_LPUART1 && \
|
|
||||||
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_LPUART1_PRIORITY)
|
|
||||||
#error "Invalid IRQ priority assigned to LPUART1"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* Checks on allocation of USARTx units.*/
|
|
||||||
#if STM32_SERIAL_USE_USART1
|
|
||||||
#if defined(STM32_USART1_IS_USED)
|
|
||||||
#error "SD1 requires USART1 but it is already used"
|
|
||||||
#else
|
|
||||||
#define STM32_USART1_IS_USED
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_USART2
|
|
||||||
#if defined(STM32_USART2_IS_USED)
|
|
||||||
#error "SD2 requires USART2 but it is already used"
|
|
||||||
#else
|
|
||||||
#define STM32_USART2_IS_USED
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_USART3
|
|
||||||
#if defined(STM32_USART3_IS_USED)
|
|
||||||
#error "SD3 requires USART3 but it is already used"
|
|
||||||
#else
|
|
||||||
#define STM32_USART3_IS_USED
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_UART4
|
|
||||||
#if defined(STM32_UART4_IS_USED)
|
|
||||||
#error "SD4 requires UART4 but it is already used"
|
|
||||||
#else
|
|
||||||
#define STM32_UART4_IS_USED
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_UART5
|
|
||||||
#if defined(STM32_UART5_IS_USED)
|
|
||||||
#error "SD5 requires UART5 but it is already used"
|
|
||||||
#else
|
|
||||||
#define STM32_UART5_IS_USED
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_USART6
|
|
||||||
#if defined(STM32_USART6_IS_USED)
|
|
||||||
#error "SD6 requires USART6 but it is already used"
|
|
||||||
#else
|
|
||||||
#define STM32_USART6_IS_USED
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_UART7
|
|
||||||
#if defined(STM32_UART7_IS_USED)
|
|
||||||
#error "SD7 requires UART7 but it is already used"
|
|
||||||
#else
|
|
||||||
#define STM32_UART7_IS_USED
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_UART8
|
|
||||||
#if defined(STM32_UART8_IS_USED)
|
|
||||||
#error "SD8 requires UART8 but it is already used"
|
|
||||||
#else
|
|
||||||
#define STM32_UART8_IS_USED
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_UART9
|
|
||||||
#if defined(STM32_UART9_IS_USED)
|
|
||||||
#error "SD9 requires UART9 but it is already used"
|
|
||||||
#else
|
|
||||||
#define STM32_UART9_IS_USED
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_USART10
|
|
||||||
#if defined(STM32_USART10_IS_USED)
|
|
||||||
#error "SD10 requires USART10 but it is already used"
|
|
||||||
#else
|
|
||||||
#define STM32_USART10_IS_USED
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_LPUART1
|
|
||||||
#if defined(STM32_LPUART1_IS_USED)
|
|
||||||
#error "LPSD1 requires LPUART1 but it is already used"
|
|
||||||
#else
|
|
||||||
#define STM32_LPUART1_IS_USED
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*===========================================================================*/
|
|
||||||
/* Driver data structures and types. */
|
|
||||||
/*===========================================================================*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief STM32 Serial Driver configuration structure.
|
|
||||||
* @details An instance of this structure must be passed to @p sdStart()
|
|
||||||
* in order to configure and start a serial driver operations.
|
|
||||||
* @note This structure content is architecture dependent, each driver
|
|
||||||
* implementation defines its own version and the custom static
|
|
||||||
* initializers.
|
|
||||||
*/
|
|
||||||
typedef struct hal_serial_config {
|
|
||||||
/**
|
|
||||||
* @brief Bit rate.
|
|
||||||
*/
|
|
||||||
uint32_t speed;
|
|
||||||
/* End of the mandatory fields.*/
|
|
||||||
/**
|
|
||||||
* @brief Initialization value for the CR1 register.
|
|
||||||
*/
|
|
||||||
uint32_t cr1;
|
|
||||||
/**
|
|
||||||
* @brief Initialization value for the CR2 register.
|
|
||||||
*/
|
|
||||||
uint32_t cr2;
|
|
||||||
/**
|
|
||||||
* @brief Initialization value for the CR3 register.
|
|
||||||
*/
|
|
||||||
uint32_t cr3;
|
|
||||||
} SerialConfig;
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief @p SerialDriver specific data.
|
|
||||||
*/
|
|
||||||
#define _serial_driver_data \
|
|
||||||
_base_asynchronous_channel_data \
|
|
||||||
/* Driver state.*/ \
|
|
||||||
sdstate_t state; \
|
|
||||||
/* Input queue.*/ \
|
|
||||||
input_queue_t iqueue; \
|
|
||||||
/* Output queue.*/ \
|
|
||||||
output_queue_t oqueue; \
|
|
||||||
/* End of the mandatory fields.*/ \
|
|
||||||
/* Pointer to the USART registers block.*/ \
|
|
||||||
USART_TypeDef *usart; \
|
|
||||||
/* Clock frequency for the associated USART/UART.*/ \
|
|
||||||
uint32_t clock; \
|
|
||||||
/* Mask to be applied on received frames.*/ \
|
|
||||||
uint8_t rxmask;
|
|
||||||
|
|
||||||
/*===========================================================================*/
|
|
||||||
/* Driver macros. */
|
|
||||||
/*===========================================================================*/
|
|
||||||
|
|
||||||
/*===========================================================================*/
|
|
||||||
/* External declarations. */
|
|
||||||
/*===========================================================================*/
|
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_USART1 && !defined(__DOXYGEN__)
|
|
||||||
extern SerialDriver SD1;
|
|
||||||
#endif
|
|
||||||
#if STM32_SERIAL_USE_USART2 && !defined(__DOXYGEN__)
|
|
||||||
extern SerialDriver SD2;
|
|
||||||
#endif
|
|
||||||
#if STM32_SERIAL_USE_USART3 && !defined(__DOXYGEN__)
|
|
||||||
extern SerialDriver SD3;
|
|
||||||
#endif
|
|
||||||
#if STM32_SERIAL_USE_UART4 && !defined(__DOXYGEN__)
|
|
||||||
extern SerialDriver SD4;
|
|
||||||
#endif
|
|
||||||
#if STM32_SERIAL_USE_UART5 && !defined(__DOXYGEN__)
|
|
||||||
extern SerialDriver SD5;
|
|
||||||
#endif
|
|
||||||
#if STM32_SERIAL_USE_USART6 && !defined(__DOXYGEN__)
|
|
||||||
extern SerialDriver SD6;
|
|
||||||
#endif
|
|
||||||
#if STM32_SERIAL_USE_UART7 && !defined(__DOXYGEN__)
|
|
||||||
extern SerialDriver SD7;
|
|
||||||
#endif
|
|
||||||
#if STM32_SERIAL_USE_UART8 && !defined(__DOXYGEN__)
|
|
||||||
extern SerialDriver SD8;
|
|
||||||
#endif
|
|
||||||
#if STM32_SERIAL_USE_UART9 && !defined(__DOXYGEN__)
|
|
||||||
extern SerialDriver SD9;
|
|
||||||
#endif
|
|
||||||
#if STM32_SERIAL_USE_USART10 && !defined(__DOXYGEN__)
|
|
||||||
extern SerialDriver SD10;
|
|
||||||
#endif
|
|
||||||
#if STM32_SERIAL_USE_LPUART1 && !defined(__DOXYGEN__)
|
|
||||||
extern SerialDriver LPSD1;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
extern "C" {
|
|
||||||
#endif
|
|
||||||
void sd_lld_init(void);
|
|
||||||
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config);
|
|
||||||
void sd_lld_stop(SerialDriver *sdp);
|
|
||||||
void sd_lld_serve_interrupt(SerialDriver *sdp);
|
|
||||||
#ifdef __cplusplus
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#endif /* HAL_USE_SERIAL */
|
|
||||||
|
|
||||||
#endif /* HAL_SERIAL_LLD_H */
|
|
||||||
|
|
||||||
/** @} */
|
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
@ -218,12 +218,12 @@ void *__drv_objinit_impl(void *ip, const void *vmt) {
|
||||||
__bo_objinit_impl(self, vmt);
|
__bo_objinit_impl(self, vmt);
|
||||||
|
|
||||||
/* Initialization code.*/
|
/* Initialization code.*/
|
||||||
self->state = HAL_DRV_STATE_STOP;
|
self->state = HAL_DRV_STATE_STOP;
|
||||||
self->owner = NULL;
|
self->arg = NULL;
|
||||||
osalMutexObjectInit(&self->mutex);
|
osalMutexObjectInit(&self->mutex);
|
||||||
#if HAL_USE_REGISTRY == TRUE
|
#if HAL_USE_REGISTRY == TRUE
|
||||||
self->id = 0U;
|
self->id = 0U;
|
||||||
self->name = "unk";
|
self->name = "unk";
|
||||||
drv_reg_insert(self);
|
drv_reg_insert(self);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue