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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@16239 27425a3e-05d8-49a3-a47f-9c15f0e5edd8

This commit is contained in:
Giovanni Di Sirio 2023-04-27 14:33:37 +00:00
parent a8092558b5
commit 06a115b1bb
15 changed files with 200 additions and 4093 deletions
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128
os/common/include/errcodes.h Normal file
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@ -0,0 +1,128 @@
/*
ChibiOS - Copyright (C) 2006,2007,2008,2009,2010,2011,2012,2013,2014,
2015,2016,2017,2018,2019,2020,2021 Giovanni Di Sirio.
This file is part of ChibiOS.
ChibiOS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation version 3 of the License.
ChibiOS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file errcodes.h
* @brief Errors handling header file.
*
* @addtogroup UTILS_ERRCODES
* @{
*/
#ifndef ERRCODES_H
#define ERRCODES_H
#include <errno.h>
/*===========================================================================*/
/* Module constants. */
/*===========================================================================*/
/**
* @name Error codes
* @{
*/
#define CH_RET_SUCCESS (int)MSG_OK /* Success */
#define CH_RET_TIMEOUT (int)MSG_TIMEOUT /* Timeout */
#define CH_RET_INNER_ERROR (int)-3 /* Unexpected condition */
/** @} */
/**
* @name Extra error codes mapped on Posix errors
* @{
*/
#define CH_RET_ENOENT CH_ENCODE_ERROR(ENOENT) /* No such file or directory */
#define CH_RET_EIO CH_ENCODE_ERROR(EIO) /* I/O error */
#define CH_RET_EBADF CH_ENCODE_ERROR(EBADF) /* Bad file number */
#define CH_RET_ENOMEM CH_ENCODE_ERROR(ENOMEM) /* Not enough space */
#define CH_RET_EACCES CH_ENCODE_ERROR(EACCES) /* Permission denied */
#define CH_RET_EFAULT CH_ENCODE_ERROR(EACCES) /* Bad address */
#define CH_RET_EEXIST CH_ENCODE_ERROR(EEXIST) /* File exists */
#define CH_RET_ENOTDIR CH_ENCODE_ERROR(ENOTDIR) /* Not a directory */
#define CH_RET_EISDIR CH_ENCODE_ERROR(EISDIR) /* Is a directory */
#define CH_RET_EINVAL CH_ENCODE_ERROR(EINVAL) /* Invalid argument */
#define CH_RET_EMFILE CH_ENCODE_ERROR(EMFILE) /* Too many open files in process */
#define CH_RET_ENFILE CH_ENCODE_ERROR(ENFILE) /* Too many open files in system */
#define CH_RET_EFBIG CH_ENCODE_ERROR(EFBIG) /* File too large */
#define CH_RET_ENOSPC CH_ENCODE_ERROR(ENOSPC) /* No space left on device */
#define CH_RET_ESPIPE CH_ENCODE_ERROR(ESPIPE) /* Illegal seek */
#define CH_RET_EROFS CH_ENCODE_ERROR(EROFS) /* Read-only file system */
#define CH_RET_ERANGE CH_ENCODE_ERROR(ERANGE) /* Result too large */
#define CH_RET_ENAMETOOLONG CH_ENCODE_ERROR(ENAMETOOLONG)/* File or path name too long */
#define CH_RET_ENOSYS CH_ENCODE_ERROR(ENOSYS) /* Syscall not implemented */
#define CH_RET_EOVERFLOW CH_ENCODE_ERROR(EOVERFLOW) /* File offset overflow */
#define CH_RET_ENOEXEC CH_ENCODE_ERROR(ENOEXEC) /* Invalid executable */
#define CH_RET_EXDEV CH_ENCODE_ERROR(EXDEV) /* Not same volume */
/** @} */
/*===========================================================================*/
/* Module pre-compile time settings. */
/*===========================================================================*/
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
/*===========================================================================*/
/* Module data structures and types. */
/*===========================================================================*/
/*===========================================================================*/
/* Module macros. */
/*===========================================================================*/
/**
* @name Errors handling macros
* @{
*/
#define CH_ERRORS_MASK (int)0xFF
#define CH_ENCODE_ERROR(posixerr) (~CH_ERRORS_MASK | (int)(posixerr))
#define CH_DECODE_ERROR(err) ((int)(err) & CH_ERRORS_MASK)
#define CH_RET_IS_ERROR(x) (((int)(x) & ~CH_ERRORS_MASK) == ~CH_ERRORS_MASK)
#define CH_BREAK_ON_ERROR(err) \
if (CH_RET_IS_ERROR(err)) break
#define CH_RETURN_ON_ERROR(err) do { \
int __ret = (err); \
if (CH_RET_IS_ERROR(__ret)) { \
return __ret; \
} \
} while (false)
/** @} */
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
}
#endif
/*===========================================================================*/
/* Module inline functions. */
/*===========================================================================*/
#endif /* ERRCODES_H */
/** @} */

24
os/xhal/codegen/hal_base_driver.xml
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@ -63,8 +63,8 @@
<field name="state" ctype="driver_state_t">
<brief>Driver state.</brief>
</field>
<field name="owner" ctype="void$I*">
<brief>Driver owner.</brief>
<field name="arg" ctype="void$I*">
<brief>Driver argument.</brief>
</field>
<condition check="HAL_USE_MUTUAL_EXCLUSION == TRUE">
<field name="mutex" ctype="mutex_t">
@ -87,7 +87,7 @@
<objinit callsuper="true">
<implementation><![CDATA[
self->state = HAL_DRV_STATE_STOP;
self->owner = NULL;
self->arg = NULL;
osalMutexObjectInit(&self->mutex);
#if HAL_USE_REGISTRY == TRUE
self->id = 0U;
@ -198,23 +198,23 @@ return self->state;]]></implementation>
self->state = state;]]></implementation>
</method>
<method name="drvGetOwnerX" ctype="void *">
<brief>Driver owner get.</brief>
<return>The driver owner.</return>
<method name="drvGetArgumentX" ctype="void *">
<brief>Driver argument get.</brief>
<return>The driver argument.</return>
<api />
<implementation><![CDATA[
return self->owner;]]></implementation>
return self->arg;]]></implementation>
</method>
<method name="drvSetOwnerX" ctype="void">
<brief>Driver owner set.</brief>
<param ctype="void *" name="owner" dir="in">
New driver owner.
<method name="drvSetArgumentX" ctype="void">
<brief>Driver argument set.</brief>
<param ctype="void *" name="arg" dir="in">
New driver argument.
</param>
<api />
<implementation><![CDATA[
self->owner = owner;]]></implementation>
self->arg = arg;]]></implementation>
</method>
<method name="drvGetNameX" ctype="const char *">
<brief>Driver name get.</brief>

1
os/xhal/codegen/hal_channels.xml
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@ -20,6 +20,7 @@
</define>
</group>
<group description="Channel event flags">
<define name="CHN_FL_NONE" value="0" />
<define name="CHN_FL_PARITY_ERR_POS" value="0" />
<define name="CHN_FL_PARITY_ERR"
value="(1U &lt;&lt; CHN_FL_PARITY_ERR_POS)" />

1
os/xhal/codegen/hal_sio.xml
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@ -10,6 +10,7 @@
<public>
<definitions_early>
<group description="SIO events">
<define name="SIO_EV_NONE" value="CHN_FL_NONE" />
<define name="SIO_EV_PARITY_ERR_POS" value="CHN_FL_PARITY_ERR_POS" />
<define name="SIO_EV_PARITY_ERR" value="CHN_FL_PARITY_ERR" />
<define name="SIO_EV_FRAMING_ERR_POS" value="CHN_FL_FRAMING_ERR_POS" />

28
os/xhal/dox/xhal_arch.dox
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@ -18,6 +18,32 @@
*/
/**
* @startuml {xhal_drvsm.png} "XHAL Drivers State Machine"
* hide empty description
*
* state UNINIT
* state STOP
* state READY
* state ACTIVE
* state ERROR
*
* [*] -> UNINIT
* UNINIT --> STOP : xxxObjectInit()
* STOP --> READY : drvStart()
* READY --> READY : drvStart()\nignored
* READY --> READY : drvConfigure()
* READY --> STOP : drvStop()
* STOP --> STOP : drvStop()\nignored
* READY --> ACTIVE : start operation
* ACTIVE -[dotted]-> READY : asynchronous\nend operation\ncallback
* ACTIVE --> STOP : drvStop()\nhard abort
* ACTIVE -[dotted]-> ERROR : asynchronous\noperation error\ncallback
* ERROR --> READY : drvStart()
* ERROR --> STOP : drvStop()
* ERROR --> READY : error cleared
*
* @enduml
*
* @startuml {xhal_drvsm.png} "XHAL Drivers State Machine"
* hide empty description
*
@ -39,7 +65,7 @@
* end note
*
* [*] -> UNINIT
* UNINIT --> STOP : drvObjectInit()
* UNINIT --> STOP : xxxObjectInit()
* STOP --> READY : drvOpen()\ncall start()
* READY --> READY : drvOpen() cnt++
* READY -u-> RCLOSE : drvClose() cnt--

20
os/xhal/include/hal_base_driver.h
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@ -159,9 +159,9 @@ struct hal_base_driver {
*/
driver_state_t state;
/**
* @brief Driver owner.
* @brief Driver argument.
*/
void *owner;
void *arg;
#if (HAL_USE_MUTUAL_EXCLUSION == TRUE) || defined (__DOXYGEN__)
/**
* @brief Driver mutex.
@ -323,36 +323,36 @@ static inline void drvSetStateX(void *ip, driver_state_t state) {
* @memberof hal_base_driver_c
* @public
*
* @brief Driver owner get.
* @brief Driver argument get.
*
* @param[in,out] ip Pointer to a @p hal_base_driver_c instance.
* @return The driver owner.
* @return The driver argument.
*
* @api
*/
CC_FORCE_INLINE
static inline void *drvGetOwnerX(void *ip) {
static inline void *drvGetArgumentX(void *ip) {
hal_base_driver_c *self = (hal_base_driver_c *)ip;
return self->owner;
return self->arg;
}
/**
* @memberof hal_base_driver_c
* @public
*
* @brief Driver owner set.
* @brief Driver argument set.
*
* @param[in,out] ip Pointer to a @p hal_base_driver_c instance.
* @param[in] owner New driver owner.
* @param[in] arg New driver argument.
*
* @api
*/
CC_FORCE_INLINE
static inline void drvSetOwnerX(void *ip, void *owner) {
static inline void drvSetArgumentX(void *ip, void *arg) {
hal_base_driver_c *self = (hal_base_driver_c *)ip;
self->owner = owner;
self->arg = arg;
}
/**

4
os/xhal/include/hal_buffered_serial.h
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@ -91,9 +91,9 @@ struct hal_buffered_serial {
*/
driver_state_t state;
/**
* @brief Driver owner.
* @brief Driver argument.
*/
void *owner;
void *arg;
#if (HAL_USE_MUTUAL_EXCLUSION == TRUE) || defined (__DOXYGEN__)
/**
* @brief Driver mutex.

1
os/xhal/include/hal_channels.h
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@ -55,6 +55,7 @@
* @name Channel event flags
* @{
*/
#define CHN_FL_NONE 0
#define CHN_FL_PARITY_ERR_POS 0
#define CHN_FL_PARITY_ERR (1U << CHN_FL_PARITY_ERR_POS)
#define CHN_FL_FRAMING_ERR_POS 1

5
os/xhal/include/hal_sio.h
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@ -37,6 +37,7 @@
* @name SIO events
* @{
*/
#define SIO_EV_NONE CHN_FL_NONE
#define SIO_EV_PARITY_ERR_POS CHN_FL_PARITY_ERR_POS
#define SIO_EV_PARITY_ERR CHN_FL_PARITY_ERR
#define SIO_EV_FRAMING_ERR_POS CHN_FL_FRAMING_ERR_POS
@ -553,9 +554,9 @@ struct hal_sio_driver {
*/
driver_state_t state;
/**
* @brief Driver owner.
* @brief Driver argument.
*/
void *owner;
void *arg;
#if (HAL_USE_MUTUAL_EXCLUSION == TRUE) || defined (__DOXYGEN__)
/**
* @brief Driver mutex.

16
os/xhal/ports/STM32/LLD/USARTv3/driver.mk
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@ -1,17 +1,17 @@
ifeq ($(USE_SMART_BUILD),yes)
ifneq ($(findstring HAL_USE_SERIAL TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USARTv3/hal_serial_lld.c
endif
#ifneq ($(findstring HAL_USE_SERIAL TRUE,$(HALCONF)),)
#PLATFORMSRC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USARTv3/hal_serial_lld.c
#endif
ifneq ($(findstring HAL_USE_SIO TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USARTv3/hal_sio_lld.c
endif
ifneq ($(findstring HAL_USE_UART TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USARTv3/hal_uart_lld.c
endif
#ifneq ($(findstring HAL_USE_UART TRUE,$(HALCONF)),)
#PLATFORMSRC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USARTv3/hal_uart_lld.c
#endif
else
PLATFORMSRC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USARTv3/hal_serial_lld.c
#PLATFORMSRC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USARTv3/hal_serial_lld.c
PLATFORMSRC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USARTv3/hal_sio_lld.c
PLATFORMSRC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USARTv3/hal_uart_lld.c
#PLATFORMSRC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USARTv3/hal_uart_lld.c
endif
PLATFORMINC += $(CHIBIOS)/os/xhal/ports/STM32/LLD/USART \

1043
os/xhal/ports/STM32/LLD/USARTv3/hal_serial_lld.c
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File diff suppressed because it is too large Load Diff

704
os/xhal/ports/STM32/LLD/USARTv3/hal_serial_lld.h
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@ -1,704 +0,0 @@
/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file USARTv3/hal_serial_lld.h
* @brief STM32 low level serial driver header.
*
* @addtogroup SERIAL
* @{
*/
#ifndef HAL_SERIAL_LLD_H
#define HAL_SERIAL_LLD_H
#if HAL_USE_SERIAL || defined(__DOXYGEN__)
#include "stm32_usart.h"
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
/**
* @brief Advanced buffering support switch.
* @details This constants enables the advanced buffering support in the
* low level driver, the queue buffer is no more part of the
* @p SerialDriver structure, each driver can have a different
* queue size.
*/
#define SERIAL_ADVANCED_BUFFERING_SUPPORT TRUE
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @name Configuration options
* @{
*/
/**
* @brief USART1 driver enable switch.
* @details If set to @p TRUE the support for USART1 is included.
* @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_USART1) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_USART1 FALSE
#endif
/**
* @brief USART2 driver enable switch.
* @details If set to @p TRUE the support for USART2 is included.
* @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_USART2) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_USART2 FALSE
#endif
/**
* @brief USART3 driver enable switch.
* @details If set to @p TRUE the support for USART3 is included.
* @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_USART3) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_USART3 FALSE
#endif
/**
* @brief UART4 driver enable switch.
* @details If set to @p TRUE the support for UART4 is included.
* @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_UART4) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_UART4 FALSE
#endif
/**
* @brief UART5 driver enable switch.
* @details If set to @p TRUE the support for UART5 is included.
* @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_UART5) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_UART5 FALSE
#endif
/**
* @brief USART6 driver enable switch.
* @details If set to @p TRUE the support for USART6 is included.
* @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_USART6) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_USART6 FALSE
#endif
/**
* @brief UART7 driver enable switch.
* @details If set to @p TRUE the support for UART7 is included.
* @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_UART7) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_UART7 FALSE
#endif
/**
* @brief UART8 driver enable switch.
* @details If set to @p TRUE the support for UART8 is included.
* @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_UART8) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_UART8 FALSE
#endif
/**
* @brief UART9 driver enable switch.
* @details If set to @p TRUE the support for UART9 is included.
* @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_UART9) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_UART9 FALSE
#endif
/**
* @brief USART10 driver enable switch.
* @details If set to @p TRUE the support for USART10 is included.
* @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_USART10) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_USART10 FALSE
#endif
/**
* @brief LPUART1 driver enable switch.
* @details If set to @p TRUE the support for LPUART is included.
* @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_LPUART1) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_LPUART1 FALSE
#endif
/**
* @brief USART1 interrupt priority level setting.
*/
#if !defined(STM32_SERIAL_USART1_PRIORITY) || defined(__DOXYGEN__)
#define STM32_SERIAL_USART1_PRIORITY 12
#endif
/**
* @brief USART2 interrupt priority level setting.
*/
#if !defined(STM32_SERIAL_USART2_PRIORITY) || defined(__DOXYGEN__)
#define STM32_SERIAL_USART2_PRIORITY 12
#endif
/**
* @brief USART3 interrupt priority level setting.
*/
#if !defined(STM32_SERIAL_USART3_PRIORITY) || defined(__DOXYGEN__)
#define STM32_SERIAL_USART3_PRIORITY 12
#endif
/**
* @brief UART4 interrupt priority level setting.
*/
#if !defined(STM32_SERIAL_UART4_PRIORITY) || defined(__DOXYGEN__)
#define STM32_SERIAL_UART4_PRIORITY 12
#endif
/**
* @brief UART5 interrupt priority level setting.
*/
#if !defined(STM32_SERIAL_UART5_PRIORITY) || defined(__DOXYGEN__)
#define STM32_SERIAL_UART5_PRIORITY 12
#endif
/**
* @brief USART6 interrupt priority level setting.
*/
#if !defined(STM32_SERIAL_USART6_PRIORITY) || defined(__DOXYGEN__)
#define STM32_SERIAL_USART6_PRIORITY 12
#endif
/**
* @brief UART7 interrupt priority level setting.
*/
#if !defined(STM32_SERIAL_UART7_PRIORITY) || defined(__DOXYGEN__)
#define STM32_SERIAL_UART7_PRIORITY 12
#endif
/**
* @brief UART8 interrupt priority level setting.
*/
#if !defined(STM32_SERIAL_UART8_PRIORITY) || defined(__DOXYGEN__)
#define STM32_SERIAL_UART8_PRIORITY 12
#endif
/**
* @brief UART9 interrupt priority level setting.
*/
#if !defined(STM32_SERIAL_UART9_PRIORITY) || defined(__DOXYGEN__)
#define STM32_SERIAL_UART9_PRIORITY 12
#endif
/**
* @brief USART10 interrupt priority level setting.
*/
#if !defined(STM32_SERIAL_USART10_PRIORITY) || defined(__DOXYGEN__)
#define STM32_SERIAL_USART10_PRIORITY 12
#endif
/**
* @brief LPUART1 interrupt priority level setting.
*/
#if !defined(STM32_SERIAL_LPUART1_PRIORITY) || defined(__DOXYGEN__)
#define STM32_SERIAL_LPUART1_PRIORITY 12
#endif
/**
* @brief Input buffer size for USART1.
*/
#if !defined(STM32_SERIAL_USART1_IN_BUF_SIZE) || defined(__DOXYGEN__)
#define STM32_SERIAL_USART1_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
#endif
/**
* @brief Output buffer size for USART1.
*/
#if !defined(STM32_SERIAL_USART1_OUT_BUF_SIZE) || defined(__DOXYGEN__)
#define STM32_SERIAL_USART1_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
#endif
/**
* @brief Input buffer size for USART2.
*/
#if !defined(STM32_SERIAL_USART2_IN_BUF_SIZE) || defined(__DOXYGEN__)
#define STM32_SERIAL_USART2_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
#endif
/**
* @brief Output buffer size for USART2.
*/
#if !defined(STM32_SERIAL_USART2_OUT_BUF_SIZE) || defined(__DOXYGEN__)
#define STM32_SERIAL_USART2_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
#endif
/**
* @brief Input buffer size for USART3.
*/
#if !defined(STM32_SERIAL_USART3_IN_BUF_SIZE) || defined(__DOXYGEN__)
#define STM32_SERIAL_USART3_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
#endif
/**
* @brief Output buffer size for USART3.
*/
#if !defined(STM32_SERIAL_USART3_OUT_BUF_SIZE) || defined(__DOXYGEN__)
#define STM32_SERIAL_USART3_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
#endif
/**
* @brief Input buffer size for UART4.
*/
#if !defined(STM32_SERIAL_UART4_IN_BUF_SIZE) || defined(__DOXYGEN__)
#define STM32_SERIAL_UART4_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
#endif
/**
* @brief Output buffer size for UART4.
*/
#if !defined(STM32_SERIAL_UART4_OUT_BUF_SIZE) || defined(__DOXYGEN__)
#define STM32_SERIAL_UART4_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
#endif
/**
* @brief Input buffer size for UART5.
*/
#if !defined(STM32_SERIAL_UART5_IN_BUF_SIZE) || defined(__DOXYGEN__)
#define STM32_SERIAL_UART5_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
#endif
/**
* @brief Output buffer size for UART5.
*/
#if !defined(STM32_SERIAL_UART5_OUT_BUF_SIZE) || defined(__DOXYGEN__)
#define STM32_SERIAL_UART5_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
#endif
/**
* @brief Input buffer size for USART6.
*/
#if !defined(STM32_SERIAL_USART6_IN_BUF_SIZE) || defined(__DOXYGEN__)
#define STM32_SERIAL_USART6_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
#endif
/**
* @brief Output buffer size for USART6.
*/
#if !defined(STM32_SERIAL_USART6_OUT_BUF_SIZE) || defined(__DOXYGEN__)
#define STM32_SERIAL_USART6_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
#endif
/**
* @brief Input buffer size for UART7.
*/
#if !defined(STM32_SERIAL_UART7_IN_BUF_SIZE) || defined(__DOXYGEN__)
#define STM32_SERIAL_UART7_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
#endif
/**
* @brief Output buffer size for UART7.
*/
#if !defined(STM32_SERIAL_UART7_OUT_BUF_SIZE) || defined(__DOXYGEN__)
#define STM32_SERIAL_UART7_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
#endif
/**
* @brief Input buffer size for UART8.
*/
#if !defined(STM32_SERIAL_UART8_IN_BUF_SIZE) || defined(__DOXYGEN__)
#define STM32_SERIAL_UART8_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
#endif
/**
* @brief Output buffer size for UART8.
*/
#if !defined(STM32_SERIAL_UART8_OUT_BUF_SIZE) || defined(__DOXYGEN__)
#define STM32_SERIAL_UART8_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
#endif
/**
* @brief Input buffer size for UART9.
*/
#if !defined(STM32_SERIAL_UART9_IN_BUF_SIZE) || defined(__DOXYGEN__)
#define STM32_SERIAL_UART9_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
#endif
/**
* @brief Output buffer size for UART9.
*/
#if !defined(STM32_SERIAL_UART9_OUT_BUF_SIZE) || defined(__DOXYGEN__)
#define STM32_SERIAL_UART9_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
#endif
/**
* @brief Input buffer size for USART10.
*/
#if !defined(STM32_SERIAL_USART10_IN_BUF_SIZE) || defined(__DOXYGEN__)
#define STM32_SERIAL_USART10_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
#endif
/**
* @brief Output buffer size for USART10.
*/
#if !defined(STM32_SERIAL_USART10_OUT_BUF_SIZE) || defined(__DOXYGEN__)
#define STM32_SERIAL_USART10_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
#endif
/**
* @brief Input buffer size for LPUART1.
*/
#if !defined(STM32_SERIAL_LPUART1_IN_BUF_SIZE) || defined(__DOXYGEN__)
#define STM32_SERIAL_LPUART1_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
#endif
/**
* @brief Output buffer size for LPUART1.
*/
#if !defined(STM32_SERIAL_LPUART1_OUT_BUF_SIZE) || defined(__DOXYGEN__)
#define STM32_SERIAL_LPUART1_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
#endif
/** @} */
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
#if STM32_SERIAL_USE_USART1 && !STM32_HAS_USART1
#error "USART1 not present in the selected device"
#endif
#if STM32_SERIAL_USE_USART2 && !STM32_HAS_USART2
#error "USART2 not present in the selected device"
#endif
#if STM32_SERIAL_USE_USART3 && !STM32_HAS_USART3
#error "USART3 not present in the selected device"
#endif
#if STM32_SERIAL_USE_UART4 && !STM32_HAS_UART4
#error "UART4 not present in the selected device"
#endif
#if STM32_SERIAL_USE_UART5 && !STM32_HAS_UART5
#error "UART5 not present in the selected device"
#endif
#if STM32_SERIAL_USE_USART6 && !STM32_HAS_USART6
#error "USART6 not present in the selected device"
#endif
#if STM32_SERIAL_USE_UART7 && !STM32_HAS_UART7
#error "UART7 not present in the selected device"
#endif
#if STM32_SERIAL_USE_UART8 && !STM32_HAS_UART8
#error "UART8 not present in the selected device"
#endif
#if STM32_SERIAL_USE_UART9 && !STM32_HAS_UART9
#error "UART9 not present in the selected device"
#endif
#if STM32_SERIAL_USE_USART10 && !STM32_HAS_USART10
#error "USART10 not present in the selected device"
#endif
#if STM32_SERIAL_USE_LPUART1 && !STM32_HAS_LPUART1
#error "LPUART1 not present in the selected device"
#endif
#if !STM32_SERIAL_USE_USART1 && !STM32_SERIAL_USE_USART2 && \
!STM32_SERIAL_USE_USART3 && !STM32_SERIAL_USE_UART4 && \
!STM32_SERIAL_USE_UART5 && !STM32_SERIAL_USE_USART6 && \
!STM32_SERIAL_USE_UART7 && !STM32_SERIAL_USE_UART8 && \
!STM32_SERIAL_USE_UART9 && !STM32_SERIAL_USE_USART10 && \
!STM32_SERIAL_USE_LPUART1
#error "SERIAL driver activated but no USART/UART peripheral assigned"
#endif
#if !defined(STM32_USART1_SUPPRESS_ISR) && \
STM32_SERIAL_USE_USART1 && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART1_PRIORITY)
#error "Invalid IRQ priority assigned to USART1"
#endif
#if !defined(STM32_USART2_SUPPRESS_ISR) && \
STM32_SERIAL_USE_USART2 && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART2_PRIORITY)
#error "Invalid IRQ priority assigned to USART2"
#endif
#if !defined(STM32_USART3_SUPPRESS_ISR) && \
STM32_SERIAL_USE_USART3 && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART3_PRIORITY)
#error "Invalid IRQ priority assigned to USART3"
#endif
#if !defined(STM32_UART4_SUPPRESS_ISR) && \
STM32_SERIAL_USE_UART4 && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_UART4_PRIORITY)
#error "Invalid IRQ priority assigned to UART4"
#endif
#if !defined(STM32_UART5_SUPPRESS_ISR) && \
STM32_SERIAL_USE_UART5 && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_UART5_PRIORITY)
#error "Invalid IRQ priority assigned to UART5"
#endif
#if !defined(STM32_USART6_SUPPRESS_ISR) && \
STM32_SERIAL_USE_USART6 && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART6_PRIORITY)
#error "Invalid IRQ priority assigned to USART6"
#endif
#if !defined(STM32_UART7_SUPPRESS_ISR) && \
STM32_SERIAL_USE_UART7 && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_UART7_PRIORITY)
#error "Invalid IRQ priority assigned to UART7"
#endif
#if !defined(STM32_UART8_SUPPRESS_ISR) && \
STM32_SERIAL_USE_UART8 && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_UART8_PRIORITY)
#error "Invalid IRQ priority assigned to UART8"
#endif
#if !defined(STM32_UART9_SUPPRESS_ISR) && \
STM32_SERIAL_USE_UART9 && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_UART9_PRIORITY)
#error "Invalid IRQ priority assigned to UART9"
#endif
#if !defined(STM32_USART10_SUPPRESS_ISR) && \
STM32_SERIAL_USE_USART10 && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART10_PRIORITY)
#error "Invalid IRQ priority assigned to USART10"
#endif
#if !defined(STM32_LPUART1_SUPPRESS_ISR) && \
STM32_SERIAL_USE_LPUART1 && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_LPUART1_PRIORITY)
#error "Invalid IRQ priority assigned to LPUART1"
#endif
/* Checks on allocation of USARTx units.*/
#if STM32_SERIAL_USE_USART1
#if defined(STM32_USART1_IS_USED)
#error "SD1 requires USART1 but it is already used"
#else
#define STM32_USART1_IS_USED
#endif
#endif
#if STM32_SERIAL_USE_USART2
#if defined(STM32_USART2_IS_USED)
#error "SD2 requires USART2 but it is already used"
#else
#define STM32_USART2_IS_USED
#endif
#endif
#if STM32_SERIAL_USE_USART3
#if defined(STM32_USART3_IS_USED)
#error "SD3 requires USART3 but it is already used"
#else
#define STM32_USART3_IS_USED
#endif
#endif
#if STM32_SERIAL_USE_UART4
#if defined(STM32_UART4_IS_USED)
#error "SD4 requires UART4 but it is already used"
#else
#define STM32_UART4_IS_USED
#endif
#endif
#if STM32_SERIAL_USE_UART5
#if defined(STM32_UART5_IS_USED)
#error "SD5 requires UART5 but it is already used"
#else
#define STM32_UART5_IS_USED
#endif
#endif
#if STM32_SERIAL_USE_USART6
#if defined(STM32_USART6_IS_USED)
#error "SD6 requires USART6 but it is already used"
#else
#define STM32_USART6_IS_USED
#endif
#endif
#if STM32_SERIAL_USE_UART7
#if defined(STM32_UART7_IS_USED)
#error "SD7 requires UART7 but it is already used"
#else
#define STM32_UART7_IS_USED
#endif
#endif
#if STM32_SERIAL_USE_UART8
#if defined(STM32_UART8_IS_USED)
#error "SD8 requires UART8 but it is already used"
#else
#define STM32_UART8_IS_USED
#endif
#endif
#if STM32_SERIAL_USE_UART9
#if defined(STM32_UART9_IS_USED)
#error "SD9 requires UART9 but it is already used"
#else
#define STM32_UART9_IS_USED
#endif
#endif
#if STM32_SERIAL_USE_USART10
#if defined(STM32_USART10_IS_USED)
#error "SD10 requires USART10 but it is already used"
#else
#define STM32_USART10_IS_USED
#endif
#endif
#if STM32_SERIAL_USE_LPUART1
#if defined(STM32_LPUART1_IS_USED)
#error "LPSD1 requires LPUART1 but it is already used"
#else
#define STM32_LPUART1_IS_USED
#endif
#endif
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/**
* @brief STM32 Serial Driver configuration structure.
* @details An instance of this structure must be passed to @p sdStart()
* in order to configure and start a serial driver operations.
* @note This structure content is architecture dependent, each driver
* implementation defines its own version and the custom static
* initializers.
*/
typedef struct hal_serial_config {
/**
* @brief Bit rate.
*/
uint32_t speed;
/* End of the mandatory fields.*/
/**
* @brief Initialization value for the CR1 register.
*/
uint32_t cr1;
/**
* @brief Initialization value for the CR2 register.
*/
uint32_t cr2;
/**
* @brief Initialization value for the CR3 register.
*/
uint32_t cr3;
} SerialConfig;
/**
* @brief @p SerialDriver specific data.
*/
#define _serial_driver_data \
_base_asynchronous_channel_data \
/* Driver state.*/ \
sdstate_t state; \
/* Input queue.*/ \
input_queue_t iqueue; \
/* Output queue.*/ \
output_queue_t oqueue; \
/* End of the mandatory fields.*/ \
/* Pointer to the USART registers block.*/ \
USART_TypeDef *usart; \
/* Clock frequency for the associated USART/UART.*/ \
uint32_t clock; \
/* Mask to be applied on received frames.*/ \
uint8_t rxmask;
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#if STM32_SERIAL_USE_USART1 && !defined(__DOXYGEN__)
extern SerialDriver SD1;
#endif
#if STM32_SERIAL_USE_USART2 && !defined(__DOXYGEN__)
extern SerialDriver SD2;
#endif
#if STM32_SERIAL_USE_USART3 && !defined(__DOXYGEN__)
extern SerialDriver SD3;
#endif
#if STM32_SERIAL_USE_UART4 && !defined(__DOXYGEN__)
extern SerialDriver SD4;
#endif
#if STM32_SERIAL_USE_UART5 && !defined(__DOXYGEN__)
extern SerialDriver SD5;
#endif
#if STM32_SERIAL_USE_USART6 && !defined(__DOXYGEN__)
extern SerialDriver SD6;
#endif
#if STM32_SERIAL_USE_UART7 && !defined(__DOXYGEN__)
extern SerialDriver SD7;
#endif
#if STM32_SERIAL_USE_UART8 && !defined(__DOXYGEN__)
extern SerialDriver SD8;
#endif
#if STM32_SERIAL_USE_UART9 && !defined(__DOXYGEN__)
extern SerialDriver SD9;
#endif
#if STM32_SERIAL_USE_USART10 && !defined(__DOXYGEN__)
extern SerialDriver SD10;
#endif
#if STM32_SERIAL_USE_LPUART1 && !defined(__DOXYGEN__)
extern SerialDriver LPSD1;
#endif
#ifdef __cplusplus
extern "C" {
#endif
void sd_lld_init(void);
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config);
void sd_lld_stop(SerialDriver *sdp);
void sd_lld_serve_interrupt(SerialDriver *sdp);
#ifdef __cplusplus
}
#endif
#endif /* HAL_USE_SERIAL */
#endif /* HAL_SERIAL_LLD_H */
/** @} */

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os/xhal/ports/STM32/LLD/USARTv3/hal_uart_lld.c
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1062
os/xhal/ports/STM32/LLD/USARTv3/hal_uart_lld.h
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2
os/xhal/src/hal_base_driver.c
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@ -219,7 +219,7 @@ void *__drv_objinit_impl(void *ip, const void *vmt) {
/* Initialization code.*/
self->state = HAL_DRV_STATE_STOP;
self->owner = NULL;
self->arg = NULL;
osalMutexObjectInit(&self->mutex);
#if HAL_USE_REGISTRY == TRUE
self->id = 0U;