From 07382282ba9ca34ea8e4421e96252b4b01986b1c Mon Sep 17 00:00:00 2001
From: Giovanni Di Sirio <gdisirio@gmail.com>
Date: Thu, 8 Dec 2022 14:38:40 +0000
Subject: [PATCH] Improved checks on PPL1.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@15864 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
---
 os/hal/ports/STM32/STM32H7xx/hal_lld_type2.h | 6 +++---
 os/hal/ports/STM32/STM32H7xx/hal_lld_type3.h | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/os/hal/ports/STM32/STM32H7xx/hal_lld_type2.h b/os/hal/ports/STM32/STM32H7xx/hal_lld_type2.h
index 77c388843..ce097dffd 100644
--- a/os/hal/ports/STM32/STM32H7xx/hal_lld_type2.h
+++ b/os/hal/ports/STM32/STM32H7xx/hal_lld_type2.h
@@ -1660,9 +1660,9 @@
 /**
  * @brief   PLL1 DIVP field.
  */
-#if ((STM32_PLL1_DIVP_VALUE >= 1) && (STM32_PLL1_DIVP_VALUE <= 128) &&      \
-     (STM32_PLL1_DIVP_VALUE != 3U)) || defined(__DOXYGEN__)
-#define STM32_PLL1_DIVP             ((STM32_PLL1_DIVP_VALUE - 1U) << 9U)
+#if ((STM32_PLL1_DIVP_VALUE >= 2) && (STM32_PLL1_DIVP_VALUE <= 128) &&      \
+    ((STM32_PLL1_DIVP_VALUE & 1) == 0)) || defined(__DOXYGEN__)
+#define STM32_PLL1_DIVP             ((STM32_PLL1_DIVP_VALUE - 1U) << RCC_PLL1DIVR_P1_Pos)
 #else
 #error "invalid STM32_PLL1_DIVP_VALUE value specified"
 #endif
diff --git a/os/hal/ports/STM32/STM32H7xx/hal_lld_type3.h b/os/hal/ports/STM32/STM32H7xx/hal_lld_type3.h
index dcb8a128b..959e42018 100644
--- a/os/hal/ports/STM32/STM32H7xx/hal_lld_type3.h
+++ b/os/hal/ports/STM32/STM32H7xx/hal_lld_type3.h
@@ -1726,7 +1726,7 @@
  * @brief   PLL1 DIVP field.
  */
 #if ((STM32_PLL1_DIVP_VALUE >= 2) && (STM32_PLL1_DIVP_VALUE <= 128) &&      \
-    ((STM32_PLL1_DIVP_VALUE & 0x1) == 0x0)) || defined(__DOXYGEN__)
+    ((STM32_PLL1_DIVP_VALUE & 1) == 0)) || defined(__DOXYGEN__)
 #define STM32_PLL1_DIVP             ((STM32_PLL1_DIVP_VALUE - 1U) << RCC_PLL1DIVR_P1_Pos)
 #else
 #error "invalid STM32_PLL1_DIVP_VALUE value specified"