Fix TIM register layout difference for STM32G4 series (bug #1148)
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14076 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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@ -515,11 +515,25 @@ typedef struct {
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volatile uint32_t RCR;
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volatile uint32_t CCR[4];
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volatile uint32_t BDTR;
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#if defined(STM32G4)
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volatile uint32_t CCXR[2];
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volatile uint32_t CCMR3;
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volatile uint32_t DTR2;
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volatile uint32_t ECR;
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volatile uint32_t TISEL;
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volatile uint32_t AF1;
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volatile uint32_t AF2;
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volatile uint32_t OR;
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volatile uint32_t RESERVED0[220];
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volatile uint32_t DCR;
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volatile uint32_t DMAR;
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#else
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volatile uint32_t DCR;
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volatile uint32_t DMAR;
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volatile uint32_t OR;
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volatile uint32_t CCMR3;
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volatile uint32_t CCXR[2];
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#endif
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} stm32_tim_t;
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/**
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@ -128,11 +128,13 @@
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MEMS Accelerometers.
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- NEW: Safer messages mechanism for sandboxes (to be backported to 20.3.1).
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- NEW: Added latency measurement test application.
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- FIX: Fixed TIM register layout difference for STM32G4 series (bug #1148)
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(backported to 20.3.4).
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- FIX: Fixed STM32 QUADSPI driver problem when used with DMAv2 (bug #1147)
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(backported to 20.3.4)
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(backported to 20.3.4).
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- FIX: Fixed incorrect IRQ vector for PVM (bug #1146)
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(backported to 20.3.4)
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- FIX: Fixed missing STM32F765 from registry (bug #1145)
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(backported to 20.3.4).
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- FIX: Fixed missing STM32F765 from registry (bug #1145).
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(backported to 20.3.3)(backported to 19.1.5).
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- FIX: Fixed wrong macro check on STM32 SPIv3 (bug #1144)
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(backported to 20.3.3)(backported to 19.1.5).
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