Fixed bug #1197.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14921 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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@ -1371,7 +1371,7 @@
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#endif
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#endif
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/**
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/**
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* @brief PLLs input clock frequency.
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* @brief PLL input clock frequency.
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*/
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*/
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#if (STM32_PLLSRC == STM32_PLLSRC_HSE) || defined(__DOXYGEN__)
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#if (STM32_PLLSRC == STM32_PLLSRC_HSE) || defined(__DOXYGEN__)
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#define STM32_PLLCLKIN (STM32_HSECLK / STM32_PLLM_VALUE)
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#define STM32_PLLCLKIN (STM32_HSECLK / STM32_PLLM_VALUE)
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@ -1471,6 +1471,44 @@
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#include "stm32_apb1.inc"
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#include "stm32_apb1.inc"
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#include "stm32_apb2.inc"
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#include "stm32_apb2.inc"
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/**
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* @brief PLLSAI1 input clock frequency.
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*/
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#if (STM32_PLLSRC == STM32_PLLSRC_HSE) || defined(__DOXYGEN__)
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#define STM32_PLLSAI1CLKIN (STM32_HSECLK / STM32_PLLSAI1M_VALUE)
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#elif STM32_PLLSRC == STM32_PLLSRC_MSI
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#define STM32_PLLSAI1CLKIN (STM32_MSICLK / STM32_PLLSAI1M_VALUE)
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#elif STM32_PLLSRC == STM32_PLLSRC_HSI16
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#define STM32_PLLSAI1CLKIN (STM32_HSI16CLK / STM32_PLLSAI1M_VALUE)
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#elif STM32_PLLSRC == STM32_PLLSRC_NOCLOCK
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#define STM32_PLLSAI1CLKIN 0
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#else
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#error "invalid STM32_PLLSRC value specified"
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#endif
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/**
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* @brief PLLSAI2 input clock frequency.
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*/
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#if (STM32_PLLSRC == STM32_PLLSRC_HSE) || defined(__DOXYGEN__)
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#define STM32_PLLSAI2CLKIN (STM32_HSECLK / STM32_PLLSAI2M_VALUE)
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#elif STM32_PLLSRC == STM32_PLLSRC_MSI
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#define STM32_PLLSAI2CLKIN (STM32_MSICLK / STM32_PLLSAI2M_VALUE)
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#elif STM32_PLLSRC == STM32_PLLSRC_HSI16
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#define STM32_PLLSAI2CLKIN (STM32_HSI16CLK / STM32_PLLSAI2M_VALUE)
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#elif STM32_PLLSRC == STM32_PLLSRC_NOCLOCK
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#define STM32_PLLSAI2CLKIN 0
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#else
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#error "invalid STM32_PLLSRC value specified"
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#endif
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/*
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/*
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* PLLSAI1 enable check.
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* PLLSAI1 enable check.
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*/
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*/
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@ -1561,10 +1599,7 @@
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*/
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*/
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#define STM32_PLLSAI2REN (1 << 24)
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#define STM32_PLLSAI2REN (1 << 24)
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/* Inclusion of PLLSAI-related checks and calculations, all PLLs share the
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/* Inclusion of PLLSAI-related checks and calculations.*/
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same clock source so enforcing this condition.*/
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#define STM32_PLLSAI1CLKIN STM32_PLLCLKIN
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#define STM32_PLLSAI2CLKIN STM32_PLLCLKIN
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#include <stm32_pllsai1.inc>
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#include <stm32_pllsai1.inc>
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#include <stm32_pllsai2.inc>
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#include <stm32_pllsai2.inc>
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@ -84,6 +84,8 @@
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- NEW: EFL driver and demo for STM32F3xx.
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- NEW: EFL driver and demo for STM32F3xx.
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- NEW: New unit test subsystem under /os/test. Now it is officially
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- NEW: New unit test subsystem under /os/test. Now it is officially
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ChibiOS/TEST.
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ChibiOS/TEST.
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- FIX: Fixed PLLSA1x input frequency calculated incorrectly (bug #1197)
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(TBP to 21.6.1).
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- FIX: Fixed ARMCMx port, MPU not enabled when PORT_ENABLE_GUARD_PAGES is set
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- FIX: Fixed ARMCMx port, MPU not enabled when PORT_ENABLE_GUARD_PAGES is set
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(bug #1195)(backported to 20.3.4)(TBP to 21.6.1).
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(bug #1195)(backported to 20.3.4)(TBP to 21.6.1).
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- FIX: Fixed removed incorrect ADCv4 checks for MONEN (bug #1194)
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- FIX: Fixed removed incorrect ADCv4 checks for MONEN (bug #1194)
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