From 0a108b7253153eb9ddc3513a7f5a82f544be38d2 Mon Sep 17 00:00:00 2001
From: Andrey Gusakov <dron0gus@gmail.com>
Date: Sun, 14 Jan 2024 23:17:18 +0300
Subject: [PATCH] STM32: PWM: set 32bit mode bit in CR1 register for Artery
 devices

TODO: add same fix for other TIM drivers
---
 os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c | 17 ++++++++++++++---
 os/hal/ports/STM32/LLD/TIMv1/stm32_tim.h   |  3 +++
 2 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c b/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c
index eb6bebc7e..8a68f94a5 100644
--- a/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c
+++ b/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c
@@ -582,9 +582,16 @@ void pwm_lld_init(void) {
  * @notapi
  */
 void pwm_lld_start(PWMDriver *pwmp) {
+  uint32_t cr1 = 0;
   uint32_t psc;
   uint32_t ccer;
 
+#if defined(AT32F435xx) || defined(AT32F437xx)
+  /* always enable 32 bit mode for Artery devices for compatibility with STM32
+   * Actually only TIM2 and TIM5 have this bit and support 32 bit mode */
+  cr1 = AT32_TIM_CR1_PMEN;
+#endif
+
   if (pwmp->state == PWM_STOP) {
     /* Clock activation and timer reset.*/
 #if STM32_PWM_USE_TIM1
@@ -823,6 +830,8 @@ void pwm_lld_start(PWMDriver *pwmp) {
     }
 #endif
 
+    /* Set 32-bit mode in case of Artery */
+    pwmp->tim->CR1    = cr1;
     /* All channels configured in PWM1 mode with preload enabled and will
        stay that way until the driver is stopped.*/
     pwmp->tim->CCMR1 = STM32_TIM_CCMR1_OC1M(6) | STM32_TIM_CCMR1_OC1PE |
@@ -836,7 +845,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
   }
   else {
     /* Driver re-configuration scenario, it must be stopped first.*/
-    pwmp->tim->CR1    = 0;                  /* Timer disabled.              */
+    pwmp->tim->CR1    = cr1;                /* Timer disabled.              */
     pwmp->tim->CCR[0] = 0;                  /* Comparator 1 disabled.       */
     pwmp->tim->CCR[1] = 0;                  /* Comparator 2 disabled.       */
     pwmp->tim->CCR[2] = 0;                  /* Comparator 3 disabled.       */
@@ -979,8 +988,10 @@ void pwm_lld_start(PWMDriver *pwmp) {
 #endif
 #endif
   /* Timer configured and started.*/
-  pwmp->tim->CR1   = STM32_TIM_CR1_ARPE | STM32_TIM_CR1_URS |
-                     STM32_TIM_CR1_CEN;
+
+  cr1 |= STM32_TIM_CR1_ARPE | STM32_TIM_CR1_URS |
+         STM32_TIM_CR1_CEN;
+  pwmp->tim->CR1 = cr1;
 }
 
 /**
diff --git a/os/hal/ports/STM32/LLD/TIMv1/stm32_tim.h b/os/hal/ports/STM32/LLD/TIMv1/stm32_tim.h
index 81d8c094e..05316d4bb 100644
--- a/os/hal/ports/STM32/LLD/TIMv1/stm32_tim.h
+++ b/os/hal/ports/STM32/LLD/TIMv1/stm32_tim.h
@@ -48,6 +48,9 @@
 #define STM32_TIM_CR1_CKD_MASK              (3U << 8)
 #define STM32_TIM_CR1_CKD(n)                ((n) << 8)
 
+/* Plus Mode Enable - 32 bit mode timer */
+#define AT32_TIM_CR1_PMEN                   (1U << 10)
+
 #define STM32_TIM_CR1_UIFREMAP              (1U << 11)
 /** @} */