Implemented support for HSI16 divider on STM32L0xx.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10223 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -41,6 +41,7 @@
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_HSI16_ENABLED TRUE
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#define STM32_HSI16_DIVIDER_ENABLED FALSE
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#define STM32_LSI_ENABLED TRUE
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#define STM32_HSE_ENABLED FALSE
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#define STM32_LSE_ENABLED FALSE
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@ -41,6 +41,7 @@
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_HSI16_ENABLED TRUE
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#define STM32_HSI16_DIVIDER_ENABLED FALSE
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#define STM32_LSI_ENABLED TRUE
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#define STM32_HSE_ENABLED FALSE
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#define STM32_LSE_ENABLED FALSE
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@ -41,6 +41,7 @@
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_HSI16_ENABLED TRUE
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#define STM32_HSI16_DIVIDER_ENABLED FALSE
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#define STM32_LSI_ENABLED TRUE
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#define STM32_HSE_ENABLED TRUE
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#define STM32_LSE_ENABLED FALSE
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@ -41,6 +41,7 @@
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_HSI16_ENABLED TRUE
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#define STM32_HSI16_DIVIDER_ENABLED FALSE
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#define STM32_LSI_ENABLED FALSE
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#define STM32_HSE_ENABLED FALSE
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#define STM32_LSE_ENABLED TRUE
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@ -41,6 +41,7 @@
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_HSI16_ENABLED TRUE
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#define STM32_HSI16_DIVIDER_ENABLED FALSE
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#define STM32_LSI_ENABLED FALSE
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#define STM32_HSE_ENABLED FALSE
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#define STM32_LSE_ENABLED TRUE
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@ -208,6 +208,12 @@ void stm32_clock_init(void) {
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RCC->CR |= RCC_CR_HSION;
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while ((RCC->CR & RCC_CR_HSIRDY) == 0)
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; /* Waits until HSI16 is stable. */
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#if STM32_HSI16_DIVIDER_ENABLED
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RCC->CR |= RCC_CR_HSIDIVEN;
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while ((RCC->CR & RCC_CR_HSIDIVF) == 0)
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;
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#endif
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#endif
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#if STM32_HSE_ENABLED
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@ -324,6 +324,13 @@
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#define STM32_HSI16_ENABLED TRUE
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#endif
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/**
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* @brief Enables or disables the HSI16 clock divider.
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*/
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#if !defined(STM32_HSI16_DIVIDER_ENABLED) || defined(__DOXYGEN__)
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#define STM32_HSI16_DIVIDER_ENABLED FALSE
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#endif
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/**
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* @brief Enables or disables the LSI clock source.
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*/
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@ -675,6 +682,15 @@
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#endif /* !STM32_HSI16_ENABLED */
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/*
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* @brief Divided HSI16 clock.
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*/
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#if STM32_HSI16_DIVIDER_ENABLED || defined(__DOXYGEN__)
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#define STM32_HSI16DIVCLK (STM32_HSI16CLK / 4)
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#else
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#define STM32_HSI16DIVCLK STM32_HSI16CLK
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#endif
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/* HSE related checks.*/
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#if STM32_HSE_ENABLED
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#if STM32_HSECLK == 0
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@ -798,7 +814,7 @@
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#if (STM32_PLLSRC == STM32_PLLSRC_HSE) || defined(__DOXYGEN__)
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#define STM32_PLLCLKIN STM32_HSECLK
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#elif STM32_PLLSRC == STM32_PLLSRC_HSI16
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#define STM32_PLLCLKIN STM32_HSI16CLK
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#define STM32_PLLCLKIN STM32_HSI16DIVCLK
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#else
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#error "invalid STM32_PLLSRC value specified"
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#endif
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@ -954,7 +970,7 @@
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#elif STM32_MCOSEL == STM32_MCOSEL_SYSCLK
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#define STM32_MCODIVCLK STM32_SYSCLK
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#elif STM32_MCOSEL == STM32_MCOSEL_HSI16
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#define STM32_MCODIVCLK STM32_HSI16CLK
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#define STM32_MCODIVCLK STM32_HSI16DIVCLK
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#elif STM32_MCOSEL == STM32_MCOSEL_MSI
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#define STM32_MCODIVCLK STM32_MSICLK
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#elif STM32_MCOSEL == STM32_MCOSEL_HSE
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@ -1026,7 +1042,7 @@
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#elif STM32_USART1SEL == STM32_USART1SEL_SYSCLK
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#define STM32_USART1CLK STM32_SYSCLK
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#elif STM32_USART1SEL == STM32_USART1SEL_HSI16
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#define STM32_USART1CLK STM32_HSI16CLK
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#define STM32_USART1CLK STM32_HSI16DIVCLK
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#elif STM32_USART1SEL == STM32_USART1SEL_LSE
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#define STM32_USART1CLK STM32_LSECLK
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#else
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@ -1041,7 +1057,7 @@
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#elif STM32_USART2SEL == STM32_USART2SEL_SYSCLK
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#define STM32_USART2CLK STM32_SYSCLK
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#elif STM32_USART2SEL == STM32_USART2SEL_HSI16
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#define STM32_USART2CLK STM32_HSI16CLK
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#define STM32_USART2CLK STM32_HSI16DIVCLK
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#elif STM32_USART2SEL == STM32_USART2SEL_LSE
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#define STM32_USART2CLK STM32_LSECLK
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#else
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@ -1066,7 +1082,7 @@
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#elif STM32_LPUART1SEL == STM32_LPUART1SEL_SYSCLK
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#define STM32_LPUART1CLK STM32_SYSCLK
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#elif STM32_LPUART1SEL == STM32_LPUART1SEL_HSI16
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#define STM32_LPUART1CLK STM32_HSI16CLK
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#define STM32_LPUART1CLK STM32_HSI16DIVCLK
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#elif STM32_LPUART1SEL == STM32_LPUART1SEL_LSE
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#define STM32_LPUART1CLK STM32_LSECLK
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#else
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@ -1081,7 +1097,7 @@
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#elif STM32_I2C1SEL == STM32_I2C1SEL_SYSCLK
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#define STM32_I2C1CLK STM32_SYSCLK
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#elif STM32_I2C1SEL == STM32_I2C1SEL_HSI16
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#define STM32_I2C1CLK STM32_HSI16CLK
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#define STM32_I2C1CLK STM32_HSI16DIVCLK
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#else
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#error "invalid source selected for I2C1 clock"
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#endif
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@ -1094,7 +1110,7 @@
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#elif STM32_LPTIM1SEL == STM32_LPTIM1SEL_LSI
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#define STM32_LPTIM1CLK STM32_LSICLK
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#elif STM32_LPTIM1SEL == STM32_LPTIM1SEL_HSI16
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#define STM32_LPTIM1CLK STM32_HSI16CLK
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#define STM32_LPTIM1CLK STM32_HSI16DIVCLK
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#elif STM32_LPTIM1SEL == STM32_LPTIM1SEL_LSE
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#define STM32_LPTIM1CLK STM32_LSECLK
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#else
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_HSI16_ENABLED TRUE
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#define STM32_HSI16_DIVIDER_ENABLED FALSE
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#define STM32_LSI_ENABLED FALSE
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#define STM32_HSE_ENABLED FALSE
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#define STM32_LSE_ENABLED TRUE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_HSI16_ENABLED TRUE
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#define STM32_HSI16_DIVIDER_ENABLED FALSE
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#define STM32_LSI_ENABLED FALSE
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#define STM32_HSE_ENABLED FALSE
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#define STM32_LSE_ENABLED TRUE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_HSI16_ENABLED TRUE
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#define STM32_HSI16_DIVIDER_ENABLED FALSE
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#define STM32_LSI_ENABLED FALSE
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#define STM32_HSE_ENABLED FALSE
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#define STM32_LSE_ENABLED TRUE
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