diff --git a/os/hal/ports/STM32/LLD/SPIv3/hal_spi_v2_lld.c b/os/hal/ports/STM32/LLD/SPIv3/hal_spi_v2_lld.c
index 4db485a87..790ba98d0 100644
--- a/os/hal/ports/STM32/LLD/SPIv3/hal_spi_v2_lld.c
+++ b/os/hal/ports/STM32/LLD/SPIv3/hal_spi_v2_lld.c
@@ -700,6 +700,9 @@ msg_t spi_lld_start(SPIDriver *spip) {
uint32_t dsize;
msg_t msg;
+ /* Resetting TX pattern source.*/
+ spip->txsource = (uint32_t)STM32_SPI_FILLER_PATTERN;
+
/* If in stopped state then enables the SPI and DMA clocks.*/
if (spip->state == SPI_STOP) {
if (false) {
diff --git a/testhal/STM32/multi/SPI/.cproject b/testhal/STM32/multi/SPI/.cproject
index 2cfaf18c0..5fbd1f843 100644
--- a/testhal/STM32/multi/SPI/.cproject
+++ b/testhal/STM32/multi/SPI/.cproject
@@ -458,19 +458,37 @@
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
+
diff --git a/testhal/STM32/multi/SPI/cfg/stm32h755_nucleo144/portab.c b/testhal/STM32/multi/SPI/cfg/stm32h755_nucleo144/portab.c
index b01382d34..4ec7e87e8 100644
--- a/testhal/STM32/multi/SPI/cfg/stm32h755_nucleo144/portab.c
+++ b/testhal/STM32/multi/SPI/cfg/stm32h755_nucleo144/portab.c
@@ -44,8 +44,8 @@ const SPIConfig c_spicfg = {
.circular = true,
.data_cb = spi_circular_cb,
.error_cb = spi_error_cb,
- .ssport = GPIOD,
- .sspad = 14U,
+ .ssport = GPIOA,
+ .sspad = 4U,
.cfg1 = SPI_CFG1_MBR_DIV8 | SPI_CFG1_DSIZE_VALUE(7),
.cfg2 = 0U
};
@@ -57,8 +57,8 @@ const SPIConfig hs_spicfg = {
.circular = false,
.data_cb = NULL,
.error_cb = spi_error_cb,
- .ssport = GPIOD,
- .sspad = 14U,
+ .ssport = GPIOA,
+ .sspad = 4U,
.cfg1 = SPI_CFG1_MBR_DIV8 | SPI_CFG1_DSIZE_VALUE(7),
.cfg2 = 0U
};
@@ -70,8 +70,8 @@ const SPIConfig ls_spicfg = {
.circular = false,
.data_cb = NULL,
.error_cb = spi_error_cb,
- .ssport = GPIOD,
- .sspad = 14U,
+ .ssport = GPIOA,
+ .sspad = 4U,
.cfg1 = SPI_CFG1_MBR_DIV128 | SPI_CFG1_DSIZE_VALUE(7),
.cfg2 = 0U
};
@@ -97,11 +97,15 @@ void portab_setup(void) {
/*
* SPI1 I/O pins setup.
*/
- palSetPadMode(GPIOA, 5, PAL_MODE_ALTERNATE(5) | PAL_STM32_OSPEED_HIGHEST);
- palSetPadMode(GPIOA, 6, PAL_MODE_ALTERNATE(5) | PAL_STM32_OSPEED_HIGHEST);
- palSetPadMode(GPIOB, 5, PAL_MODE_ALTERNATE(5) | PAL_STM32_OSPEED_HIGHEST);
- palSetPadMode(GPIOD, 14, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
- palSetPad(GPIOD, 14);
+ palSetPadMode(GPIOA, 5, PAL_MODE_ALTERNATE(5) |
+ PAL_STM32_OSPEED_HIGHEST); /* SPI1 SCK. */
+ palSetPadMode(GPIOA, 6, PAL_MODE_ALTERNATE(5) |
+ PAL_STM32_OSPEED_HIGHEST); /* SPI1 MISO. */
+ palSetPadMode(GPIOB, 5, PAL_MODE_ALTERNATE(5) |
+ PAL_STM32_OSPEED_HIGHEST); /* SPI1 MOSI. */
+ palSetPadMode(GPIOA, 4, PAL_MODE_OUTPUT_PUSHPULL |
+ PAL_STM32_OSPEED_HIGHEST); /* SPI1 NSS. */
+ palSetPad(GPIOA, 4);
}
/** @} */