Optimization to the STM32 SPI driver.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2081 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -294,15 +294,15 @@ void spi_lld_start(SPIDriver *spip) {
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RCC->APB1ENR |= RCC_APB1ENR_SPI3EN;
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RCC->APB1ENR |= RCC_APB1ENR_SPI3EN;
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}
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}
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#endif
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#endif
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/* DMA setup.*/
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spip->spd_dmarx->CPAR = (uint32_t)&spip->spd_spi->DR;
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spip->spd_dmatx->CPAR = (uint32_t)&spip->spd_spi->DR;
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}
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}
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/* SPI setup.*/
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/* SPI setup.*/
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spip->spd_spi->CR1 = spip->spd_config->spc_cr1 | SPI_CR1_MSTR;
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spip->spd_spi->CR1 = spip->spd_config->spc_cr1 | SPI_CR1_MSTR;
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spip->spd_spi->CR2 = SPI_CR2_SSOE | SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN;
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spip->spd_spi->CR2 = SPI_CR2_SSOE | SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN;
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/* DMA setup.*/
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spip->spd_dmarx->CPAR = (uint32_t)&spip->spd_spi->DR;
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spip->spd_dmatx->CPAR = (uint32_t)&spip->spd_spi->DR;
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}
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}
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/**
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/**
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@ -81,6 +81,7 @@
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option is not compatible with the 64 bits stack alignment now default in
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option is not compatible with the 64 bits stack alignment now default in
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the Cortex-Mx port. Note that the 64 bits alignment has a cost both as
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the Cortex-Mx port. Note that the 64 bits alignment has a cost both as
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performance and as space but it is the "standard".
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performance and as space but it is the "standard".
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- OPT: Small speed optimization in the STM32 SPI driver.
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- Fixed various documentation errors.
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- Fixed various documentation errors.
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*** 2.1.0 ***
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*** 2.1.0 ***
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