Optimization to the STM32 SPI driver.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2081 35acf78f-673a-0410-8e92-d51de3d6d3f4

os/hal/platforms/STM32/spi_lld.c

@@ -294,15 +294,15 @@ void spi_lld_start(SPIDriver *spip) {
       RCC->APB1ENR |= RCC_APB1ENR_SPI3EN;
     }
 #endif
+
+    /* DMA setup.*/
+    spip->spd_dmarx->CPAR = (uint32_t)&spip->spd_spi->DR;
+    spip->spd_dmatx->CPAR = (uint32_t)&spip->spd_spi->DR;
   }
 
   /* SPI setup.*/
   spip->spd_spi->CR1 = spip->spd_config->spc_cr1 | SPI_CR1_MSTR;
   spip->spd_spi->CR2 = SPI_CR2_SSOE | SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN;
-  
-  /* DMA setup.*/
-  spip->spd_dmarx->CPAR = (uint32_t)&spip->spd_spi->DR;
-  spip->spd_dmatx->CPAR = (uint32_t)&spip->spd_spi->DR;
 }
 
 /**

readme.txt

@@ -81,6 +81,7 @@
   option is not compatible with the 64 bits stack alignment now default in
   the Cortex-Mx port. Note that the 64 bits alignment has a cost both as
   performance and as space but it is the "standard".
+- OPT: Small speed optimization in the STM32 SPI driver.
 - Fixed various documentation errors.
 
 *** 2.1.0 ***