diff --git a/os/hal/hal.mk b/os/hal/hal.mk
index b2eed900e..8b9d75719 100644
--- a/os/hal/hal.mk
+++ b/os/hal/hal.mk
@@ -3,6 +3,7 @@
HALSRC = ${CHIBIOS}/os/hal/src/hal.c \
${CHIBIOS}/os/hal/src/adc.c \
${CHIBIOS}/os/hal/src/can.c \
+ ${CHIBIOS}/os/hal/src/dac.c \
${CHIBIOS}/os/hal/src/ext.c \
${CHIBIOS}/os/hal/src/gpt.c \
${CHIBIOS}/os/hal/src/i2c.c \
diff --git a/os/hal/include/dac.h b/os/hal/include/dac.h
index 92caa1be7..fc0a09d4c 100644
--- a/os/hal/include/dac.h
+++ b/os/hal/include/dac.h
@@ -305,9 +305,15 @@ extern "C" {
void dacObjectInit(DACDriver *dacp);
void dacStart(DACDriver *dacp, const DACConfig *config);
void dacStop(DACDriver *dacp);
- void dacStartSend(DACDriver *dacp);
-#if DAC_USE_WAIT
- void dacSend(DACDriver *dacp);
+ void dacStartConversion(DACDriver *dacp, const DACConversionGroup *grpp,
+ const dacsample_t *samples, size_t depth);
+ void dacStartConversionI(DACDriver *dacp, const DACConversionGroup *grpp,
+ const dacsample_t *samples, size_t depth);
+ void dacStopConversion(DACDriver *dacp);
+ void dacStopConversionI(DACDriver *dacp);
+#if DAC_USE_WAIT || defined(__DOXYGEN__)
+ msg_t dacConvert(DACDriver *dacp, const DACConversionGroup *grpp,
+ const dacsample_t *samples, size_t depth);
#endif /* DAC_USE_WAIT */
#if DAC_USE_MUTUAL_EXCLUSION
void dacAcquireBus(DACDriver *dacp);
diff --git a/os/hal/src/dac.c b/os/hal/src/dac.c
index b4a659791..a4cb5aa10 100644
--- a/os/hal/src/dac.c
+++ b/os/hal/src/dac.c
@@ -196,6 +196,60 @@ void dacStartConversionI(DACDriver *dacp,
dac_lld_start_conversion(dacp);
}
+/**
+ * @brief Stops an ongoing conversion.
+ * @details This function stops the currently ongoing conversion and returns
+ * the driver in the @p DAC_READY state. If there was no conversion
+ * being processed then the function does nothing.
+ *
+ * @param[in] dacp pointer to the @p DACDriver object
+ *
+ * @api
+ */
+void dacStopConversion(DACDriver *dacp) {
+
+ chDbgCheck(dacp != NULL, "dacStopConversion");
+
+ chSysLock();
+ chDbgAssert((dacp->state == DAC_READY) ||
+ (dacp->state == DAC_ACTIVE),
+ "dacStopConversion(), #1", "invalid state");
+ if (dacp->state != DAC_READY) {
+ adc_lld_stop_conversion(dacp);
+ dacp->grpp = NULL;
+ dacp->state = DAC_READY;
+ _dac_reset_s(dacp);
+ }
+ chSysUnlock();
+}
+
+/**
+ * @brief Stops an ongoing conversion.
+ * @details This function stops the currently ongoing conversion and returns
+ * the driver in the @p DAC_READY state. If there was no conversion
+ * being processed then the function does nothing.
+ *
+ * @param[in] dacp pointer to the @p DACDriver object
+ *
+ * @iclass
+ */
+void dacStopConversionI(DACDriver *dacp) {
+
+ chDbgCheckClassI();
+ chDbgCheck(dacp != NULL, "dacStopConversionI");
+ chDbgAssert((dacp->state == DAC_READY) ||
+ (dacp->state == DAC_ACTIVE) ||
+ (dacp->state == DAC_COMPLETE),
+ "dacStopConversionI(), #1", "invalid state");
+
+ if (dacp->state != DAC_READY) {
+ adc_lld_stop_conversion(dacp);
+ dacp->grpp = NULL;
+ dacp->state = DAC_READY;
+ _dac_reset_i(dacp);
+ }
+}
+
#if DAC_USE_WAIT || defined(__DOXYGEN__)
/**
* @brief Performs a DAC conversion.
diff --git a/os/hal/templates/dac_lld.c b/os/hal/templates/dac_lld.c
new file mode 100644
index 000000000..d5ff63da2
--- /dev/null
+++ b/os/hal/templates/dac_lld.c
@@ -0,0 +1,380 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+
+/**
+ * @file STM32F37x/dac_lld.c
+ * @brief STM32F37x DAC subsystem low level driver source.
+ *
+ * @addtogroup DAC
+ * @{
+ */
+
+#include "ch.h"
+#include "hal.h"
+
+#if HAL_USE_DAC || defined(__DOXYGEN__)
+
+/*===========================================================================*/
+/* Driver local definitions. */
+/*===========================================================================*/
+
+#if !defined(DAC1)
+#define DAC1 DAC
+#define rccEnableDAC1 rccEnableDAC
+#define rccDisableDAC1 rccDisableDAC
+#endif
+
+#define DAC_CHN1_DMA_CHANNEL \
+ STM32_DMA_GETCHANNEL(STM32_DAC_CHN1_DMA_STREAM, \
+ STM32_DAC_CHN1_DMA_CHN)
+
+#define DAC_CHN2_DMA_CHANNEL \
+ STM32_DMA_GETCHANNEL(STM32_DAC_CHN2_DMA_STREAM, \
+ STM32_DAC_CHN2_DMA_CHN)
+
+#define DAC_CHN3_DMA_CHANNEL \
+ STM32_DMA_GETCHANNEL(STM32_DAC_CHN3_DMA_STREAM, \
+ STM32_DAC_CHN3_DMA_CHN)
+
+/*===========================================================================*/
+/* Driver exported variables. */
+/*===========================================================================*/
+
+/** @brief CHN1 driver identifier.*/
+#if STM32_DAC_USE_CHN1 || defined(__DOXYGEN__)
+DACDriver DACD1;
+#endif
+
+/** @brief CHN2 driver identifier.*/
+#if STM32_DAC_USE_CHN2 || defined(__DOXYGEN__)
+DACDriver DACD2;
+#endif
+
+/** @brief CHN3 driver identifier.*/
+#if STM32_DAC_USE_CHN3 || defined(__DOXYGEN__)
+DACDriver DACD3;
+#endif
+
+/*===========================================================================*/
+/* Driver local variables. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local functions. */
+/*===========================================================================*/
+
+
+/**
+ * @brief Shared end/half-of-tx service routine.
+ *
+ * @param[in] dacp pointer to the @p DACDriver object
+ * @param[in] flags pre-shifted content of the ISR register
+ */
+static void dac_lld_serve_tx_interrupt(DACDriver *dacp, uint32_t flags) {
+#if defined(STM32_DAC_DMA_ERROR_HOOK)
+ (void)dacp;
+ if ((flags & (STM32_DMA_ISR_TEIF | STM32_DMA_ISR_DMEIF)) != 0) {
+ /* DMA errors handling.*/
+ _dac_isr_error_code(dacp);
+ }
+ else {
+ if ((flags & STM32_DMA_ISR_HTIF) != 0) {
+ /* Half transfer processing.*/
+ _dac_isr_half_code(dacp);
+ }
+ if ((flags & STM32_DMA_ISR_TCIF) != 0) {
+ /* Transfer complete processing.*/
+ _dac_isr_full_code(dacp);
+ }
+ }
+#else
+ (void)dacp;
+ (void)flags;
+#endif
+}
+
+/*===========================================================================*/
+/* Driver interrupt handlers. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported functions. */
+/*===========================================================================*/
+
+/**
+ * @brief Low level DAC driver initialization.
+ *
+ * @notapi
+ */
+void dac_lld_init(void) {
+
+#if STM32_DAC_USE_CHN1
+ dacObjectInit(&DACD1);
+ DACD1.dac = DAC1;
+ DACD1.tim = STM32_TIM6;
+ DACD1.irqprio = STM32_DAC_CHN1_IRQ_PRIORITY;
+ DACD1.dma = STM32_DMA_STREAM(STM32_DAC_CHN1_DMA_STREAM);
+ DACD1.dmamode = STM32_DMA_CR_CHSEL(DAC_CHN1_DMA_CHANNEL) | \
+ STM32_DMA_CR_PL(STM32_DAC_CHN1_DMA_PRIORITY) | \
+ STM32_DMA_CR_DIR_M2P | \
+ STM32_DMA_CR_DMEIE | \
+ STM32_DMA_CR_TEIE | \
+ STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE;
+#endif
+
+#if STM32_DAC_USE_CHN2
+ dacObjectInit(&DACD2);
+ DACD2.dac = DAC1;
+ DACD2.tim = STM32_TIM7;
+ DACD2.irqprio = STM32_DAC_CHN2_IRQ_PRIORITY;
+ DACD2.dma = STM32_DMA_STREAM(STM32_DAC_CHN2_DMA_STREAM);
+ DACD2.dmamode = STM32_DMA_CR_CHSEL(DAC_CHN2_DMA_CHANNEL) | \
+ STM32_DMA_CR_PL(STM32_DAC_CHN2_DMA_PRIORITY) | \
+ STM32_DMA_CR_DIR_M2P | \
+ STM32_DMA_CR_DMEIE | \
+ STM32_DMA_CR_TEIE | \
+ STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE;
+#endif
+
+#if STM32_DAC_USE_CHN3
+ dacObjectInit(&DACD3);
+ DACD3.dac = DAC2;
+ DACD3.tim = STM32_TIM18;
+ DACD3.irqprio = STM32_DAC_CHN3_IRQ_PRIORITY;
+ DACD3.dma = STM32_DMA_STREAM(STM32_DAC_CHN3_DMA_STREAM);
+ DACD3.dmamode = STM32_DMA_CR_CHSEL(DAC_CHN3_DMA_CHANNEL) | \
+ STM32_DMA_CR_PL(STM32_DAC_CHN2_DMA_PRIORITY) | \
+ STM32_DMA_CR_DIR_M2P | \
+ STM32_DMA_CR_DMEIE | \
+ STM32_DMA_CR_TEIE | \
+ STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE;
+#endif
+}
+
+/**
+ * @brief Configures and activates the DAC peripheral.
+ *
+ * @param[in] dacp pointer to the @p DACDriver object
+ *
+ * @notapi
+ */
+void dac_lld_start(DACDriver *dacp) {
+ uint32_t arr, regshift, trgo, dataoffset;
+ bool_t b;
+ /* If in stopped state then enables the DAC and DMA clocks.*/
+ if (dacp->state == DAC_STOP) {
+#if STM32_DAC_USE_CHN1
+ if (&DACD1 == dacp) {
+ rccEnableDAC1(FALSE);
+ /* DAC1 CR data is at bits 0:15 */
+ regshift = 0;
+ dataoffset = 0;
+ /* Timer setup */
+ rccEnableTIM6(FALSE);
+ rccResetTIM6();
+ trgo = STM32_DAC_CR_TSEL_TIM6;
+ }
+#endif
+#if STM32_DAC_USE_CHN2
+ if (&DACD2 == dacp) {
+ rccEnableDAC1(FALSE);
+ /* DAC2 CR data is at bits 16:31 */
+ regshift = 16;
+ dataoffset = &dacp->dac->DHR12R2 - &dacp->dac->DHR12R1;
+ /* Timer setup */
+ rccEnableTIM7(FALSE);
+ rccResetTIM7();
+ trgo = STM32_DAC_CR_TSEL_TIM7;
+ }
+#endif
+#if STM32_DAC_USE_CHN3
+ if (&DACD3 == dacp) {
+ rccEnableDAC2(FALSE);
+ /* DAC3 CR data is at bits 0:15 */
+ regshift = 0;
+ dataoffset = 0;
+ /* Timer setup */
+ rccEnableTIM18(FALSE);
+ rccResetTIM18();
+ trgo = STM32_DAC_CR_TSEL_TIM18;
+ }
+#endif
+#if STM32_DAC_USE_CHN1 || STM32_DAC_USE_CHN2 || STM32_DAC_USE_CHN3
+ dacp->clock = STM32_TIMCLK1;
+ arr = (dacp->clock / dacp->config->frequency);
+ chDbgAssert((arr <= 0xFFFF),
+ "dac_lld_start(), #1", "invalid frequency");
+
+ /* Timer configuration.*/
+ dacp->tim->CR1 = 0; /* Initially stopped. */
+ dacp->tim->PSC = 0; /* Prescaler value. */
+ dacp->tim->DIER = 0;
+ dacp->tim->ARR = arr;
+ dacp->tim->EGR = TIM_EGR_UG; /* Update event. */
+ dacp->tim->CR2 &= (uint16_t)~TIM_CR2_MMS;
+ dacp->tim->CR2 |= (uint16_t)TIM_CR2_MMS_1; /* Enable TRGO updates. */
+ dacp->tim->CNT = 0; /* Reset counter. */
+ dacp->tim->SR = 0; /* Clear pending IRQs. */
+ /* Update Event IRQ enabled. */
+ /* Timer start.*/
+ dacp->tim->CR1 = TIM_CR1_CEN;
+
+ /* DAC configuration */
+ dacp->dac->CR |= ( (dacp->dac->CR & ~STM32_DAC_CR_MASK) | \
+ (STM32_DAC_CR_EN | STM32_DAC_CR_DMAEN | dacp->config->cr_flags) ) << regshift;
+
+ /* DMA setup. */
+ b = dmaStreamAllocate(dacp->dma,
+ dacp->irqprio,
+ (stm32_dmaisr_t)dac_lld_serve_tx_interrupt,
+ (void *)dacp);
+ chDbgAssert(!b, "dac_lld_start(), #2", "stream already allocated");
+ switch (dacp->config->dhrm) {
+ /* Sets the DAC data register */
+ case DAC_DHRM_12BIT_RIGHT:
+ dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR12R1 + dataoffset);
+ dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) |
+ STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
+ break;
+ case DAC_DHRM_12BIT_LEFT:
+ dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR12L1 + dataoffset);
+ dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) |
+ STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
+ break;
+ case DAC_DHRM_8BIT_RIGHT:
+ dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR8R1 + dataoffset);
+ dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) |
+ STM32_DMA_CR_PSIZE_BYTE | STM32_DMA_CR_MSIZE_BYTE;
+ break;
+#if defined(STM32_HAS_DAC_CHN2) && STM32_HAS_DAC_CHN2
+ case DAC_DHRM_12BIT_RIGHT_DUAL:
+ dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR12RD);
+ dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) |
+ STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
+ break;
+ case DAC_DHRM_12BIT_LEFT_DUAL:
+ dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR12LD);
+ dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) |
+ STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
+ break;
+ case DAC_DHRM_8BIT_RIGHT_DUAL:
+ dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR8RD);
+ dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) |
+ STM32_DMA_CR_PSIZE_BYTE | STM32_DMA_CR_MSIZE_BYTE;
+ break;
+#endif
+ }
+
+ dacp->dac->CR |= trgo << regshift; /* Enable trigger */
+#endif
+ }
+}
+
+/**
+ * @brief Deactivates the DAC peripheral.
+ *
+ * @param[in] dacp pointer to the @p DACDriver object
+ *
+ * @notapi
+ */
+void dac_lld_stop(DACDriver *dacp) {
+
+ /* If in ready state then disables the DAC clock.*/
+ if (dacp->state == DAC_READY) {
+
+ /* DMA disable.*/
+ dmaStreamRelease(dacp->dma);
+
+#if STM32_DAC_USE_CHN1
+ if (&DACD1 == dacp) {
+ dacp->dac->CR &= ~STM32_DAC_CR_EN; /* DAC1 disable.*/
+ }
+#endif
+#if STM32_DAC_USE_CHN2
+ if (&DACD2 == dacp) {
+ dacp->dac->CR &= ~STM32_DAC_CR_EN << 16; /* DAC1 disable.*/
+ }
+#endif
+#if STM32_DAC_USE_CHN3
+ if (&DACD3 == dacp) {
+ dacp->dac->CR &= ~STM32_DAC_CR_EN; /* DAC2 disable.*/
+ rccDisableDAC2(FALSE); /* DAC Clock disable.*/
+ }
+#endif
+ dacp->tim->CR1 &= ~TIM_CR1_CEN; /* Disable associated timer */
+ dacp->state = DAC_STOP;
+
+ if (!(DAC1->CR & (STM32_DAC_CR_EN | STM32_DAC_CR_EN << 16))) {
+ /* DAC Clock disable only if all channels are off.*/
+ rccDisableDAC1(FALSE);
+ }
+ }
+}
+
+/**
+ * @brief Sends data over the DAC bus.
+ * @details This asynchronous function starts a transmit operation.
+ * @post At the end of the operation the configured callback is invoked.
+ *
+ * @param[in] dacp pointer to the @p DACDriver object
+ * @param[in] n number of words to send
+ * @param[in] txbuf the pointer to the transmit buffer
+ *
+ * @notapi
+ */
+void dac_lld_send(DACDriver *dacp) {
+ chDbgAssert(dacp->config->buffer1, "dac_lld_send_doublebuffer(), #1",
+ "First buffer is NULL pointer");
+ dmaStreamSetMemory0(dacp->dma, dacp->config->buffer1);
+ dmaStreamSetTransactionSize(dacp->dma, dacp->config->buffers_size);
+ dmaStreamSetMode(dacp->dma, dacp->dmamode | STM32_DMA_CR_EN);
+}
+
+void dac_lld_send_continuous(DACDriver *dacp){
+ chDbgAssert(dacp->config->buffer1, "dac_lld_send_doublebuffer(), #1",
+ "First buffer is NULL pointer");
+ dmaStreamSetMemory0(dacp->dma, dacp->config->buffer1);
+ dmaStreamSetTransactionSize(dacp->dma, dacp->config->buffers_size);
+ dmaStreamSetMode(dacp->dma, dacp->dmamode | STM32_DMA_CR_EN | \
+ STM32_DMA_CR_CIRC);
+}
+#if defined(STM32_ADVANCED_DMA) && STM32_ADVANCED_DMA
+void dac_lld_send_doublebuffer(DACDriver *dacp) {
+ chDbgAssert(dacp->config->buffer1, "dac_lld_send_doublebuffer(), #1",
+ "First buffer is NULL pointer");
+ chDbgAssert(dacp->config->buffer1, "dac_lld_send_doublebuffer(), #2",
+ "Second buffer is NULL pointer");
+ dmaStreamSetMemory0(dacp->dma, dacp->config->buffer1);
+ dmaStreamSetMemory1(dacp->dma, dacp->config->buffer2);
+ dmaStreamSetTransactionSize(dacp->dma, dacp->config->buffers_size);
+ dmaStreamSetMode(dacp->dma, dacp->dmamode | STM32_DMA_CR_EN | \
+ STM32_DMA_CR_DBM);
+}
+#else
+void dac_lld_send_doublebuffer(DACDriver *dacp) {
+ (void)dacp;
+ chDbgAssert(0, "dac_lld_send_doublebuffer(), #1",
+ "This DMA mode is not supported by your hardware.");
+};
+#endif
+
+#endif /* HAL_USE_DAC */
+
+/** @} */
diff --git a/os/hal/templates/dac_lld.h b/os/hal/templates/dac_lld.h
new file mode 100644
index 000000000..ab2c3494a
--- /dev/null
+++ b/os/hal/templates/dac_lld.h
@@ -0,0 +1,217 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+
+/**
+ * @file STM32F37x/dac_lld.h
+ * @brief STM32F37x DAC subsystem low level driver header.
+ *
+ * @addtogroup DAC
+ * @{
+ */
+
+#ifndef _DAC_LLD_H_
+#define _DAC_LLD_H_
+
+#if HAL_USE_DAC || defined(__DOXYGEN__)
+
+/*===========================================================================*/
+/* Driver constants. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver pre-compile time settings. */
+/*===========================================================================*/
+
+/**
+ * @name Configuration options
+ * @{
+ */
+/**
+ * @brief DAC1 driver enable switch.
+ * @details If set to @p TRUE the support for DAC1 is included.
+ * @note The default is @p FALSE.
+ */
+#if !defined(PLATFORM_DAC_USE_DAC1) || defined(__DOXYGEN__)
+#define PLATFORM_DAC_USE_DAC1 FALSE
+#endif
+
+/*===========================================================================*/
+/* Derived constants and error checks. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver data structures and types. */
+/*===========================================================================*/
+
+/**
+ * @brief DAC sample data type.
+ */
+typedef uint16_t dacsample_t;
+
+/**
+ * @brief Channels number in a conversion group.
+ */
+typedef uint16_t dac_channels_num_t;
+
+/**
+ * @brief Possible DAC failure causes.
+ * @note Error codes are architecture dependent and should not relied
+ * upon.
+ */
+typedef enum {
+ DAC_ERR_DMAFAILURE = 0, /**< DMA operations failure. */
+ DAC_ERR_UNDERRUN = 1 /**< ADC overflow condition. */
+} dacerror_t;
+
+/**
+ * @brief Type of a structure representing an DAC driver.
+ */
+typedef struct DACDriver DACDriver;
+
+/**
+ * @brief DAC notification callback type.
+ *
+ * @param[in] dacp pointer to the @p DACDriver object triggering the
+ * callback
+ * @param[in] buffer pointer to the most recent samples data
+ * @param[in] n number of buffer rows available starting from @p buffer
+ */
+typedef void (*daccallback_t)(DACDriver *dacp, dacsample_t *buffer, size_t n);
+
+/**
+ * @brief DAC error callback type.
+ *
+ * @param[in] dacp pointer to the @p DACDriver object triggering the
+ * callback
+ * @param[in] err DAC error code
+ */
+typedef void (*dacerrorcallback_t)(DACDriver *dacp, dacerror_t err);
+
+/**
+ * @brief Conversion group configuration structure.
+ * @details This implementation-dependent structure describes a conversion
+ * operation.
+ * @note Implementations may extend this structure to contain more,
+ * architecture dependent, fields.
+ */
+typedef struct {
+ /**
+ * @brief Enables the circular buffer mode for the group.
+ */
+ bool_t circular;
+ /**
+ * @brief Number of the analog channels belonging to the conversion group.
+ */
+ dac_channels_num_t num_channels;
+ /**
+ * @brief Callback function associated to the group or @p NULL.
+ */
+ daccallback_t end_cb;
+ /**
+ * @brief Error callback or @p NULL.
+ */
+ dacerrorcallback_t error_cb;
+ /* End of the mandatory fields.*/
+} DACConversionGroup;
+
+/**
+ * @brief Driver configuration structure.
+ * @note It could be empty on some architectures.
+ */
+typedef struct {
+ uint32_t dummy;
+} DACConfig;
+
+/**
+ * @brief Structure representing a DAC driver.
+ */
+struct DACDriver {
+ /**
+ * @brief Driver state.
+ */
+ dacstate_t state;
+ /**
+ * @brief Current configuration data.
+ */
+ const DACConfig *config;
+ /**
+ * @brief Current samples buffer pointer or @p NULL.
+ */
+ dacsample_t *samples;
+ /**
+ * @brief Current samples buffer depth or @p 0.
+ */
+ size_t depth;
+ /**
+ * @brief Current conversion group pointer or @p NULL.
+ */
+ const DACConversionGroup *grpp;
+#if DAC_USE_WAIT || defined(__DOXYGEN__)
+ /**
+ * @brief Waiting thread.
+ */
+ Thread *thread;
+#endif /* DAC_USE_WAIT */
+#if DAC_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
+#if CH_USE_MUTEXES || defined(__DOXYGEN__)
+ /**
+ * @brief Mutex protecting the bus.
+ */
+ Mutex mutex;
+#elif CH_USE_SEMAPHORES
+ Semaphore semaphore;
+#endif
+#endif /* DAC_USE_MUTUAL_EXCLUSION */
+#if defined(DAC_DRIVER_EXT_FIELDS)
+ DAC_DRIVER_EXT_FIELDS
+#endif
+ /* End of the mandatory fields.*/
+};
+
+/*===========================================================================*/
+/* Driver macros. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+#if PLATFORM_DAC_USE_DAC1 && !defined(__DOXYGEN__)
+extern DACDriver DACD1;
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void dac_lld_init(void);
+ void dac_lld_start(DACDriver *dacp);
+ void dac_lld_stop(DACDriver *dacp);
+ void dac_lld_send(DACDriver *dacp);
+ void dac_lld_start_conversion(DACDriver *dacp);
+ void dac_lld_stop_conversion(DACDriver *dacp);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* HAL_USE_DAC */
+
+#endif /* _DAC_LLD_H_ */
+
+/** @} */