git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@202 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
gdisirio
parent
58ab6d53dd
commit
0ea8e4c99f
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@ -62,8 +62,8 @@ UDEFS =
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UADEFS =
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# List ARM-mode C source files here
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ASRC = ../../ports/ARM7-AT91SAM7X/GCC/chcore.c \
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../../ports/ARM7-AT91SAM7X/GCC/sam7x_serial.c \
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ASRC = ../../ports/ARM7-AT91SAM7X/chcore.c \
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../../ports/ARM7-AT91SAM7X/sam7x_serial.c \
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../../src/chinit.c ../../src/chdebug.c ../../src/chlists.c ../../src/chdelta.c \
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../../src/chschd.c ../../src/chthreads.c ../../src/chsem.c ../../src/chmtx.c \
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../../src/chevents.c ../../src/chmsg.c ../../src/chsleep.c ../../src/chqueues.c \
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@ -78,11 +78,11 @@ ASRC = ../../ports/ARM7-AT91SAM7X/GCC/chcore.c \
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TSRC =
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# List ASM source files here
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ASMSRC = ../../ports/ARM7-AT91SAM7X/GCC/crt0.s ../../ports/ARM7/chsys.s
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ASMSRC = ../../ports/ARM7-AT91SAM7X/crt0.s ../../ports/ARM7/chsys.s
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# List all user directories here
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UINCDIR = ../../src/include ../../src/lib \
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../../ports/ARM7 ../../ports/ARM7-AT91SAM7X/GCC
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../../ports/ARM7 ../../ports/ARM7-AT91SAM7X
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# List the user directory to look for the libraries here
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ULIBDIR =
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@ -67,8 +67,8 @@ ASRC =
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# List THUMB-mode C sources here
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# NOTE: If any module is compiled in thumb mode then -mthumb-interwork is
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# enabled for all modules and that lowers performance.
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TSRC = ../../ports/ARM7-AT91SAM7X/GCC/chcore.c \
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../../ports/ARM7-AT91SAM7X/GCC/sam7x_serial.c \
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TSRC = ../../ports/ARM7-AT91SAM7X/chcore.c \
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../../ports/ARM7-AT91SAM7X/sam7x_serial.c \
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../../src/chinit.c ../../src/chdebug.c ../../src/chlists.c ../../src/chdelta.c \
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../../src/chschd.c ../../src/chthreads.c ../../src/chsem.c ../../src/chmtx.c \
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../../src/chevents.c ../../src/chmsg.c ../../src/chsleep.c ../../src/chqueues.c \
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@ -78,11 +78,11 @@ TSRC = ../../ports/ARM7-AT91SAM7X/GCC/chcore.c \
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board.c main.c
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# List ASM source files here
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ASMSRC = ../../ports/ARM7-AT91SAM7X/GCC/crt0.s ../../ports/ARM7/chsys.s
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ASMSRC = ../../ports/ARM7-AT91SAM7X/crt0.s ../../ports/ARM7/chsys.s
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# List all user directories here
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UINCDIR = ../../src/include ../../src/lib \
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../../ports/ARM7 ../../ports/ARM7-AT91SAM7X/GCC
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../../ports/ARM7 ../../ports/ARM7-AT91SAM7X
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# List the user directory to look for the libraries here
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ULIBDIR =
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@ -62,10 +62,10 @@ UDEFS =
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UADEFS =
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# List ARM-mode C source files here
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ASRC = ../../ports/ARM7-LPC214x/GCC/chcore.c \
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../../ports/ARM7-LPC214x/GCC/vic.c \
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../../ports/ARM7-LPC214x/GCC/lpc214x_serial.c \
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../../ports/ARM7-LPC214x/GCC/lpc214x_ssp.c \
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ASRC = ../../ports/ARM7-LPC214x/chcore.c \
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../../ports/ARM7-LPC214x/vic.c \
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../../ports/ARM7-LPC214x/lpc214x_serial.c \
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../../ports/ARM7-LPC214x/lpc214x_ssp.c \
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../../src/chinit.c ../../src/chdebug.c ../../src/chlists.c ../../src/chdelta.c \
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../../src/chschd.c ../../src/chthreads.c ../../src/chsem.c ../../src/chmtx.c \
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../../src/chevents.c ../../src/chmsg.c ../../src/chsleep.c ../../src/chqueues.c \
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@ -79,10 +79,11 @@ ASRC = ../../ports/ARM7-LPC214x/GCC/chcore.c \
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TSRC =
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# List ASM source files here
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ASMSRC = ../../ports/ARM7-LPC214x/GCC/crt0.s
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ASMSRC = ../../ports/ARM7-LPC214x/crt0.s
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# List all user directories here
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UINCDIR = ../../src/include ../../src/lib ../../ports/ARM7-LPC214x/GCC
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UINCDIR = ../../src/include ../../src/lib \
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../../ports/ARM7 ../../ports/ARM7-LPC214x
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# List the user directory to look for the libraries here
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ULIBDIR =
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@ -131,6 +132,7 @@ ODFLAGS = -x --syms
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# Thumb interwork enabled only if needed because it kills performance.
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ifneq ($(TSRC),)
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CPFLAGS += -D THUMB_PRESENT
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ASFLAGS += -D THUMB_PRESENT
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ifneq ($(ASRC),)
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# Mixed ARM and THUMB case.
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CPFLAGS += -mthumb-interwork
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@ -67,10 +67,10 @@ ASRC =
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# List THUMB-mode C sources here
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# NOTE: If any module is compiled in thumb mode then -mthumb-interwork is
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# enabled for all modules and that lowers performance.
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TSRC = ../../ports/ARM7-LPC214x/GCC/chcore.c \
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../../ports/ARM7-LPC214x/GCC/vic.c \
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../../ports/ARM7-LPC214x/GCC/lpc214x_serial.c \
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../../ports/ARM7-LPC214x/GCC/lpc214x_ssp.c \
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TSRC = ../../ports/ARM7-LPC214x/chcore.c \
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../../ports/ARM7-LPC214x/vic.c \
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../../ports/ARM7-LPC214x/lpc214x_serial.c \
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../../ports/ARM7-LPC214x/lpc214x_ssp.c \
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../../src/chinit.c ../../src/chdebug.c ../../src/chlists.c ../../src/chdelta.c \
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../../src/chschd.c ../../src/chthreads.c ../../src/chsem.c ../../src/chmtx.c \
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../../src/chevents.c ../../src/chmsg.c ../../src/chsleep.c ../../src/chqueues.c \
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@ -79,10 +79,11 @@ TSRC = ../../ports/ARM7-LPC214x/GCC/chcore.c \
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board.c buzzer.c mmcsd.c main.c
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# List ASM source files here
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ASMSRC = ../../ports/ARM7-LPC214x/GCC/crt0.s
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ASMSRC = ../../ports/ARM7-LPC214x/crt0.s
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# List all user directories here
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UINCDIR = ../../src/include ../../src/lib ../../ports/ARM7-LPC214x/GCC
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UINCDIR = ../../src/include ../../src/lib \
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../../ports/ARM7 ../../ports/ARM7-LPC214x
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# List the user directory to look for the libraries here
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ULIBDIR =
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@ -131,6 +132,7 @@ ODFLAGS = -x --syms
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# Thumb interwork enabled only if needed because it kills performance.
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ifneq ($(TSRC),)
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CPFLAGS += -D THUMB_PRESENT
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ASFLAGS += -D THUMB_PRESENT
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ifneq ($(ASRC),)
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# Mixed ARM and THUMB case.
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CPFLAGS += -mthumb-interwork
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@ -1,128 +0,0 @@
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/*
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ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _CHCORE_H_
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#define _CHCORE_H_
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typedef void *regarm;
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/*
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* Interrupt saved context.
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*/
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struct extctx {
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regarm spsr_irq;
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regarm lr_irq;
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regarm r0;
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regarm r1;
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regarm r2;
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regarm r3;
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regarm r12;
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};
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/*
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* System saved context.
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*/
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struct intctx {
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regarm r4;
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regarm r5;
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regarm r6;
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#ifndef CH_CURRP_REGISTER_CACHE
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regarm r7;
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#endif
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regarm r8;
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regarm r9;
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regarm r10;
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regarm r11;
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regarm lr;
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};
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/*
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* Port dependent part of the Thread structure, you may add fields in
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* this structure.
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*/
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typedef struct {
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struct intctx *r13;
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} Context;
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/*
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* Platform dependent part of the \p chThdCreate() API.
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*/
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#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
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tp->p_ctx.r13 = (struct intctx *)((BYTE8 *)workspace + \
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wsize - \
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sizeof(struct intctx)); \
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tp->p_ctx.r13->r4 = pf; \
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tp->p_ctx.r13->r5 = arg; \
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tp->p_ctx.r13->lr = threadstart; \
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}
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#ifdef THUMB
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extern void chSysLock(void);
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extern void chSysUnlock(void);
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#else /* !THUMB */
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#define chSysLock() asm("msr CPSR_c, #0x9F")
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#define chSysUnlock() asm("msr CPSR_c, #0x1F")
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#endif /* THUMB */
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#ifdef THUMB
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#define INT_REQUIRED_STACK 0x10
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#else /* !THUMB */
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#define INT_REQUIRED_STACK 0
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#endif /* !THUMB */
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#define StackAlign(n) ((((n) - 1) | 3) + 1)
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#define UserStackSize(n) StackAlign(sizeof(Thread) + \
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sizeof(struct intctx) + \
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sizeof(struct extctx) + \
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(n) + \
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INT_REQUIRED_STACK)
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#define WorkingArea(s, n) ULONG32 s[UserStackSize(n) >> 2];
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#ifdef THUMB
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#define chSysIRQEnterI() { \
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asm(".code 32 \n\t" \
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"stmfd sp!, {r0-r3, r12, lr} \n\t" \
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"add r0, pc, #1 \n\t" \
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"bx r0 \n\t" \
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".code 16 \n\t"); \
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}
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#define chSysIRQExitI() { \
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asm("ldr r0, =IrqCommon \n\t" \
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"bx r0 \n\t"); \
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}
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#else /* !THUMB */
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#define chSysIRQEnterI() { \
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asm("stmfd sp!, {r0-r3, r12, lr} \n\t"); \
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}
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#define chSysIRQExitI() { \
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asm("b IrqCommon \n\t"); \
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}
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#endif /* !THUMB */
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/* It requires zero bytes, but better be safe.*/
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#define IDLE_THREAD_STACK_SIZE 8
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void _IdleThread(void *p) __attribute__((noreturn));
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void chSysHalt(void);
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void chSysSwitchI(Thread *otp, Thread *ntp);
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void chSysPuts(char *msg);
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void threadstart(void);
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#endif /* _CHCORE_H_ */
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@ -1,47 +0,0 @@
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/*
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ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _CHTYPES_H_
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#define _CHTYPES_H_
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/*
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* Generic types often dependant on the compiler.
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*/
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#define BOOL char
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#define BYTE8 unsigned char
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#define SBYTE8 char
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#define WORD16 short
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#define UWORD16 unsigned short
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#define LONG32 int
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#define ULONG32 unsigned int
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typedef BYTE8 t_tmode;
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typedef BYTE8 t_tstate;
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typedef UWORD16 t_tid;
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typedef ULONG32 t_prio;
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typedef LONG32 t_msg;
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typedef LONG32 t_eventid;
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typedef ULONG32 t_eventmask;
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typedef ULONG32 t_time;
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typedef LONG32 t_cnt;
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typedef ULONG32 t_size;
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#define INLINE inline
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#endif /* _CHTYPES_H_ */
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14
readme.txt
14
readme.txt
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@ -37,10 +37,24 @@ ARM7-AT91SAM7X-GCC - Port for Atmel AT91SAM7X256. The demo program targets
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the Olimex SAM7-EX256 board.
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AVR-AT90CANx-GCC - Port on AVR AT90CAN128, not complete yet.
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*****************************************************************************
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*** Plans ***
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*****************************************************************************
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- Restart the work on the AVR port ASAP.
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- Look into importing or implementing a TCP/IP stack and a File System.
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- Start the work on a Cortex-M3 port as soon GCC 4.3.0 will be released.
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- Evaluate other architectures for a possible ChibiOS/RT port.
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*****************************************************************************
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*** Releases ***
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*****************************************************************************
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*** 0.5.5 ***
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- Reorganized the code of the two ARM7 ports, now all the common ARM7 code
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is in ./ports/ARM7. This will make maintenance and new ARM7 ports much
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easier.
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*** 0.5.4 ***
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- Port for Atmel AT91SAM7X256 introduced, the port should be useable also on
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SAM7S and SAM7XC but no tests were performed. Other SAM7 processors should
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