diff --git a/demos/ARMCM4-STM32F303-DISCOVERY/chconf.h b/demos/ARMCM4-STM32F303-DISCOVERY/chconf.h
index 05ecea47a..e71632ee9 100644
--- a/demos/ARMCM4-STM32F303-DISCOVERY/chconf.h
+++ b/demos/ARMCM4-STM32F303-DISCOVERY/chconf.h
@@ -357,7 +357,7 @@
  * @note    The default is @p FALSE.
  */
 #if !defined(CH_DBG_STATISTICS) || defined(__DOXYGEN__)
-#define CH_DBG_STATISTICS                   TRUE
+#define CH_DBG_STATISTICS                   FALSE
 #endif
 
 /**
@@ -368,7 +368,7 @@
  * @note    The default is @p FALSE.
  */
 #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
-#define CH_DBG_SYSTEM_STATE_CHECK           TRUE
+#define CH_DBG_SYSTEM_STATE_CHECK           FALSE
 #endif
 
 /**
diff --git a/demos/ARMCM4-STM32F303-DISCOVERY/main.c b/demos/ARMCM4-STM32F303-DISCOVERY/main.c
index e12a55fda..ed10165af 100644
--- a/demos/ARMCM4-STM32F303-DISCOVERY/main.c
+++ b/demos/ARMCM4-STM32F303-DISCOVERY/main.c
@@ -101,9 +101,9 @@ int main(void) {
    * Activates the serial driver 1 using the driver default configuration.
    * PA9(TX) and PA10(RX) are routed to USART1.
    */
-//  sdStart(&SD1, NULL);
-//  palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7));
-//  palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7));
+  sdStart(&SD1, NULL);
+  palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7));
+  palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7));
 
   /*
    * Creates the example thread.
@@ -117,8 +117,8 @@ int main(void) {
    * pressed the test procedure is launched.
    */
   while (TRUE) {
-//    if (palReadPad(GPIOA, GPIOA_BUTTON))
-//      TestThread(&SD1);
+    if (palReadPad(GPIOA, GPIOA_BUTTON))
+      TestThread(&SD1);
     chThdSleepMilliseconds(500);
   }
 }
diff --git a/os/kernel/ports/ARMCMx/chcore_v7m.c b/os/kernel/ports/ARMCMx/chcore_v7m.c
index af9dcd439..78fd284e1 100644
--- a/os/kernel/ports/ARMCMx/chcore_v7m.c
+++ b/os/kernel/ports/ARMCMx/chcore_v7m.c
@@ -69,9 +69,9 @@ void SVC_Handler(void) {
   ctxp++;
 
 #if CORTEX_USE_FPU
-  /* Restoring the special register SCB_FPCCR.*/
-  SCB_FPCCR = (uint32_t)ctxp->fpccr;
-  SCB_FPCAR = SCB_FPCAR + sizeof (struct extctx);
+  /* Restoring the special register FPCCR.*/
+  FPU->FPCCR = (uint32_t)ctxp->fpccr;
+  FPU->FPCAR = FPU->FPCAR + sizeof (struct extctx);
 #endif
 
   /* Writing back the modified PSP value.*/
@@ -99,9 +99,9 @@ void PendSV_Handler(void) {
   ctxp++;
 
 #if CORTEX_USE_FPU
-  /* Restoring the special register SCB_FPCCR.*/
-  SCB_FPCCR = (uint32_t)ctxp->fpccr;
-  SCB_FPCAR = SCB_FPCAR + sizeof (struct extctx);
+  /* Restoring the special register FPCCR.*/
+  FPU->FPCCR = (uint32_t)ctxp->fpccr;
+  FPU->FPCAR = FPU->FPCAR + sizeof (struct extctx);
 #endif
 
   /* Writing back the modified PSP value.*/
@@ -156,11 +156,11 @@ void _port_irq_epilogue(void) {
 
       /* Saving the special register SCB_FPCCR into the reserved offset of
          the Cortex-M4 exception frame.*/
-      (ctxp + 1)->fpccr = (regarm_t)(fpccr = SCB_FPCCR);
+      (ctxp + 1)->fpccr = (regarm_t)(fpccr = FPU->FPCCR);
 
       /* Now the FPCCR is modified in order to not restore the FPU status
          from the artificial return context.*/
-      SCB_FPCCR = fpccr | FPCCR_LSPACT;
+      FPU->FPCCR = fpccr | FPU_FPCCR_LSPACT_Msk;
     }
 #endif
 
diff --git a/os/kernel/ports/ARMCMx/chcore_v7m.h b/os/kernel/ports/ARMCMx/chcore_v7m.h
index d800ccc80..0fc220a34 100644
--- a/os/kernel/ports/ARMCMx/chcore_v7m.h
+++ b/os/kernel/ports/ARMCMx/chcore_v7m.h
@@ -200,17 +200,16 @@
   CORTEX_PRIO_MASK(CORTEX_MAX_KERNEL_PRIORITY)
 #else
 
-#define CORTEX_MAX_KERNEL_PRIORITY      1
-#define CORTEX_BASEPRI_KERNEL           0
+#define CORTEX_MAX_KERNEL_PRIORITY      0
 #endif
 
 /**
  * @brief   PendSV priority level.
- * @note    This priority is enforced to be equal to @p CORTEX_BASEPRI_KERNEL,
- *          this handler always have the highest priority that cannot preempt
- *          the kernel.
+ * @note    This priority is enforced to be equal to
+ *          @p CORTEX_MAX_KERNEL_PRIORITY, this handler always have the
+ *          highest priority that cannot preempt the kernel.
  */
-#define CORTEX_PRIORITY_PENDSV          CORTEX_BASEPRI_KERNEL
+#define CORTEX_PRIORITY_PENDSV          CORTEX_MAX_KERNEL_PRIORITY
 
 /*===========================================================================*/
 /* Module data structures and types.                                         */
@@ -468,7 +467,7 @@ static inline syssts_t port_get_irq_status(void) {
 static inline bool port_irq_enabled(syssts_t sts) {
 
 #if !CORTEX_SIMPLIFIED_PRIORITY
-  return sts >= CORTEX_BASEPRI_KERNEL;
+  return sts == CORTEX_BASEPRI_DISABLED;
 #else /* CORTEX_SIMPLIFIED_PRIORITY */
   return (sts & 1) == 0;
 #endif /* CORTEX_SIMPLIFIED_PRIORITY */
diff --git a/os/kernel/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s b/os/kernel/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s
index 37060b748..881448dfc 100644
--- a/os/kernel/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s
+++ b/os/kernel/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s
@@ -47,7 +47,11 @@
 
                 .syntax unified
                 .cpu cortex-m4
+#if CORTEX_USE_FPU
+                .fpu fpv4-sp-d16
+#else
                 .fpu softvfp
+#endif
 
                 .thumb
                 .text
@@ -86,8 +90,12 @@ _port_thread_start:
 #if CH_DBG_STATISTICS
                 bl      _stats_stop_measure_crit_thd
 #endif
+#if !CORTEX_SIMPLIFIED_PRIORITY
                 movs    r3, #0
                 msr     BASEPRI, r3
+#else /* CORTEX_SIMPLIFIED_PRIORITY */
+                cpsie   i
+#endif /* CORTEX_SIMPLIFIED_PRIORITY */
                 mov     r0, r5
                 blx     r4
                 bl      chThdExit
@@ -116,9 +124,9 @@ _port_switch_from_isr:
                 .globl  _port_exit_from_isr
 _port_exit_from_isr:
 #if CORTEX_SIMPLIFIED_PRIORITY
-                mov     r3, #SCB_ICSR :AND: 0xFFFF
-                movt    r3, #SCB_ICSR :SHR: 16
-                mov     r2, #ICSR_PENDSVSET
+                movw    r3, #:lower16:SCB_ICSR
+                movt    r3, #:upper16:SCB_ICSR
+                mov     r2, ICSR_PENDSVSET
                 str     r2, [r3, #0]
                 cpsie   i
 #else /* !CORTEX_SIMPLIFIED_PRIORITY */
diff --git a/os/kernel/ports/ARMCMx/compilers/GCC/crt0.c b/os/kernel/ports/ARMCMx/compilers/GCC/crt0.c
index f2aa2f002..a9b58820e 100644
--- a/os/kernel/ports/ARMCMx/compilers/GCC/crt0.c
+++ b/os/kernel/ports/ARMCMx/compilers/GCC/crt0.c
@@ -258,7 +258,7 @@ void _default_exit(void) {
 #if !defined(__DOXYGEN__)
 __attribute__((naked))
 #endif
-void ResetHandler(void) {
+void Reset_Handler(void) {
   uint32_t psp, reg;
 
   /* Process Stack initialization, it is allocated starting from the
diff --git a/os/kernel/ports/ARMCMx/compilers/GCC/ld/STM32F303xC.ld b/os/kernel/ports/ARMCMx/compilers/GCC/ld/STM32F303xC.ld
index 44ae0958d..3b31a79cf 100644
--- a/os/kernel/ports/ARMCMx/compilers/GCC/ld/STM32F303xC.ld
+++ b/os/kernel/ports/ARMCMx/compilers/GCC/ld/STM32F303xC.ld
@@ -35,7 +35,7 @@ __ram_start__           = ORIGIN(ram);
 __ram_size__            = LENGTH(ram);
 __ram_end__             = __ram_start__ + __ram_size__;
 
-ENTRY(ResetHandler)
+ENTRY(Reset_Handler)
 
 SECTIONS
 {
diff --git a/os/kernel/ports/ARMCMx/compilers/GCC/ld/STM32F373xC.ld b/os/kernel/ports/ARMCMx/compilers/GCC/ld/STM32F373xC.ld
index 4caf87011..491e61c63 100644
--- a/os/kernel/ports/ARMCMx/compilers/GCC/ld/STM32F373xC.ld
+++ b/os/kernel/ports/ARMCMx/compilers/GCC/ld/STM32F373xC.ld
@@ -34,7 +34,7 @@ __ram_start__           = ORIGIN(ram);
 __ram_size__            = LENGTH(ram);
 __ram_end__             = __ram_start__ + __ram_size__;
 
-ENTRY(ResetHandler)
+ENTRY(Reset_Handler)
 
 SECTIONS
 {