Fixed Bug #794
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9929 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -53,7 +53,6 @@ static icu_registers_t regs_table[]=
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#endif
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};
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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@ -227,7 +227,6 @@ typedef volatile avr_gpio_registers_t * ioportid_t;
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#define IOPORTSPI1 ((volatile avr_gpio_registers_t *)&PIN_SPI1)
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#endif
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/*===========================================================================*/
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/* Implementation, some of the following macros could be implemented as */
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/* functions, if so please put them in pal_lld.c. */
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@ -560,7 +560,6 @@ void pwm_lld_disable_channel_notification(PWMDriver *pwmp,
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*regs_table[i].timsk &= ~(1 << (channel + 1));
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}
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#endif /* HAL_USE_PWM */
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/** @} */
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@ -214,7 +214,6 @@ extern "C" {
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uint8_t spi_lld_polled_exchange(SPIDriver *spip, uint8_t frame);
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#endif
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#ifdef __cplusplus
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}
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#endif
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@ -57,7 +57,6 @@ static union {
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} u;
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#endif /* STM32_SDC_SDIO_UNALIGNED_SUPPORT */
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/**
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* @brief SDIO default configuration.
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*/
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@ -99,7 +99,6 @@ static union {
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} u;
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#endif /* STM32_SDC_SDMMC_UNALIGNED_SUPPORT */
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/**
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* @brief SDIO default configuration.
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*/
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@ -383,7 +383,6 @@ OSAL_IRQ_HANDLER(STM32_USART2_HANDLER) {
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}
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#endif /* STM32_UART_USE_USART2 */
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#if defined(STM32_USART3_8_HANDLER)
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#if STM32_SERIAL_USE_USART3 || STM32_SERIAL_USE_UART4 || \
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STM32_SERIAL_USE_UART5 || STM32_SERIAL_USE_USART6 || \
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@ -1492,7 +1492,6 @@
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#define STM32_HAS_DAC2_CH1 FALSE
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#define STM32_HAS_DAC2_CH2 FALSE
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/* DMA attributes.*/
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#define STM32_ADVANCED_DMA TRUE
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#define STM32_DMA_SUPPORTS_CSELR FALSE
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@ -1714,7 +1713,6 @@
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#define STM32_HAS_CRC TRUE
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#define STM32_CRC_PROGRAMMABLE TRUE
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/*===========================================================================*/
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/* STM32F091xC, STM32F098xx. */
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/*===========================================================================*/
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@ -1945,7 +1945,6 @@
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#define STM32_PLL48CLK 0
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#endif /* !STM32_CLOCK48_REQUIRED */
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/**
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* @brief Clock of timers connected to APB1
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* (Timers 2, 3, 4, 5, 6, 7, 12, 13, 14).
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@ -2073,7 +2073,6 @@
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#define STM32_MSI_FLASHBITS FLASH_ACR_LATENCY_4WS
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#endif
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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@ -267,7 +267,6 @@
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}
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/** @} */
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/**
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* @name ADC peripherals specific RCC operations
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* @{
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@ -312,7 +312,6 @@
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#define STM32_LPUART1_HANDLER Vector158
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#define STM32_LPUART1_NUMBER 70
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#define STM32_HAS_USART3 FALSE
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#define STM32_HAS_UART4 FALSE
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#define STM32_HAS_UART5 FALSE
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@ -92,7 +92,6 @@ void qspiStart(QSPIDriver *qspip, const QSPIConfig *config) {
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osalDbgCheck((qspip != NULL) && (config != NULL));
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osalSysLock();
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osalDbgAssert((qspip->state == QSPI_STOP) || (qspip->state == QSPI_READY),
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@ -62,7 +62,6 @@ void stInit(void) {
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st_lld_init();
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}
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/**
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* @brief Starts the alarm.
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* @note Makes sure that no spurious alarms are triggered after
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@ -148,7 +148,9 @@
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- RT: Merged RT4.
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- NIL: Merged NIL2.
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- NIL: Added STM32F7 demo.
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- RT: Fixed double empty lines (bug #793)(backported to 16.1.6, 3.0.6).
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- HAL: Fixed double empty lines in HAL (bug #794)backported to 16.1.6,
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3.0.6, 2.6.10).
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- RT: Fixed double empty lines in RT (bug #793)(backported to 16.1.6, 3.0.6).
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- HAL: Fixed wrong entries in STM32L4 registry (bug #792)(backported to
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16.1.6).
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- HAL: Fixed missing ARPE bit in CR1 initialization on STM32 GPT driver
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