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ChibiOS
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Fixed bug #698. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/stable_16.1.x@8835 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
Giovanni Di Sirio 2016-02-06 10:57:21 +00:00
parent 33477340d0
commit 11842b8875
5 changed files with 18 additions and 16 deletions
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2
doc/hal/Doxyfile_chm
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@ -38,7 +38,7 @@ PROJECT_NAME = ChibiOS/HAL
# could be handy for archiving the generated documentation or if some version
# control system is used.
PROJECT_NUMBER = 4.0.2
PROJECT_NUMBER = 4.0.3
# Using the PROJECT_BRIEF tag one can provide an optional one line description
# for a project that appears at the top of each page and should give viewer a

2
doc/hal/Doxyfile_html
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@ -38,7 +38,7 @@ PROJECT_NAME = ChibiOS/HAL
# could be handy for archiving the generated documentation or if some version
# control system is used.
PROJECT_NUMBER = 4.0.2
PROJECT_NUMBER = 4.0.3
# Using the PROJECT_BRIEF tag one can provide an optional one line description
# for a project that appears at the top of each page and should give viewer a

4
os/hal/include/hal.h
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@ -103,7 +103,7 @@
/**
* @brief HAL version string.
*/
#define HAL_VERSION "4.0.2"
#define HAL_VERSION "4.0.3"
/**
* @brief HAL version major number.
@ -118,7 +118,7 @@
/**
* @brief HAL version patch number.
*/
#define CH_HAL_PATCH 2
#define CH_HAL_PATCH 3
/** @} */
/**

18
os/hal/ports/STM32/STM32F0xx/stm32_rcc.h
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@ -645,7 +645,7 @@
*
* @api
*/
#define rccEnableTIM15(lp) rccEnableAPB1(RCC_APB2ENR_TIM15EN, lp)
#define rccEnableTIM15(lp) rccEnableAPB2(RCC_APB2ENR_TIM15EN, lp)
/**
* @brief Disables the TIM15 peripheral clock.
@ -655,14 +655,14 @@
*
* @api
*/
#define rccDisableTIM15(lp) rccDisableAPB1(RCC_APB2ENR_TIM15EN, lp)
#define rccDisableTIM15(lp) rccDisableAPB2(RCC_APB2ENR_TIM15EN, lp)
/**
* @brief Resets the TIM15 peripheral.
*
* @api
*/
#define rccResetTIM15() rccResetAPB1(RCC_APB2RSTR_TIM15RST)
#define rccResetTIM15() rccResetAPB2(RCC_APB2RSTR_TIM15RST)
/**
* @brief Enables the TIM16 peripheral clock.
@ -672,7 +672,7 @@
*
* @api
*/
#define rccEnableTIM16(lp) rccEnableAPB1(RCC_APB2ENR_TIM16EN, lp)
#define rccEnableTIM16(lp) rccEnableAPB2(RCC_APB2ENR_TIM16EN, lp)
/**
* @brief Disables the TIM16 peripheral clock.
@ -682,14 +682,14 @@
*
* @api
*/
#define rccDisableTIM16(lp) rccDisableAPB1(RCC_APB2ENR_TIM16EN, lp)
#define rccDisableTIM16(lp) rccDisableAPB2(RCC_APB2ENR_TIM16EN, lp)
/**
* @brief Resets the TIM16 peripheral.
*
* @api
*/
#define rccResetTIM16() rccResetAPB1(RCC_APB2RSTR_TIM16RST)
#define rccResetTIM16() rccResetAPB2(RCC_APB2RSTR_TIM16RST)
/**
* @brief Enables the TIM17 peripheral clock.
@ -699,7 +699,7 @@
*
* @api
*/
#define rccEnableTIM17(lp) rccEnableAPB1(RCC_APB2ENR_TIM17EN, lp)
#define rccEnableTIM17(lp) rccEnableAPB2(RCC_APB2ENR_TIM17EN, lp)
/**
* @brief Disables the TIM17 peripheral clock.
@ -709,14 +709,14 @@
*
* @api
*/
#define rccDisableTIM17(lp) rccDisableAPB1(RCC_APB2ENR_TIM17EN, lp)
#define rccDisableTIM17(lp) rccDisableAPB2(RCC_APB2ENR_TIM17EN, lp)
/**
* @brief Resets the TIM17 peripheral.
*
* @api
*/
#define rccResetTIM17() rccResetAPB1(RCC_APB2RSTR_TIM17RST)
#define rccResetTIM17() rccResetAPB2(RCC_APB2RSTR_TIM17RST)
/** @} */
/**

8
readme.txt
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@ -73,11 +73,13 @@
*****************************************************************************
*** 16.1.3 ***
- VAR: Fixed missing time convesion in lwIP arch module (bug #697).
- VAR: Fixed missing time convesion in lwIP arch module (bug #696, again).
- HAL: Fixed typos in STM32F0 RCC enable/disable macros (bug #698).
- RT: Fixed useless call to chTMStartMeasurementX() in _thread_init()
(bug #697).
- VAR: Fixed missing time conversion in lwIP arch module (bug #696, again).
*** 16.1.2 ***
- VAR: Fixed missing time convesion in lwIP arch module (bug #696).
- VAR: Fixed missing time conversion in lwIP arch module (bug #696).
- HAL: Fixed incorrect handling of TIME_IMMEDIATE in the HAL buffer queues
(bug #695).