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I2C. Cleanups. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@2730 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
barthess 2011-02-10 17:21:20 +00:00
parent eafaa7d6cf
commit 12778b0075
3 changed files with 18 additions and 11 deletions
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7
os/hal/include/i2c.h
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@ -80,7 +80,12 @@ typedef enum {
I2C_MTRANSMIT = 6, /**< Master transmitting. */ I2C_MTRANSMIT = 6, /**< Master transmitting. */
I2C_MRECEIVE = 7, /**< Master receiving. */ I2C_MRECEIVE = 7, /**< Master receiving. */
I2C_MWAIT_TF = 8, /**< Master wait Transmission Finished */ I2C_MWAIT_TF = 8, /**< Master wait Transmission Finished */
I2C_MERROR = 9 /**< Error condition. */ I2C_MERROR = 9, /**< Error condition. */
// slave part
I2C_SACTIVE = 10,
I2C_STRANSMIT = 11,
I2C_SRECEIVE = 12,
} i2cstate_t; } i2cstate_t;
#include "i2c_lld.h" #include "i2c_lld.h"

18
os/hal/platforms/STM32/i2c_lld.c
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@ -82,7 +82,8 @@ inline bool_t i2c_lld_rxbyte(I2CDriver *i2cp) {
if (_rxbufhead < (_rxbytes - 1)){ if (_rxbufhead < (_rxbytes - 1)){
_rxbuf[_rxbufhead] = i2cp->id_i2c->DR; _rxbuf[_rxbufhead] = i2cp->id_i2c->DR;
if ((_rxbytes - _rxbufhead) <= 2){ if ((_rxbytes - _rxbufhead) <= 2){
i2cp->id_i2c->CR1 &= (~I2C_CR1_ACK);// clear ACK bit for automatically send NACK // clear ACK bit for automatically send NACK
i2cp->id_i2c->CR1 &= (~I2C_CR1_ACK);
} }
(_rxbufhead)++; (_rxbufhead)++;
return(FALSE); return(FALSE);
@ -145,7 +146,7 @@ static void i2c_serve_event_interrupt(I2CDriver *i2cp) {
return; return;
} }
// "wait" interrupt with ADDR // "wait" interrupt with ADDR flag
if ((i2cp->id_state == I2C_10BIT_HANDSHAKE) && (i2cp->id_i2c->SR1 & I2C_SR1_ADDR)){// address ACKed if ((i2cp->id_state == I2C_10BIT_HANDSHAKE) && (i2cp->id_i2c->SR1 & I2C_SR1_ADDR)){// address ACKed
i2cp->id_i2c->CR1 |= I2C_CR1_START; i2cp->id_i2c->CR1 |= I2C_CR1_START;
return; return;
@ -306,7 +307,7 @@ void i2c_lld_start(I2CDriver *i2cp) {
i2cp->id_i2c->CR1 |= 1; // enable interface i2cp->id_i2c->CR1 |= 1; // enable interface
} }
//TODO: dox here
void i2c_lld_set_clock(I2CDriver *i2cp) { void i2c_lld_set_clock(I2CDriver *i2cp) {
volatile uint16_t regCCR, regCR2, freq, clock_div; volatile uint16_t regCCR, regCR2, freq, clock_div;
volatile uint16_t pe_bit_saved; volatile uint16_t pe_bit_saved;
@ -492,11 +493,13 @@ void i2c_lld_master_receiveI(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){
/** /**
* @brief Transmits data ever the I2C bus as masteri2cp. * @brief Transmits data ever the I2C bus as masteri2cp.
* *
* @note This function does not use interrupts
*
* @param[in] i2cp pointer to the @p I2CDriver object * @param[in] i2cp pointer to the @p I2CDriver object
* @param[in] i2cscfg pointer to the @p I2CSlaveConfig object * @param[in] i2cscfg pointer to the @p I2CSlaveConfig object
* @param[in] restart bool. If TRUE then generate restart condition insted of stop * @param[in] restart bool. If TRUE then generate restart condition instead of stop
*/ */
void i2c_lld_master_transmit(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg, bool_t restart) { void i2c_lld_master_transmit_NI(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg, bool_t restart) {
//TODO: check txbytes <= sizeof(i2cscfg->txbuf) here, or in hylevel API //TODO: check txbytes <= sizeof(i2cscfg->txbuf) here, or in hylevel API
int i = 0; int i = 0;
@ -532,13 +535,12 @@ void i2c_lld_master_transmit(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg, bool_t re
/** /**
* @brief Receives data from the I2C bus. * @brief Receives data from the I2C bus.
* @details Before receive data from I2C slave you must manually sent them some * @note This function does not use interrupts
* control bytes first (refer to you device datasheet).
* *
* @param[in] i2cp pointer to the @p I2CDriver object * @param[in] i2cp pointer to the @p I2CDriver object
* @param[in] i2cscfg pointer to the @p I2CSlaveConfig object * @param[in] i2cscfg pointer to the @p I2CSlaveConfig object
*/ */
void i2c_lld_master_receive(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg) { void i2c_lld_master_receive_NI(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg) {
i2cp->id_slave_config = i2cscfg; i2cp->id_slave_config = i2cscfg;

4
os/hal/platforms/STM32/i2c_lld.h
View File

@ -250,9 +250,9 @@ void i2c_lld_master_start(I2CDriver *i2cp);
void i2c_lld_master_stop(I2CDriver *i2cp); void i2c_lld_master_stop(I2CDriver *i2cp);
void i2c_lld_master_transmit(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg, bool_t restart); void i2c_lld_master_transmit_NI(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg, bool_t restart);
void i2c_lld_master_transmitI(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg); void i2c_lld_master_transmitI(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg);
void i2c_lld_master_receive(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg); void i2c_lld_master_receive_NI(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg);
void i2c_lld_master_receiveI(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg); void i2c_lld_master_receiveI(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg);
#ifdef __cplusplus #ifdef __cplusplus
} }