diff --git a/demos/STM32/RT-STM32L073RZ-NUCLEO64/cfg/mcuconf.h b/demos/STM32/RT-STM32L073RZ-NUCLEO64/cfg/mcuconf.h
index fbb9ae411..8b5ddfc35 100644
--- a/demos/STM32/RT-STM32L073RZ-NUCLEO64/cfg/mcuconf.h
+++ b/demos/STM32/RT-STM32L073RZ-NUCLEO64/cfg/mcuconf.h
@@ -59,8 +59,10 @@
#define STM32_PPRE2 STM32_PPRE2_DIV1
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
#define STM32_MCOPRE STM32_MCOPRE_DIV1
-#define STM32_RTCSEL STM32_RTCSEL_LSE
-#define STM32_RTCPRE STM32_RTCPRE_DIV2
+
+/*
+ * Peripherals clock sources.
+ */
#define STM32_USART1SEL STM32_USART1SEL_APB
#define STM32_USART2SEL STM32_USART2SEL_APB
#define STM32_LPUART1SEL STM32_LPUART1SEL_APB
@@ -68,6 +70,8 @@
#define STM32_I2C3SEL STM32_I2C3SEL_APB
#define STM32_LPTIM1SEL STM32_LPTIM1SEL_APB
#define STM32_HSI48SEL STM32_HSI48SEL_HSI48
+#define STM32_RTCSEL STM32_RTCSEL_LSE
+#define STM32_RTCPRE STM32_RTCPRE_DIV2
/*
* IRQ system settings.
@@ -100,8 +104,8 @@
#define STM32_DAC_DUAL_MODE FALSE
#define STM32_DAC_USE_DAC1_CH1 FALSE
#define STM32_DAC_USE_DAC1_CH2 FALSE
-#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
-#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
+#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 3
+#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 3
#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
@@ -111,16 +115,16 @@
* GPT driver system settings.
*/
#define STM32_GPT_USE_TIM2 FALSE
-#define STM32_GPT_TIM2_IRQ_PRIORITY 2
#define STM32_GPT_USE_TIM3 FALSE
-#define STM32_GPT_TIM3_IRQ_PRIORITY 2
#define STM32_GPT_USE_TIM6 FALSE
-#define STM32_GPT_TIM6_IRQ_PRIORITY 2
#define STM32_GPT_USE_TIM7 FALSE
-#define STM32_GPT_TIM7_IRQ_PRIORITY 2
#define STM32_GPT_USE_TIM21 FALSE
-#define STM32_GPT_TIM21_IRQ_PRIORITY 2
#define STM32_GPT_USE_TIM22 FALSE
+#define STM32_GPT_TIM2_IRQ_PRIORITY 2
+#define STM32_GPT_TIM3_IRQ_PRIORITY 2
+#define STM32_GPT_TIM6_IRQ_PRIORITY 2
+#define STM32_GPT_TIM7_IRQ_PRIORITY 2
+#define STM32_GPT_TIM21_IRQ_PRIORITY 2
#define STM32_GPT_TIM22_IRQ_PRIORITY 2
/*
@@ -149,12 +153,12 @@
* ICU driver system settings.
*/
#define STM32_ICU_USE_TIM2 FALSE
-#define STM32_ICU_TIM2_IRQ_PRIORITY 3
#define STM32_ICU_USE_TIM3 FALSE
-#define STM32_ICU_TIM3_IRQ_PRIORITY 3
#define STM32_ICU_USE_TIM21 FALSE
-#define STM32_ICU_TIM21_IRQ_PRIORITY 3
#define STM32_ICU_USE_TIM22 FALSE
+#define STM32_ICU_TIM2_IRQ_PRIORITY 3
+#define STM32_ICU_TIM3_IRQ_PRIORITY 3
+#define STM32_ICU_TIM21_IRQ_PRIORITY 3
#define STM32_ICU_TIM22_IRQ_PRIORITY 3
/*
@@ -162,12 +166,12 @@
*/
#define STM32_PWM_USE_ADVANCED FALSE
#define STM32_PWM_USE_TIM2 FALSE
-#define STM32_PWM_TIM2_IRQ_PRIORITY 3
#define STM32_PWM_USE_TIM3 FALSE
-#define STM32_PWM_TIM3_IRQ_PRIORITY 3
#define STM32_PWM_USE_TIM21 FALSE
-#define STM32_PWM_TIM21_IRQ_PRIORITY 3
#define STM32_PWM_USE_TIM22 FALSE
+#define STM32_PWM_TIM2_IRQ_PRIORITY 3
+#define STM32_PWM_TIM3_IRQ_PRIORITY 3
+#define STM32_PWM_TIM21_IRQ_PRIORITY 3
#define STM32_PWM_TIM22_IRQ_PRIORITY 3
/*
diff --git a/os/hal/ports/STM32/STM32L0xx/hal_lld.h b/os/hal/ports/STM32/STM32L0xx/hal_lld.h
index b0300e4ee..0ad69b7fd 100644
--- a/os/hal/ports/STM32/STM32L0xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32L0xx/hal_lld.h
@@ -533,6 +533,14 @@
#error "Using a wrong mcuconf.h file, STM32L0xx_MCUCONF not defined"
#endif
+#if defined(STM32L072xx) && !defined(STM32G0702_MCUCONF)
+#error "Using a wrong mcuconf.h file, STM32G072_MCUCONF not defined"
+
+#elif defined(STM32L073xx) && !defined(STM32L073_MCUCONF)
+#error "Using a wrong mcuconf.h file, STM32L073_MCUCONF not defined"
+
+#endif
+
/*
* Board files sanity checks.
*/
diff --git a/os/hal/ports/STM32/STM32L0xx/stm32_registry.h b/os/hal/ports/STM32/STM32L0xx/stm32_registry.h
index ccb0292ba..046197441 100644
--- a/os/hal/ports/STM32/STM32L0xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32L0xx/stm32_registry.h
@@ -1372,14 +1372,6 @@
/* USB attributes.*/
#define STM32_HAS_USB FALSE
-#define STM32_USB_ACCESS_SCHEME_2x16 TRUE
-#define STM32_USB_PMA_SIZE 1024
-#define STM32_USB_HAS_BCDR TRUE
-#define STM32_USB1_LP_HANDLER VectorBC
-#define STM32_USB1_LP_NUMBER 31
-#define STM32_USB1_HP_HANDLER VectorBC
-#define STM32_USB1_HP_NUMBER 31
-
#define STM32_HAS_OTG1 FALSE
#define STM32_HAS_OTG2 FALSE
diff --git a/readme.txt b/readme.txt
index 20f6532c3..da0aec853 100644
--- a/readme.txt
+++ b/readme.txt
@@ -74,6 +74,7 @@
*****************************************************************************
*** Next ***
+- NEW: Added mcuconf.h generator for STM32L072/L073.
- NEW: Initial STM32G0xx support in HAL.
- NEW: Implemented TIMPRE setting for STM32F7xx HAL.
- NEW: Merged FatFS 0.13c.
diff --git a/testhal/STM32/STM32L0xx/ADC/readme.txt b/testhal/STM32/STM32L0xx/ADC/readme.txt
index 3c1afa555..5bd4b65c1 100644
--- a/testhal/STM32/STM32L0xx/ADC/readme.txt
+++ b/testhal/STM32/STM32L0xx/ADC/readme.txt
@@ -4,7 +4,7 @@
** TARGET **
-The demo will on an STMicroelectronics STM32F0-Discovery board.
+The demo runs on an ST STM32L053R8-NUCLEO board.
** The Demo **
diff --git a/tools/ftl/processors/conf/mcuconf_stm32l072xx/mcuconf.h.ftl b/tools/ftl/processors/conf/mcuconf_stm32l072xx/mcuconf.h.ftl
new file mode 100644
index 000000000..b3caa3e01
--- /dev/null
+++ b/tools/ftl/processors/conf/mcuconf_stm32l072xx/mcuconf.h.ftl
@@ -0,0 +1,244 @@
+[#ftl]
+[#--
+ ChibiOS - Copyright (C) 2006..2019 Giovanni Di Sirio.
+
+ This file is part of ChibiOS.
+
+ ChibiOS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+ --]
+[@pp.dropOutputFile /]
+[#import "/@lib/libutils.ftl" as utils /]
+[#import "/@lib/liblicense.ftl" as license /]
+[@pp.changeOutputFile name="mcuconf.h" /]
+/*
+[@license.EmitLicenseAsText /]
+*/
+
+#ifndef MCUCONF_H
+#define MCUCONF_H
+
+/*
+ * STM32L0xx drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 3...0 Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3 Lowest...Highest.
+ */
+
+#define STM32L0xx_MCUCONF
+#define STM32L072_MCUCONF
+#define STM32L073_MCUCONF
+
+/*
+ * HAL driver system settings.
+ */
+#define STM32_NO_INIT ${doc.STM32_NO_INIT!"FALSE"}
+#define STM32_VOS ${doc.STM32_VOS!"STM32_VOS_1P8"}
+#define STM32_PVD_ENABLE ${doc.STM32_PVD_ENABLE!"FALSE"}
+#define STM32_PLS ${doc.STM32_PLS!"STM32_PLS_LEV0"}
+#define STM32_HSI16_ENABLED ${doc.STM32_HSI16_ENABLED!"TRUE"}
+#define STM32_HSI16_DIVIDER_ENABLED ${doc.STM32_HSI16_DIVIDER_ENABLED!"FALSE"}
+#define STM32_LSI_ENABLED ${doc.STM32_LSI_ENABLED!"FALSE"}
+#define STM32_HSE_ENABLED ${doc.STM32_HSE_ENABLED!"FALSE"}
+#define STM32_LSE_ENABLED ${doc.STM32_LSE_ENABLED!"TRUE"}
+#define STM32_ADC_CLOCK_ENABLED ${doc.STM32_ADC_CLOCK_ENABLED!"TRUE"}
+#define STM32_USB_CLOCK_ENABLED ${doc.STM32_USB_CLOCK_ENABLED!"TRUE"}
+#define STM32_MSIRANGE ${doc.STM32_MSIRANGE!"STM32_MSIRANGE_2M"}
+#define STM32_SW ${doc.STM32_SW!"STM32_SW_PLL"}
+#define STM32_PLLSRC ${doc.STM32_PLLSRC!"STM32_PLLSRC_HSI16"}
+#define STM32_PLLMUL_VALUE ${doc.STM32_PLLMUL_VALUE!"4"}
+#define STM32_PLLDIV_VALUE ${doc.STM32_PLLDIV_VALUE!"2"}
+#define STM32_HPRE ${doc.STM32_HPRE!"STM32_HPRE_DIV1"}
+#define STM32_PPRE1 ${doc.STM32_PPRE1!"STM32_PPRE1_DIV1"}
+#define STM32_PPRE2 ${doc.STM32_PPRE2!"STM32_PPRE2_DIV1"}
+#define STM32_MCOSEL ${doc.STM32_MCOSEL!"STM32_MCOSEL_NOCLOCK"}
+#define STM32_MCOPRE ${doc.STM32_MCOPRE!"STM32_MCOPRE_DIV1"}
+
+/*
+ * Peripherals clock sources.
+ */
+#define STM32_USART1SEL ${doc.STM32_USART1SEL!"STM32_USART1SEL_APB"}
+#define STM32_USART2SEL ${doc.STM32_USART2SEL!"STM32_USART2SEL_APB"}
+#define STM32_LPUART1SEL ${doc.STM32_LPUART1SEL!"STM32_LPUART1SEL_APB"}
+#define STM32_I2C1SEL ${doc.STM32_I2C1SEL!"STM32_I2C1SEL_APB"}
+#define STM32_I2C3SEL ${doc.STM32_I2C3SEL!"STM32_I2C3SEL_APB"}
+#define STM32_LPTIM1SEL ${doc.STM32_LPTIM1SEL!"STM32_LPTIM1SEL_APB"}
+#define STM32_HSI48SEL ${doc.STM32_HSI48SEL!"STM32_HSI48SEL_HSI48"}
+#define STM32_RTCSEL ${doc.STM32_RTCSEL!"STM32_RTCSEL_LSE"}
+#define STM32_RTCPRE ${doc.STM32_RTCPRE!"STM32_RTCPRE_DIV2"}
+
+/*
+ * IRQ system settings.
+ */
+#define STM32_IRQ_EXTI0_1_PRIORITY ${doc.STM32_IRQ_EXTI0_1_PRIORITY!"3"}
+#define STM32_IRQ_EXTI2_3_PRIORITY ${doc.STM32_IRQ_EXTI2_3_PRIORITY!"3"}
+#define STM32_IRQ_EXTI4_15_PRIORITY ${doc.STM32_IRQ_EXTI4_15_PRIORITY!"3"}
+#define STM32_IRQ_EXTI16_PRIORITY ${doc.STM32_IRQ_EXTI16_PRIORITY!"3"}
+#define STM32_IRQ_EXTI17_20_PRIORITY ${doc.STM32_IRQ_EXTI17_20_PRIORITY!"3"}
+#define STM32_IRQ_EXTI21_22_PRIORITY ${doc.STM32_IRQ_EXTI21_22_PRIORITY!"3"}
+#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"3"}
+#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"3"}
+#define STM32_IRQ_UART4_5_PRIORITY ${doc.STM32_IRQ_UART4_5_PRIORITY!"3"}
+#define STM32_IRQ_LPUART1_PRIORITY ${doc.STM32_IRQ_LPUART1_PRIORITY!"3"}
+
+/*
+ * ADC driver system settings.
+ * Note, IRQ is shared with EXT channels 21 and 22.
+ */
+#define STM32_ADC_USE_ADC1 ${doc.STM32_ADC_USE_ADC1!"FALSE"}
+#define STM32_ADC_ADC1_CKMODE ${doc.STM32_ADC_ADC1_CKMODE!"STM32_ADC_CKMODE_ADCCLK"}
+#define STM32_ADC_ADC1_DMA_PRIORITY ${doc.STM32_ADC_ADC1_DMA_PRIORITY!"2"}
+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC1_DMA_IRQ_PRIORITY!"2"}
+#define STM32_ADC_ADC1_DMA_STREAM ${doc.STM32_ADC_ADC1_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 1)"}
+#define STM32_ADC_PRESCALER_VALUE ${doc.STM32_ADC_PRESCALER_VALUE!"1"}
+
+/*
+ * DAC driver system settings.
+ */
+#define STM32_DAC_DUAL_MODE ${doc.STM32_DAC_DUAL_MODE!"FALSE"}
+#define STM32_DAC_USE_DAC1_CH1 ${doc.STM32_DAC_USE_DAC1_CH1!"FALSE"}
+#define STM32_DAC_USE_DAC1_CH2 ${doc.STM32_DAC_USE_DAC1_CH2!"FALSE"}
+#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY ${doc.STM32_DAC_DAC1_CH1_IRQ_PRIORITY!"3"}
+#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY ${doc.STM32_DAC_DAC1_CH2_IRQ_PRIORITY!"3"}
+#define STM32_DAC_DAC1_CH1_DMA_PRIORITY ${doc.STM32_DAC_DAC1_CH1_DMA_PRIORITY!"2"}
+#define STM32_DAC_DAC1_CH2_DMA_PRIORITY ${doc.STM32_DAC_DAC1_CH2_DMA_PRIORITY!"2"}
+#define STM32_DAC_DAC1_CH1_DMA_STREAM ${doc.STM32_DAC_DAC1_CH1_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 2)"}
+#define STM32_DAC_DAC1_CH2_DMA_STREAM ${doc.STM32_DAC_DAC1_CH2_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 4)"}
+
+/*
+ * GPT driver system settings.
+ */
+#define STM32_GPT_USE_TIM2 ${doc.STM32_GPT_USE_TIM2!"FALSE"}
+#define STM32_GPT_USE_TIM3 ${doc.STM32_GPT_USE_TIM3!"FALSE"}
+#define STM32_GPT_USE_TIM6 ${doc.STM32_GPT_USE_TIM6!"FALSE"}
+#define STM32_GPT_USE_TIM7 ${doc.STM32_GPT_USE_TIM7!"FALSE"}
+#define STM32_GPT_USE_TIM21 ${doc.STM32_GPT_USE_TIM21!"FALSE"}
+#define STM32_GPT_USE_TIM22 ${doc.STM32_GPT_USE_TIM22!"FALSE"}
+#define STM32_GPT_TIM2_IRQ_PRIORITY ${doc.STM32_GPT_TIM2_IRQ_PRIORITY!"2"}
+#define STM32_GPT_TIM3_IRQ_PRIORITY ${doc.STM32_GPT_TIM3_IRQ_PRIORITY!"2"}
+#define STM32_GPT_TIM6_IRQ_PRIORITY ${doc.STM32_GPT_TIM6_IRQ_PRIORITY!"2"}
+#define STM32_GPT_TIM7_IRQ_PRIORITY ${doc.STM32_GPT_TIM7_IRQ_PRIORITY!"2"}
+#define STM32_GPT_TIM21_IRQ_PRIORITY ${doc.STM32_GPT_TIM21_IRQ_PRIORITY!"2"}
+#define STM32_GPT_TIM22_IRQ_PRIORITY ${doc.STM32_GPT_TIM22_IRQ_PRIORITY!"2"}
+
+/*
+ * I2C driver system settings.
+ */
+#define STM32_I2C_USE_I2C1 ${doc.STM32_I2C_USE_I2C1!"FALSE"}
+#define STM32_I2C_USE_I2C2 ${doc.STM32_I2C_USE_I2C2!"FALSE"}
+#define STM32_I2C_USE_I2C3 ${doc.STM32_I2C_USE_I2C3!"FALSE"}
+#define STM32_I2C_BUSY_TIMEOUT ${doc.STM32_I2C_BUSY_TIMEOUT!"50"}
+#define STM32_I2C_I2C1_IRQ_PRIORITY ${doc.STM32_I2C_I2C1_IRQ_PRIORITY!"3"}
+#define STM32_I2C_I2C2_IRQ_PRIORITY ${doc.STM32_I2C_I2C2_IRQ_PRIORITY!"3"}
+#define STM32_I2C_I2C3_IRQ_PRIORITY ${doc.STM32_I2C_I2C3_IRQ_PRIORITY!"3"}
+#define STM32_I2C_USE_DMA ${doc.STM32_I2C_USE_DMA!"TRUE"}
+#define STM32_I2C_I2C1_DMA_PRIORITY ${doc.STM32_I2C_I2C1_DMA_PRIORITY!"1"}
+#define STM32_I2C_I2C2_DMA_PRIORITY ${doc.STM32_I2C_I2C2_DMA_PRIORITY!"1"}
+#define STM32_I2C_I2C3_DMA_PRIORITY ${doc.STM32_I2C_I2C3_DMA_PRIORITY!"1"}
+#define STM32_I2C_I2C1_RX_DMA_STREAM ${doc.STM32_I2C_I2C1_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 7)"}
+#define STM32_I2C_I2C1_TX_DMA_STREAM ${doc.STM32_I2C_I2C1_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 2)"}
+#define STM32_I2C_I2C2_RX_DMA_STREAM ${doc.STM32_I2C_I2C2_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 5)"}
+#define STM32_I2C_I2C2_TX_DMA_STREAM ${doc.STM32_I2C_I2C2_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 4)"}
+#define STM32_I2C_I2C3_RX_DMA_STREAM ${doc.STM32_I2C_I2C3_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 3)"}
+#define STM32_I2C_I2C3_TX_DMA_STREAM ${doc.STM32_I2C_I2C3_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 6)"}
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) ${doc.STM32_I2C_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
+
+/*
+ * ICU driver system settings.
+ */
+#define STM32_ICU_USE_TIM2 ${doc.STM32_ICU_USE_TIM2!"FALSE"}
+#define STM32_ICU_USE_TIM3 ${doc.STM32_ICU_USE_TIM3!"FALSE"}
+#define STM32_ICU_USE_TIM21 ${doc.STM32_ICU_USE_TIM21!"FALSE"}
+#define STM32_ICU_USE_TIM22 ${doc.STM32_ICU_USE_TIM22!"FALSE"}
+#define STM32_ICU_TIM2_IRQ_PRIORITY ${doc.STM32_ICU_TIM2_IRQ_PRIORITY!"3"}
+#define STM32_ICU_TIM3_IRQ_PRIORITY ${doc.STM32_ICU_TIM3_IRQ_PRIORITY!"3"}
+#define STM32_ICU_TIM21_IRQ_PRIORITY ${doc.STM32_ICU_TIM21_IRQ_PRIORITY!"3"}
+#define STM32_ICU_TIM22_IRQ_PRIORITY ${doc.STM32_ICU_TIM22_IRQ_PRIORITY!"3"}
+
+/*
+ * PWM driver system settings.
+ */
+#define STM32_PWM_USE_ADVANCED ${doc.STM32_PWM_USE_ADVANCED!"FALSE"}
+#define STM32_PWM_USE_TIM2 ${doc.STM32_PWM_USE_TIM2!"FALSE"}
+#define STM32_PWM_USE_TIM3 ${doc.STM32_PWM_USE_TIM3!"FALSE"}
+#define STM32_PWM_USE_TIM21 ${doc.STM32_PWM_USE_TIM21!"FALSE"}
+#define STM32_PWM_USE_TIM22 ${doc.STM32_PWM_USE_TIM22!"FALSE"}
+#define STM32_PWM_TIM2_IRQ_PRIORITY ${doc.STM32_PWM_TIM2_IRQ_PRIORITY!"3"}
+#define STM32_PWM_TIM3_IRQ_PRIORITY ${doc.STM32_PWM_TIM3_IRQ_PRIORITY!"3"}
+#define STM32_PWM_TIM21_IRQ_PRIORITY ${doc.STM32_PWM_TIM21_IRQ_PRIORITY!"3"}
+#define STM32_PWM_TIM22_IRQ_PRIORITY ${doc.STM32_PWM_TIM22_IRQ_PRIORITY!"3"}
+
+/*
+ * SERIAL driver system settings.
+ */
+#define STM32_SERIAL_USE_USART1 ${doc.STM32_SERIAL_USE_USART1!"FALSE"}
+#define STM32_SERIAL_USE_USART2 ${doc.STM32_SERIAL_USE_USART2!"TRUE"}
+#define STM32_SERIAL_USE_UART4 ${doc.STM32_SERIAL_USE_UART4!"FALSE"}
+#define STM32_SERIAL_USE_UART5 ${doc.STM32_SERIAL_USE_UART5!"FALSE"}
+#define STM32_SERIAL_USE_LPUART1 ${doc.STM32_SERIAL_USE_LPUART1!"FALSE"}
+
+/*
+ * SPI driver system settings.
+ */
+#define STM32_SPI_USE_SPI1 ${doc.STM32_SPI_USE_SPI1!"FALSE"}
+#define STM32_SPI_USE_SPI2 ${doc.STM32_SPI_USE_SPI2!"FALSE"}
+#define STM32_SPI_SPI1_DMA_PRIORITY ${doc.STM32_SPI_SPI1_DMA_PRIORITY!"1"}
+#define STM32_SPI_SPI2_DMA_PRIORITY ${doc.STM32_SPI_SPI2_DMA_PRIORITY!"1"}
+#define STM32_SPI_SPI1_IRQ_PRIORITY ${doc.STM32_SPI_SPI1_IRQ_PRIORITY!"1"}
+#define STM32_SPI_SPI2_IRQ_PRIORITY ${doc.STM32_SPI_SPI2_IRQ_PRIORITY!"1"}
+#define STM32_SPI_SPI1_RX_DMA_STREAM ${doc.STM32_SPI_SPI1_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 2)"}
+#define STM32_SPI_SPI1_TX_DMA_STREAM ${doc.STM32_SPI_SPI1_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 3)"}
+#define STM32_SPI_SPI2_RX_DMA_STREAM ${doc.STM32_SPI_SPI2_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 4)"}
+#define STM32_SPI_SPI2_TX_DMA_STREAM ${doc.STM32_SPI_SPI2_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 5)"}
+#define STM32_SPI_DMA_ERROR_HOOK(spip) ${doc.STM32_SPI_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
+
+/*
+ * ST driver system settings.
+ */
+#define STM32_ST_IRQ_PRIORITY ${doc.STM32_ST_IRQ_PRIORITY!"2"}
+#define STM32_ST_USE_TIMER ${doc.STM32_ST_USE_TIMER!"21"}
+
+/*
+ * UART driver system settings.
+ */
+#define STM32_UART_USE_USART1 ${doc.STM32_UART_USE_USART1!"FALSE"}
+#define STM32_UART_USE_USART2 ${doc.STM32_UART_USE_USART2!"FALSE"}
+#define STM32_UART_USE_UART4 ${doc.STM32_UART_USE_UART4!"FALSE"}
+#define STM32_UART_USE_UART5 ${doc.STM32_UART_USE_UART5!"FALSE"}
+#define STM32_UART_USART1_DMA_PRIORITY ${doc.STM32_UART_USART1_DMA_PRIORITY!"0"}
+#define STM32_UART_USART2_DMA_PRIORITY ${doc.STM32_UART_USART2_DMA_PRIORITY!"0"}
+#define STM32_UART_UART4_DMA_PRIORITY ${doc.STM32_UART_UART4_DMA_PRIORITY!"0"}
+#define STM32_UART_UART5_DMA_PRIORITY ${doc.STM32_UART_UART5_DMA_PRIORITY!"0"}
+#define STM32_UART_USART1_RX_DMA_STREAM ${doc.STM32_UART_USART1_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 5)"}
+#define STM32_UART_USART1_TX_DMA_STREAM ${doc.STM32_UART_USART1_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 4)"}
+#define STM32_UART_USART2_RX_DMA_STREAM ${doc.STM32_UART_USART2_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 6)"}
+#define STM32_UART_USART2_TX_DMA_STREAM ${doc.STM32_UART_USART2_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 7)"}
+#define STM32_UART_UART4_RX_DMA_STREAM ${doc.STM32_UART_UART4_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 2)"}
+#define STM32_UART_UART4_TX_DMA_STREAM ${doc.STM32_UART_UART4_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 3)"}
+#define STM32_UART_UART5_RX_DMA_STREAM ${doc.STM32_UART_UART5_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 6)"}
+#define STM32_UART_UART5_TX_DMA_STREAM ${doc.STM32_UART_UART5_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 7)"}
+#define STM32_UART_DMA_ERROR_HOOK(uartp) ${doc.STM32_UART_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
+
+/*
+ * WDG driver system settings.
+ */
+#define STM32_WDG_USE_IWDG ${doc.STM32_WDG_USE_IWDG!"FALSE"}
+
+#endif /* MCUCONF_H */
diff --git a/tools/updater/update_mcuconf_stm32l072xx.sh b/tools/updater/update_mcuconf_stm32l072xx.sh
new file mode 100644
index 000000000..f043fb357
--- /dev/null
+++ b/tools/updater/update_mcuconf_stm32l072xx.sh
@@ -0,0 +1,29 @@
+#!/bin/bash
+if [ $# -eq 2 ]
+ then
+ if [ $1 = "rootpath" ]
+ then
+ find $2 -name "mcuconf.h" -exec bash update_mcuconf_stm32l072xx.sh "{}" \;
+ else
+ echo "Usage: update_mcuconf_stm32l072xx.sh [rootpath ]"
+ fi
+elif [ $# -eq 1 ]
+then
+ declare conffile=$(<$1)
+ if egrep -q "STM32L072_MCUCONF" <<< "$conffile"
+ then
+ echo Processing: $1
+ egrep -e "\#define\s+[a-zA-Z0-9_()]*\s+[a-zA-Z0-9_]" <<< "$conffile" | sed -r 's/\#define\s+([a-zA-Z0-9_]*)(\([^)]*\))?\s+/\1=/g' > ./values.txt
+ if ! fmpp -q -C conf.fmpp -S ../ftl/processors/conf/mcuconf_stm32l072xx
+ then
+ echo
+ echo "aborted"
+ exit 1
+ fi
+ cp ./mcuconf.h $1
+ rm ./mcuconf.h ./values.txt
+ fi
+else
+ echo "Usage: update_mcuconf_stm32l072xx.sh [rootpath ]"
+ echo " update_mcuconf_stm32l072xx.sh ]"
+fi