git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3426 35acf78f-673a-0410-8e92-d51de3d6d3f4
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gdisirio
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85cf040f27
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@ -100,8 +100,8 @@ const stm32_dma_stream_t _stm32_dma_streams[STM32_DMA_STREAMS] = {
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* @brief DMA ISR redirector type.
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*/
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typedef struct {
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stm32_dmaisr_t dma_func;
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void *dma_param;
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stm32_dmaisr_t dma_func; /**< @brief DMA callback function. */
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void *dma_param; /**< @brief DMA callback parameter. */
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} dma_isr_redir_t;
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/**
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@ -153,6 +153,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
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/**
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* @brief Associates a peripheral data register to a DMA stream.
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* @note This function can be invoked in both ISR or thread context.
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* @pre The stream must have been allocated using @p dmaStreamAllocate().
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* @post After use the stream can be released using @p dmaStreamRelease().
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*
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* @param[in] dmastp pointer to a stm32_dma_stream_t structure
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* @param[in] addr value to be written in the CPAR register
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@ -166,6 +168,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
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/**
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* @brief Associates a memory destination to a DMA stream.
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* @note This function can be invoked in both ISR or thread context.
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* @pre The stream must have been allocated using @p dmaStreamAllocate().
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* @post After use the stream can be released using @p dmaStreamRelease().
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*
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* @param[in] dmastp pointer to a stm32_dma_stream_t structure
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* @param[in] addr value to be written in the CMAR register
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@ -179,6 +183,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
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/**
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* @brief Sets the number of transfers to be performed.
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* @note This function can be invoked in both ISR or thread context.
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* @pre The stream must have been allocated using @p dmaStreamAllocate().
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* @post After use the stream can be released using @p dmaStreamRelease().
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*
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* @param[in] dmastp pointer to a stm32_dma_stream_t structure
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* @param[in] size value to be written in the CNDTR register
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@ -192,6 +198,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
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/**
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* @brief Returns the number of transfers to be performed.
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* @note This function can be invoked in both ISR or thread context.
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* @pre The stream must have been allocated using @p dmaStreamAllocate().
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* @post After use the stream can be released using @p dmaStreamRelease().
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*
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* @param[in] dmastp pointer to a stm32_dma_stream_t structure
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* @return The number of transfers to be performed.
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@ -203,6 +211,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
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/**
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* @brief Programs the stream mode settings.
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* @note This function can be invoked in both ISR or thread context.
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* @pre The stream must have been allocated using @p dmaStreamAllocate().
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* @post After use the stream can be released using @p dmaStreamRelease().
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*
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* @param[in] dmastp pointer to a stm32_dma_stream_t structure
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* @param[in] mode value to be written in the CCR register
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@ -216,6 +226,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
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/**
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* @brief DMA stream enable.
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* @note This function can be invoked in both ISR or thread context.
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* @pre The stream must have been allocated using @p dmaStreamAllocate().
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* @post After use the stream can be released using @p dmaStreamRelease().
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*
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* @param[in] dmastp pointer to a stm32_dma_stream_t structure
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*
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@ -228,6 +240,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
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/**
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* @brief DMA stream disable.
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* @note This function can be invoked in both ISR or thread context.
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* @pre The stream must have been allocated using @p dmaStreamAllocate().
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* @post After use the stream can be released using @p dmaStreamRelease().
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*
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* @param[in] dmastp pointer to a stm32_dma_stream_t structure
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*
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@ -240,6 +254,8 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
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/**
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* @brief DMA stream interrupt sources clear.
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* @note This function can be invoked in both ISR or thread context.
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* @pre The stream must have been allocated using @p dmaStreamAllocate().
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* @post After use the stream can be released using @p dmaStreamRelease().
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*
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* @param[in] dmastp pointer to a stm32_dma_stream_t structure
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*
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@ -249,6 +265,45 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
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*(dmastp)->ifcr = STM32_DMA_ISR_MASK << (dmastp)->ishift; \
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}
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/**
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* @brief Starts a memory to memory operation using the specified stream.
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* @note The default transfer data mode is "byte to byte" but it can be
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* changed by specifying extra options in the @p mode parameter.
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* @pre The stream must have been allocated using @p dmaStreamAllocate().
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* @post After use the stream can be released using @p dmaStreamRelease().
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*
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* @param[in] dmastp pointer to a stm32_dma_stream_t structure
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* @param[in] mode value to be written in the CCR register, this value
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* is implicitly ORed with:
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* - @p STM32_DMA_CR_MINC
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* - @p STM32_DMA_CR_PINC
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* - @p STM32_DMA_CR_DIR_M2M
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* - @p STM32_DMA_CR_EN
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* .
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* @param[in] src source address
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* @param[in] dst destination address
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* @param[in] n number of data units to copy
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*/
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#define dmaStartMemCopy(dmastp, mode, src, dst, n) { \
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dmaStreamSetPeripheral(dmastp, src); \
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dmaStreamSetMemory0(dmastp, dst); \
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dmaStreamGetTransactionSize(dmastp, n); \
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dmaStreamSetMode(dmastp, (mode) | \
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STM32_DMA_CR_MINC | STM32_DMA_CR_PINC | \
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STM32_DMA_CR_DIR_M2M | STM32_DMA_CR_EN); \
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}
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/**
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* @brief Polled wait for DMA transfer end.
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* @pre The stream must have been allocated using @p dmaStreamAllocate().
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* @post After use the stream can be released using @p dmaStreamRelease().
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*
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* @param[in] dmastp pointer to a stm32_dma_stream_t structure
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*/
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#define dmaWaitCompletion(dmastp) \
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while (((dmastp)->channel->CNDTR > 0) && \
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((dmastp)->channel->CCR & STM32_DMA_CR_EN))
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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@ -251,13 +251,14 @@ __attribute__((naked))
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void ResetHandler(void) {
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uint32_t psp, ctl;
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/* Process Stack initialization, it is allocated below the main stack. The
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main stack is assumed to be allocated starting from @p __ram_end__
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extending downward.*/
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/* Process Stack initialization, it is allocated starting from the
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symbol __process_stack_end__ and its lower limit is the symbol
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__process_stack_base__.*/
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asm volatile ("cpsid i");
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psp = SYMVAL(__process_stack_end__);
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asm volatile ("msr PSP, %0" : : "r" (psp));
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/* CPU mode initialization.*/
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ctl = CRT0_CONTROL_INIT;
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asm volatile ("msr CONTROL, %0" : : "r" (ctl));
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asm volatile ("isb");
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@ -63,7 +63,8 @@
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+--testhal/ - HAL integration test demos.
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| +--LPC11xx/ - LPC11xx HAL test demos.
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| +--LPC13xx/ - LPC13xx HAL test demos.
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| +--STM32/ - STM32 HAL test demos.
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| +--STM32F1xx/ - STM32F1xx HAL test demos.
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| +--STM32L1xx/ - STM32L1xx HAL test demos.
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| +--STM8S/ - STM8S HAL test demos.
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+--tools - Various tools.
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+--eclipse - Eclipse enhancements.
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@ -75,6 +76,7 @@
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*** 2.3.4 ***
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- FIX: Fixed broken TIM8 support in STM32 PWM driver (bug 3418620).
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- FIX: Fixed halconf.h file corrupted in some STM32 demos (bug 3418626).
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- NEW: Added memory copy functionality to the STM32 DMA driver.
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*** 2.3.3 ***
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- FIX: Fixed uninitialized variable in STM32 PWM and ICU drivers (bug 3413558).
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44
todo.txt
44
todo.txt
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@ -6,39 +6,31 @@ X = In progress, some work done.
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N = Decided against.
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Current Pipeline (2.3.x):
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* lwIP 1.4.0 integration and test.
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* Named threads.
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* Call protocol check debug option.
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* Improved stack overflow checking, support main() thread.
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* Move main stack to low memory in ARMCMx ports.
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* Eclipse plugin.
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* FatFs 0.8x integration.
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* Kernel-only demo for users not interested in HAL (Cortex-Mx only).
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- USB and USB_SERIAL APIs reclassification (if needed), incorporate the USB
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bus attach/detach handling in usbStart()/usbStop().
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- USB double buffering support for STM32 implementation.
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X STM32L1xx support (verify and test existing STM32F1xx drivers).
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- Specific ADC driver for STM32L1xx.
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X STM32L-Discovery demo and article.
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X STM32F2xx support (adapt and re-verify all drivers).
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* New STM32 DMA helper driver abstracting differences between STM32F2xx and
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other sub-families.
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? Specific ADC driver for STM32F2xx.
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- USB driver enhancements.
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- USB and USB_SERIAL APIs reclassification.
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- Incorporate the USB bus attach/detach handling in usbStart()/usbStop().
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- Fix zero size packets handling in USB_SERIAL driver.
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- USB double buffering support for STM32 implementation.
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- Evaluate using DMA channels for buffer copy.
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X I2C device driver class support and at least one implementation.
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X Evaluate a modified I2C API where the synchronous mode is default and the
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callback mode optional.
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- Software I2C implementation using a GPT instance for timings.
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X STM32F2xx/STM32F4xx support (adapt and re-verify all drivers).
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* New STM32 DMA helper driver abstracting differences between
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STM32F2xx/STM32F4xx and other sub-families.
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- Specific ADC driver for STM32F2xx/STM32F4xx.
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- MMC_SPI driver revision and speedup.
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- FatFs 0.9x integration.
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Within 2.x.x
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X File System infrastructure.
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X Implement the "transmission end" serial driver event on those platforms
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supporting the feature, so far only done in STM32 driver.
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X I2C device driver class support and at least one implementation.
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X Evaluate a modified I2C API where the synchronous mode is default and the
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callback mode optional. This would allow a portable I2C driver based on
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a GPT instance.
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- Software I2C implementation.
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- Add a CH_THREAD macro for threads declaration in order to hide
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compiler-specific optimizations for thread functions. All demos will have
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to be updated.
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- LPC17xx support.
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Within 2.x.x
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X File System infrastructure.
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- Test suite overhaul, the API should be more generic in order to be used
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with different subsystems and not just the kernel.
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- Reduce number of demos globally, add demos to a repository or on web site.
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