diff --git a/docs/reports/AT91SAM7X-48-ARM.txt b/docs/reports/AT91SAM7X-48-ARM.txt
index 38ee9cc83..73b7d21bd 100644
--- a/docs/reports/AT91SAM7X-48-ARM.txt
+++ b/docs/reports/AT91SAM7X-48-ARM.txt
@@ -5,8 +5,8 @@ Settings: MCK=48.054857, MC_FMR = AT91C_MC_FWS_1FWS (1 wait state)
 
 *** ChibiOS/RT test suite
 ***
-*** Kernel:       1.5.7unstable
-*** GCC Version:  4.5.0
+*** Kernel:       2.1.2unstable
+*** GCC Version:  4.5.1
 *** Architecture: ARM
 *** Core Variant: ARM7TDMI
 *** Platform:     AT91SAM7x
@@ -95,51 +95,51 @@ Settings: MCK=48.054857, MC_FMR = AT91C_MC_FWS_1FWS (1 wait state)
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.1 (Benchmark, messages #1)
---- Score : 109404 msgs/S, 218808 ctxswc/S
+--- Score : 114670 msgs/S, 229340 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.2 (Benchmark, messages #2)
---- Score : 83877 msgs/S, 167754 ctxswc/S
+--- Score : 89883 msgs/S, 179766 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.3 (Benchmark, messages #3)
---- Score : 83877 msgs/S, 167754 ctxswc/S
+--- Score : 89883 msgs/S, 179766 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.4 (Benchmark, context switch)
---- Score : 360160 ctxswc/S
+--- Score : 380272 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.5 (Benchmark, threads, full cycle)
---- Score : 64434 threads/S
+--- Score : 65594 threads/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.6 (Benchmark, threads, create only)
---- Score : 94114 threads/S
+--- Score : 93394 threads/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
---- Score : 25788 reschedules/S, 154728 ctxswc/S
+--- Score : 27232 reschedules/S, 163392 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.8 (Benchmark, round robin context switching)
---- Score : 204100 ctxswc/S
+--- Score : 211344 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.9 (Benchmark, I/O Queues throughput)
---- Score : 217464 bytes/S
+--- Score : 239264 bytes/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.10 (Benchmark, virtual timers set/reset)
---- Score : 264170 timers/S
+--- Score : 264214 timers/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.11 (Benchmark, semaphores wait/signal)
---- Score : 425016 wait+signal/S
+--- Score : 449036 wait+signal/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.12 (Benchmark, mutexes lock/unlock)
---- Score : 309480 lock+unlock/S
+--- Score : 322036 lock+unlock/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.13 (Benchmark, RAM footprint)
diff --git a/os/hal/platforms/AT91SAM7/hal_lld.c b/os/hal/platforms/AT91SAM7/hal_lld.c
index 841a4d2d7..370b7cad5 100644
--- a/os/hal/platforms/AT91SAM7/hal_lld.c
+++ b/os/hal/platforms/AT91SAM7/hal_lld.c
@@ -105,7 +105,12 @@ void at91sam7_clock_init(void) {
   AT91C_BASE_RSTC->RSTC_RMR = ((0xA5 << 24) | AT91C_RSTC_URSTEN);
 
   /* Flash Memory: 1 wait state, about 50 cycles in a microsecond.*/
+#if SAM7_PLATFORM == SAM7X512
+  AT91C_BASE_MC->MC0_FMR = (AT91C_MC_FMCN & (50 << 16)) | AT91C_MC_FWS_1FWS;
+  AT91C_BASE_MC->MC1_FMR = (AT91C_MC_FMCN & (50 << 16)) | AT91C_MC_FWS_1FWS;
+#else
   AT91C_BASE_MC->MC_FMR = (AT91C_MC_FMCN & (50 << 16)) | AT91C_MC_FWS_1FWS;
+#endif
 
   /* Enables the main oscillator and waits 56 slow cycles as startup time.*/
   AT91C_BASE_PMC->PMC_MOR = (AT91C_CKGR_OSCOUNT & (7 << 8)) | AT91C_CKGR_MOSCEN;
@@ -122,7 +127,11 @@ void at91sam7_clock_init(void) {
     ;
 
   /* Master clock = PLLfreq / 2 = 48054858 Hz (rounded).*/
-  AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_CSS_PLL_CLK | AT91C_PMC_PRES_CLK_2;
+  AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2;
+  while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY))
+    ;
+
+  AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK;
   while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY))
     ;
 }
diff --git a/readme.txt b/readme.txt
index d29f87b5c..6cde748a4 100644
--- a/readme.txt
+++ b/readme.txt
@@ -62,6 +62,7 @@
 *****************************************************************************
 
 *** 2.1.2 ***
+- FIX: Incorrect AT91SAM7X initialization (bug 3075354)(backported to 2.0.5).
 - FIX: Fixed race condition in function chSchGoSleepTimeoutS, thanks Balázs
   (bug 3074984)(backported to 2.0.5).
 - FIX: Fixed race condition in threads creation (bug 3069854)(backported