Added STM32F030x4 support.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11088 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
Giovanni Di Sirio
parent
422b4549db
commit
17ed462d6f
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@ -38,17 +38,17 @@
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* @{
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*/
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/*===========================================================================*/
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/* STM32F030x6, STM32F030x8, STM32F030xC. */
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/* STM32F030x4, STM32F030x6, STM32F030x8, STM32F030xC. */
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/*===========================================================================*/
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#if defined(STM32F030x6) || defined(STM32F030x8) || \
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defined(STM32F030xC) || defined(__DOXYGEN__)
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#if defined(STM32F030x4) || defined(STM32F030x6) || \
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defined(STM32F030x8) || defined(STM32F030xC) || defined(__DOXYGEN__)
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/* Common identifier of all STM32F030 devices.*/
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#define STM32F030
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/* RCC attributes. */
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#define STM32_HAS_HSI48 FALSE
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#if defined(STM32F030xC)
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#if defined(STM32F030xC) || defined(__DOXYGEN__)
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#define STM32_HAS_HSI_PREDIV TRUE
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#else
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#define STM32_HAS_HSI_PREDIV FALSE
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@ -122,11 +122,7 @@
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#define STM32_HAS_GPIOA TRUE
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#define STM32_HAS_GPIOB TRUE
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#define STM32_HAS_GPIOC TRUE
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#if defined(STM32F030x8)
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#define STM32_HAS_GPIOD TRUE
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#else
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#define STM32_HAS_GPIOD FALSE
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#endif
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#define STM32_HAS_GPIOE FALSE
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#define STM32_HAS_GPIOF TRUE
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#define STM32_HAS_GPIOG FALSE
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@ -134,18 +130,11 @@
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#define STM32_HAS_GPIOI FALSE
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#define STM32_HAS_GPIOJ FALSE
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#define STM32_HAS_GPIOK FALSE
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#if defined(STM32F030x8)
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#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
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RCC_AHBENR_GPIOBEN | \
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RCC_AHBENR_GPIOCEN | \
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RCC_AHBENR_GPIODEN | \
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RCC_AHBENR_GPIOFEN)
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#else
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#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
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RCC_AHBENR_GPIOBEN | \
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RCC_AHBENR_GPIOCEN | \
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RCC_AHBENR_GPIOFEN)
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#endif
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/* I2C attributes.*/
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#define STM32_HAS_I2C1 TRUE
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@ -154,11 +143,15 @@
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#define STM32_I2C1_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 2)
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#define STM32_I2C1_TX_DMA_CHN 0x00000020
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#if defined(STM32F030x8) || defined(STM32F030xC) || defined(__DOXYGEN__)
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#define STM32_HAS_I2C2 TRUE
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#define STM32_I2C2_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 5)
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#define STM32_I2C2_RX_DMA_CHN 0x00020000
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#define STM32_I2C2_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 4)
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#define STM32_I2C2_TX_DMA_CHN 0x00002000
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#else
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#define STM32_HAS_I2C2 FALSE
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#endif
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#define STM32_HAS_I2C3 FALSE
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#define STM32_HAS_I2C4 FALSE
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@ -188,12 +181,16 @@
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#define STM32_SPI1_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 3)
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#define STM32_SPI1_TX_DMA_CHN 0x00000300
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#if defined(STM32F030x8) || defined(STM32F030xC) || defined(__DOXYGEN__)
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#define STM32_HAS_SPI2 TRUE
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#define STM32_SPI2_SUPPORTS_I2S FALSE
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#define STM32_SPI2_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 4)
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#define STM32_SPI2_RX_DMA_CHN 0x00003000
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#define STM32_SPI2_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 5)
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#define STM32_SPI2_TX_DMA_CHN 0x00030000
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#else
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#define STM32_HAS_SPI2 FALSE
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#endif
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#define STM32_HAS_SPI3 FALSE
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#define STM32_HAS_SPI4 FALSE
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@ -211,7 +208,7 @@
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#define STM32_TIM3_IS_32BITS FALSE
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#define STM32_TIM3_CHANNELS 4
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#if defined(STM32F030x8) || defined(STM32F030xC)
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#if defined(STM32F030x8) || defined(STM32F030xC) || defined(__DOXYGEN__)
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#define STM32_HAS_TIM6 TRUE
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#define STM32_TIM6_IS_32BITS FALSE
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#define STM32_TIM6_CHANNELS 0
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@ -231,7 +228,7 @@
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#define STM32_TIM14_IS_32BITS FALSE
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#define STM32_TIM14_CHANNELS 1
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#if defined(STM32F030x8) || defined(STM32F030xC)
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#if defined(STM32F030x8) || defined(STM32F030xC) || defined(__DOXYGEN__)
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#define STM32_HAS_TIM15 TRUE
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#define STM32_TIM15_IS_32BITS FALSE
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#define STM32_TIM15_CHANNELS 2
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@ -272,6 +269,7 @@
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STM32_DMA_STREAM_ID_MSK(1, 4))
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#define STM32_USART1_TX_DMA_CHN 0x00008080
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#if defined(STM32F030x8) || defined(STM32F030xC) || defined(__DOXYGEN__)
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#define STM32_HAS_USART2 TRUE
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#define STM32_USART2_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 1) |\
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STM32_DMA_STREAM_ID_MSK(1, 3) |\
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@ -280,8 +278,11 @@
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#define STM32_USART2_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\
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STM32_DMA_STREAM_ID_MSK(1, 4))
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#define STM32_USART2_TX_DMA_CHN 0x00009090
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#else
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#define STM32_HAS_USART2 FALSE
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#endif
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#if defined(STM32F030xC)
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#if defined(STM32F030xC) || defined(__DOXYGEN__)
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#define STM32_HAS_USART3 TRUE
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#define STM32_USART3_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 1) |\
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STM32_DMA_STREAM_ID_MSK(1, 3) |\
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@ -89,6 +89,7 @@
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*****************************************************************************
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*** Next ***
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- NEW: Added STM32F030x4 support.
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- NEW: Added a Managed Flash Storage module to the HAL.
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- NEW: Modified the STM32 OTGv1 driver to work without pump thread, transfers
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are now done in the ISR.
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