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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@261 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2008-04-13 09:46:55 +00:00
parent f0c8dde933
commit 18030639fb
4 changed files with 277 additions and 4 deletions
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1
demos/ARMCM3-STM32F103-GCC/Makefile
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@ -63,6 +63,7 @@ UADEFS =
# List ARM-mode C source files here
SRC = ../../ports/ARMCM3/chcore.c ../../ports/ARMCM3/nvic.c \
../../ports/ARMCM3-STM32F103/stm32_serial.c \
../../src/chinit.c ../../src/chdebug.c ../../src/chlists.c ../../src/chdelta.c \
../../src/chschd.c ../../src/chthreads.c ../../src/chsem.c ../../src/chmtx.c \
../../src/chevents.c ../../src/chmsg.c ../../src/chsleep.c ../../src/chqueues.c \

8
demos/ARMCM3-STM32F103-GCC/stm32lib/stm32f10x_conf.h
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@ -106,10 +106,10 @@
//#define _TIM4
/************************************* USART **********************************/
//#define _USART
//#define _USART1
//#define _USART2
//#define _USART3
#define _USART
#define _USART1
#define _USART2
#define _USART3
/************************************* WWDG ***********************************/
//#define _WWDG

164
ports/ARMCM3-STM32F103/stm32_serial.c Normal file
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@ -0,0 +1,164 @@
/*
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <ch.h>
#include "board.h"
#include "stm32_serial.h"
#ifdef USE_USART1
FullDuplexDriver COM1;
static uint8_t ib1[SERIAL_BUFFERS_SIZE];
static uint8_t ob1[SERIAL_BUFFERS_SIZE];
#endif
#ifdef USE_USART2
FullDuplexDriver COM2;
static uint8_t ib2[SERIAL_BUFFERS_SIZE];
static uint8_t ob2[SERIAL_BUFFERS_SIZE];
#endif
#ifdef USE_USART3
FullDuplexDriver COM3;
static uint8_t ib3[SERIAL_BUFFERS_SIZE];
static uint8_t ob3[SERIAL_BUFFERS_SIZE];
#endif
static void SetError(uint16_t sr, FullDuplexDriver *com) {
dflags_t sts = 0;
if (sr & SR_ORE)
sts |= SD_OVERRUN_ERROR;
if (sr & SR_PE)
sts |= SD_PARITY_ERROR;
if (sr & SR_FE)
sts |= SD_FRAMING_ERROR;
if (sr & SR_LBD)
sts |= SD_BREAK_DETECTED;
chFDDAddFlagsI(com, sts);
}
static void ServeInterrupt(USART_TypeDef *u, FullDuplexDriver *com) {
}
#ifdef USE_USART1
/*
* USART1 IRQ service routine.
*/
void VectorD4(void) {
chSysIRQEnterI();
ServeInterrupt(USART1, &COM1);
chSysIRQExitI();
}
/*
* Invoked by the high driver when one or more bytes are inserted in the
* output queue.
*/
static void OutNotify1(void) {
USART1->CR1 |= CR1_TXEIE;
}
#endif
#ifdef USE_USART2
/*
* USART2 IRQ service routine.
*/
void VectorD8(void) {
chSysIRQEnterI();
ServeInterrupt(USART2, &COM2);
chSysIRQExitI();
}
/*
* Invoked by the high driver when one or more bytes are inserted in the
* output queue.
*/
static void OutNotify2(void) {
USART2->CR1 |= CR1_TXEIE;
}
#endif
#ifdef USE_USART3
/*
* USART3 IRQ service routine.
*/
void VectorDC(void) {
chSysIRQEnterI();
ServeInterrupt(USART3, &COM3);
chSysIRQExitI();
}
/*
* Invoked by the high driver when one or more bytes are inserted in the
* output queue.
*/
static void OutNotify3(void) {
USART3->CR1 |= CR1_TXEIE;
}
#endif
/*
* USART setup, must be invoked with interrupts disabled.
* NOTE: Does not reset I/O queues.
*/
void SetUSARTI(USART_TypeDef *u, uint32_t speed, uint16_t cr1,
uint16_t cr2, uint16_t cr3) {
/*
* Baud rate setting.
*/
if (u == USART1)
u->BRR = APB2CLK / speed;
else
u->BRR = APB1CLK / speed;
/*
* Note that some bits are enforced.
*/
u->CR1 = cr1 | CR1_UE | CR1_PEIE | CR1_RXNEIE | CR1_TE | CR1_RE;
u->CR2 = cr2;
u->CR3 = cr3 | CR3_EIE;
}
/*
* Serial subsystem initialization.
* NOTE: Handshake pins are not switched to their function because they may have
* another use. Enable them externally if needed.
*/
void InitSerial(uint32_t prio1, uint32_t prio2, uint32_t prio3) {
/* I/O queues setup.*/
#ifdef USE_USART1
chFDDInit(&COM1, ib1, sizeof ib1, NULL, ob1, sizeof ob1, OutNotify1);
#endif
#ifdef USE_USART2
chFDDInit(&COM2, ib2, sizeof ib2, NULL, ob2, sizeof ob2, OutNotify2);
#endif
#ifdef USE_USART3
chFDDInit(&COM3, ib3, sizeof ib3, NULL, ob3, sizeof ob3, OutNotify3);
#endif
}

108
ports/ARMCM3-STM32F103/stm32_serial.h Normal file
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@ -0,0 +1,108 @@
/*
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _STM32_SERIAL_H_
#define _STM32_SERIAL_H_
#define USE_USART1
#define USE_USART2
#define USE_USART3
/*
* Configuration parameter, you can change the depth of the queue buffers
* depending on the requirements of your application.
*/
#define SERIAL_BUFFERS_SIZE 128
/*
* USARTs definitions here, ST headers are not good enough IMHO.
*/
#define SR_PE (1 << 0)
#define SR_FE (1 << 1)
#define SR_NE (1 << 2)
#define SR_ORE (1 << 3)
#define SR_IDLE (1 << 4)
#define SR_RXNE (1 << 5)
#define SR_TC (1 << 6)
#define SR_TXE (1 << 7)
#define SR_LBD (1 << 8)
#define SR_CTS (1 << 9)
#define CR1_SBK (1 << 0)
#define CR1_RWU (1 << 1)
#define CR1_RE (1 << 2)
#define CR1_TE (1 << 3)
#define CR1_IDLEIE (1 << 4)
#define CR1_RXNEIE (1 << 5)
#define CR1_TCIE (1 << 6)
#define CR1_TXEIE (1 << 7)
#define CR1_PEIE (1 << 8)
#define CR1_PS (1 << 9)
#define CR1_PCE (1 << 10)
#define CR1_WAKE (1 << 11)
#define CR1_M (1 << 12)
#define CR1_UE (1 << 13)
#define CR2_ADD_MASK (15 << 0)
#define CR2_LBDL (1 << 5)
#define CR2_LBDIE (1 << 6)
#define CR2_CBCL (1 << 8)
#define CR2_CPHA (1 << 9)
#define CR2_CPOL (1 << 10)
#define CR2_CLKEN (1 << 11)
#define CR2_STOP_MASK (3 << 12)
#define CR2_STOP1_BITS (0 << 12
#define CR2_STOP0P5_BITS (1 << 12
#define CR2_STOP2_BITS (2 << 12
#define CR2_STOP1P5_BITS (3 << 12
#define CR2_LINEN (1 << 14)
#define CR3_EIE (1 << 0)
#define CR3_IREN (1 << 1)
#define CR3_IRLP (1 << 2)
#define CR3_HDSEL (1 << 3)
#define CR3_NACK (1 << 4)
#define CR3_SCEN (1 << 5)
#define CR3_DMAR (1 << 6)
#define CR3_DMAT (1 << 7)
#define CR3_RTSE (1 << 8)
#define CR3_CTSE (1 << 9)
#define CR3_CTSIE (1 << 10)
#ifdef USE_USART1
extern FullDuplexDriver COM1;
#endif
#ifdef USE_USART2
extern FullDuplexDriver COM2;
#endif
#ifdef USE_USART3
extern FullDuplexDriver COM3;
#endif
#ifdef __cplusplus
extern "C" {
#endif
void InitSerial(uint32_t prio1, uint32_t prio2, uint32_t prio3);
void SetUSARTI(USART_TypeDef *u, uint32_t speed, uint16_t cr1,
uint16_t cr2, uint16_t cr3);
#ifdef __cplusplus
}
#endif
#endif /* _STM32_SERIAL_H_ */