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Improved STM32F469I-Discovery/mcuconf.h enabling SYSCLK up to 180 MHz when OTG is enabled 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9597 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
Rocco Marco Guglielmi 2016-06-06 07:42:00 +00:00
parent 38416ed55e
commit 1a7543117c
1 changed files with 2 additions and 2 deletions
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4
demos/STM32/RT-STM32F469I-DISCOVERY/mcuconf.h
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@ -45,7 +45,7 @@
#define STM32_SW STM32_SW_PLL
#define STM32_PLLSRC STM32_PLLSRC_HSE
#define STM32_PLLM_VALUE 8
#define STM32_PLLN_VALUE 336
#define STM32_PLLN_VALUE 360
#define STM32_PLLP_VALUE 2
#define STM32_PLLQ_VALUE 7
#define STM32_PLLI2SN_VALUE 192
@ -67,7 +67,7 @@
#define STM32_I2SSRC STM32_I2SSRC_PLLI2S
#define STM32_SAI1SEL STM32_SAI2SEL_PLLR
#define STM32_SAI2SEL STM32_SAI2SEL_PLLR
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_CK48MSEL STM32_CK48MSEL_PLLSAI
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE