From 1c8a61478bc427ba54ca251c71b9d7bb80825ca1 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sat, 2 Sep 2023 16:44:26 +0000 Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@16382 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- os/hal/ports/STM32/LLD/RCCv1/stm32_pll1.inc | 2 +- os/hal/ports/STM32/LLD/RCCv1/stm32_pll2.inc | 2 +- os/hal/ports/STM32/LLD/RCCv1/stm32_pll3.inc | 2 +- os/hal/ports/STM32/STM32H5xx/hal_lld.h | 5 ----- 4 files changed, 3 insertions(+), 8 deletions(-) diff --git a/os/hal/ports/STM32/LLD/RCCv1/stm32_pll1.inc b/os/hal/ports/STM32/LLD/RCCv1/stm32_pll1.inc index 7c5f9934d..e64130ad9 100644 --- a/os/hal/ports/STM32/LLD/RCCv1/stm32_pll1.inc +++ b/os/hal/ports/STM32/LLD/RCCv1/stm32_pll1.inc @@ -214,7 +214,7 @@ #if ((STM32_PLL1M_VALUE >= STM32_PLL1M_VALUE_MIN) && \ (STM32_PLL1M_VALUE <= STM32_PLL1M_VALUE_MAX)) || \ defined(__DOXYGEN__) -#define STM32_PLL1M ((STM32_PLL1M_VALUE - 1U) << RCC_PLL1CFGR_PLL1M_Pos) +#define STM32_PLL1M (STM32_PLL1M_VALUE << RCC_PLL1CFGR_PLL1M_Pos) #else #error "invalid STM32_PLL1M_VALUE value specified" diff --git a/os/hal/ports/STM32/LLD/RCCv1/stm32_pll2.inc b/os/hal/ports/STM32/LLD/RCCv1/stm32_pll2.inc index b7bb02e68..2e876fed3 100644 --- a/os/hal/ports/STM32/LLD/RCCv1/stm32_pll2.inc +++ b/os/hal/ports/STM32/LLD/RCCv1/stm32_pll2.inc @@ -214,7 +214,7 @@ #if ((STM32_PLL2M_VALUE >= STM32_PLL2M_VALUE_MIN) && \ (STM32_PLL2M_VALUE <= STM32_PLL2M_VALUE_MAX)) || \ defined(__DOXYGEN__) -#define STM32_PLL2M ((STM32_PLL2M_VALUE - 1U) << RCC_PLL2CFGR_PLL2M_Pos) +#define STM32_PLL2M (STM32_PLL2M_VALUE << RCC_PLL2CFGR_PLL2M_Pos) #else #error "invalid STM32_PLL2M_VALUE value specified" diff --git a/os/hal/ports/STM32/LLD/RCCv1/stm32_pll3.inc b/os/hal/ports/STM32/LLD/RCCv1/stm32_pll3.inc index 7d0c70c32..47420a0a9 100644 --- a/os/hal/ports/STM32/LLD/RCCv1/stm32_pll3.inc +++ b/os/hal/ports/STM32/LLD/RCCv1/stm32_pll3.inc @@ -214,7 +214,7 @@ #if ((STM32_PLL3M_VALUE >= STM32_PLL3M_VALUE_MIN) && \ (STM32_PLL3M_VALUE <= STM32_PLL3M_VALUE_MAX)) || \ defined(__DOXYGEN__) -#define STM32_PLL3M ((STM32_PLL3M_VALUE - 1U) << RCC_PLL3CFGR_PLL3M_Pos) +#define STM32_PLL3M (STM32_PLL3M_VALUE << RCC_PLL3CFGR_PLL3M_Pos) #else #error "invalid STM32_PLL3M_VALUE value specified" diff --git a/os/hal/ports/STM32/STM32H5xx/hal_lld.h b/os/hal/ports/STM32/STM32H5xx/hal_lld.h index 510b70eae..10054530c 100644 --- a/os/hal/ports/STM32/STM32H5xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32H5xx/hal_lld.h @@ -1445,11 +1445,6 @@ (STM32_SPI4SEL == STM32_SPI4SEL_PLL3P) || \ (STM32_SPI5SEL == STM32_SPI5SEL_PLL3P) || \ (STM32_SPI6SEL == STM32_SPI6SEL_PLL3P) || \ - (STM32_MCO1SEL == STM32_MCO1SEL_PLL1P) || \ - (STM32_MCO2SEL == STM32_MCO2SEL_PLL1P) || \ - (STM32_SPI1SEL == STM32_SPI1SEL_PLL1Q) || \ - (STM32_SPI2SEL == STM32_SPI2SEL_PLL1Q) || \ - (STM32_SPI3SEL == STM32_SPI3SEL_PLL1Q) || \ (STM32_USBSEL == STM32_USBSEL_PLL3Q) || \ (STM32_I2C1SEL == STM32_I2C1SEL_PLL3R) || \ (STM32_I2C2SEL == STM32_I2C2SEL_PLL3R) || \