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ChibiOS
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@15731 27425a3e-05d8-49a3-a47f-9c15f0e5edd8

This commit is contained in:
Giovanni Di Sirio 2022-08-21 15:40:08 +00:00
parent 7e987ca18b
commit 1d89914815
3 changed files with 10 additions and 6 deletions
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1
os/hal/ports/STM32/LLD/ADCv1/hal_adc_lld.c
View File

@ -218,6 +218,7 @@ void adc_lld_start(ADCDriver *adcp) {
(stm32_dmaisr_t)adc_lld_serve_rx_interrupt,
(void *)adcp);
osalDbgAssert(adcp->dmastp != NULL, "unable to allocate stream");
rccResetADC1();
rccEnableADC1(true);
/* DMA setup.*/

3
os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c
View File

@ -248,6 +248,7 @@ void adc_lld_start(ADCDriver *adcp) {
(void *)adcp);
osalDbgAssert(adcp->dmastp != NULL, "unable to allocate stream");
dmaStreamSetPeripheral(adcp->dmastp, &ADC1->DR);
rccResetADC1(true);
rccEnableADC1(true);
}
#endif /* STM32_ADC_USE_ADC1 */
@ -260,6 +261,7 @@ void adc_lld_start(ADCDriver *adcp) {
(void *)adcp);
osalDbgAssert(adcp->dmastp != NULL, "unable to allocate stream");
dmaStreamSetPeripheral(adcp->dmastp, &ADC2->DR);
rccResetADC2(true);
rccEnableADC2(true);
}
#endif /* STM32_ADC_USE_ADC2 */
@ -272,6 +274,7 @@ void adc_lld_start(ADCDriver *adcp) {
(void *)adcp);
osalDbgAssert(adcp->dmastp != NULL, "unable to allocate stream");
dmaStreamSetPeripheral(adcp->dmastp, &ADC3->DR);
rccResetADC3(true);
rccEnableADC3(true);
}
#endif /* STM32_ADC_USE_ADC3 */

12
os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c
View File

@ -555,30 +555,30 @@ void adc_lld_init(void) {
#if defined(STM32F3XX)
#if STM32_HAS_ADC1 && STM32_HAS_ADC2
#if STM32_ADC_USE_ADC1 || STM32_ADC_USE_ADC2
rccEnableADC12(true);
rccResetADC12();
rccEnableADC12(true);
ADC1_2_COMMON->CCR = STM32_ADC_ADC12_CLOCK_MODE | ADC_DMA_MDMA;
rccDisableADC12();
#endif
#else
#if STM32_ADC_USE_ADC1
rccEnableADC12(true);
rccResetADC12();
rccEnableADC12(true);
ADC1_COMMON->CCR = STM32_ADC_ADC12_CLOCK_MODE | ADC_DMA_MDMA;
rccDisableADC12();
#endif
#endif
#if STM32_ADC_USE_ADC3 || STM32_ADC_USE_ADC4
rccEnableADC34(true);
rccResetADC34();
rccEnableADC34(true);
ADC3_4_COMMON->CCR = STM32_ADC_ADC34_CLOCK_MODE | ADC_DMA_MDMA;
rccDisableADC34();
#endif
#endif
#if defined(STM32L4XX) || defined(STM32L4XXP)
rccEnableADC123(true);
rccResetADC123();
rccEnableADC123(true);
#if defined(ADC1_2_COMMON)
ADC1_2_COMMON->CCR = STM32_ADC_ADC123_PRESC | STM32_ADC_ADC123_CLOCK_MODE | ADC_DMA_MDMA;
#elif defined(ADC12_COMMON)
@ -593,8 +593,8 @@ void adc_lld_init(void) {
#if defined(STM32G4XX)
#if STM32_ADC_USE_ADC1 || STM32_ADC_USE_ADC2
rccEnableADC12(true);
rccResetADC12();
rccEnableADC12(true);
ADC12_COMMON->CCR = STM32_ADC_ADC12_PRESC | STM32_ADC_ADC12_CLOCK_MODE | ADC_DMA_MDMA;
rccDisableADC12();
#endif
@ -608,8 +608,8 @@ void adc_lld_init(void) {
#if defined(STM32WBXX)
#if STM32_ADC_USE_ADC1
rccEnableADC1(true);
rccResetADC1();
rccEnableADC1(true);
ADC1_COMMON->CCR = STM32_ADC_ADC1_PRESC | STM32_ADC_ADC1_CLOCK_MODE;
rccDisableADC1();
#endif