git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7818 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -267,6 +267,12 @@ struct context {
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sizeof(struct port_extctx) + \
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sizeof(struct port_extctx) + \
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((size_t)(n)) + ((size_t)(PORT_INT_REQUIRED_STACK)))
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((size_t)(n)) + ((size_t)(PORT_INT_REQUIRED_STACK)))
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/**
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* @brief Priority level verification macro.
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* @todo Add the required parameters to armparams.h.
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*/
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#define PORT_IRQ_IS_VALID_PRIORITY(n) false
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/**
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/**
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* @brief IRQ prologue code.
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* @brief IRQ prologue code.
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* @details This macro must be inserted at the start of all IRQ handlers
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* @details This macro must be inserted at the start of all IRQ handlers
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@ -474,10 +480,10 @@ static inline void port_disable(void) {
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__asm volatile ("bl _port_disable_thumb" : : : "r3", "lr", "memory");
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__asm volatile ("bl _port_disable_thumb" : : : "r3", "lr", "memory");
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#else
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#else
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__asm volatile ("mrs r3, CPSR \n\t"
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__asm volatile ("mrs r3, CPSR \n\t"
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"orr r3, #0x80 \n\t"
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"orr r3, #0x80 \n\t"
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"msr CPSR_c, r3 \n\t"
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"msr CPSR_c, r3 \n\t"
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"orr r3, #0x40 \n\t"
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"orr r3, #0x40 \n\t"
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"msr CPSR_c, r3" : : : "r3", "memory");
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"msr CPSR_c, r3" : : : "r3", "memory");
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#endif
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#endif
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}
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}
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@ -14,7 +14,7 @@ What's new in RT 3.0
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- Entirely static for enhanced safety.
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- Entirely static for enhanced safety.
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- System data is now encapsulated in a single "ch" global structure for enhanced safety.
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- System data is now encapsulated in a single "ch" global structure for enhanced safety.
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- System integrity check runtime functionality for enhanced safety.
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- System integrity check runtime functionality for enhanced safety.
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- Tickless kernel mode helps implement ultra-low-power devices.
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- Tick-less kernel mode helps implement ultra-low-power devices.
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- High Resolution Virtual Timers module allows to specify very short intervals.
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- High Resolution Virtual Timers module allows to specify very short intervals.
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- High Resolution system time.
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- High Resolution system time.
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- Clock-cycle accurate Time Measurement module.
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- Clock-cycle accurate Time Measurement module.
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@ -45,7 +45,7 @@ New addition NIL 1.0
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- Entirely static for enhanced safety.
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- Entirely static for enhanced safety.
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- No linked lists anywhere in the code for enhanced safety.
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- No linked lists anywhere in the code for enhanced safety.
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- System data is encapsulated in a single "nil" global structure for enhanced safety.
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- System data is encapsulated in a single "nil" global structure for enhanced safety.
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- Tickless kernel mode helps implement ultra-low-power devices.
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- Tick-less kernel mode helps implement ultra-low-power devices.
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- Ultra compact kernel, well below 1kB in its maximum configuration.
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- Ultra compact kernel, well below 1kB in its maximum configuration.
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- Upward compatible with RT, it implements a subset of the RT API.
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- Upward compatible with RT, it implements a subset of the RT API.
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- Reduced RAM usage, 20-28 bytes for task and just 4 bytes for a semaphore on 32 bits architectures, half of that on 8/16 bits architectures.
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- Reduced RAM usage, 20-28 bytes for task and just 4 bytes for a semaphore on 32 bits architectures, half of that on 8/16 bits architectures.
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