diff --git a/os/rt/ports/ARMCMx/chcore_v7m.c b/os/rt/ports/ARMCMx/chcore_v7m.c index 288f58b5a..3d7f0fa97 100644 --- a/os/rt/ports/ARMCMx/chcore_v7m.c +++ b/os/rt/ports/ARMCMx/chcore_v7m.c @@ -136,6 +136,7 @@ void _port_irq_epilogue(void) { /* Setting up a fake XPSR register value.*/ ctxp->xpsr = (regarm_t)0x01000000; + ctxp->fpscr = (regarm_t)FPU->FPDSCR; /* Writing back the modified PSP value.*/ __set_PSP((uint32_t)ctxp); diff --git a/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/debug/STM32F4xx-IRQ_STORM_FPU (OpenOCD, Flash and Run).launch b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/debug/STM32F4xx-IRQ_STORM_FPU (OpenOCD, Flash and Run).launch new file mode 100644 index 000000000..198b9537a --- /dev/null +++ b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/debug/STM32F4xx-IRQ_STORM_FPU (OpenOCD, Flash and Run).launch @@ -0,0 +1,52 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/main.c b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/main.c index 7ec769a9c..ad81f8b48 100644 --- a/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/main.c +++ b/testhal/STM32/STM32F4xx/IRQ_STORM_FPU/main.c @@ -147,6 +147,12 @@ static const GPTConfig gpt3cfg = { /* Generic demo code. */ /*===========================================================================*/ +CH_FAST_IRQ_HANDLER(Vector184) { + + while (1) + ; +} + static void print(char *p) { while (*p) { @@ -183,6 +189,9 @@ int main(void) { unsigned i; gptcnt_t interval, threshold, worst; + /* Enables FPU exceptions.*/ + nvicEnableVector(FPU_IRQn, 1); + /* * System initializations. * - HAL initialization, this also initializes the configured device drivers