Fixed bug #651.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8385 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
Giovanni Di Sirio
parent
74861c6e36
commit
1f10e52dd5
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@ -55,11 +55,23 @@
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#define STM32_TIM1_CC_HANDLER Vector78
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#define STM32_TIM2_HANDLER Vector7C
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#define STM32_TIM3_HANDLER Vector80
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#define STM32_TIM6_HANDLER Vector84
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#define STM32_TIM7_HANDLER Vector88
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#define STM32_TIM14_HANDLER Vector8C
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#define STM32_TIM15_HANDLER Vector90
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#define STM32_TIM16_HANDLER Vector94
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#define STM32_TIM17_HANDLER Vector98
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#define STM32_TIM1_UP_NUMBER 13
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#define STM32_TIM1_CC_NUMBER 14
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#define STM32_TIM2_NUMBER 15
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#define STM32_TIM3_NUMBER 16
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#define STM32_TIM6_NUMBER 17
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#define STM32_TIM7_NUMBER 18
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#define STM32_TIM14_NUMBER 19
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#define STM32_TIM15_NUMBER 20
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#define STM32_TIM16_NUMBER 21
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#define STM32_TIM17_NUMBER 22
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/*
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* USART units.
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@ -555,6 +555,168 @@
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* @api
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*/
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#define rccResetTIM3() rccResetAPB1(RCC_APB1RSTR_TIM3RST)
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/**
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* @brief Enables the TIM6 peripheral clock.
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* @note The @p lp parameter is ignored in this family.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccEnableTIM6(lp) rccEnableAPB1(RCC_APB1ENR_TIM6EN, lp)
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/**
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* @brief Disables the TIM6 peripheral clock.
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* @note The @p lp parameter is ignored in this family.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccDisableTIM6(lp) rccDisableAPB1(RCC_APB1ENR_TIM6EN, lp)
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/**
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* @brief Resets the TIM6 peripheral.
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*
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* @api
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*/
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#define rccResetTIM6() rccResetAPB1(RCC_APB1RSTR_TIM6RST)
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/**
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* @brief Enables the TIM7 peripheral clock.
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* @note The @p lp parameter is ignored in this family.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccEnableTIM7(lp) rccEnableAPB1(RCC_APB1ENR_TIM7EN, lp)
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/**
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* @brief Disables the TIM7 peripheral clock.
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* @note The @p lp parameter is ignored in this family.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccDisableTIM7(lp) rccDisableAPB1(RCC_APB1ENR_TIM7EN, lp)
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/**
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* @brief Resets the TIM7 peripheral.
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*
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* @api
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*/
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#define rccResetTIM7() rccResetAPB1(RCC_APB1RSTR_TIM7RST)
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/**
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* @brief Enables the TIM14 peripheral clock.
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* @note The @p lp parameter is ignored in this family.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccEnableTIM14(lp) rccEnableAPB1(RCC_APB1ENR_TIM14EN, lp)
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/**
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* @brief Disables the TIM14 peripheral clock.
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* @note The @p lp parameter is ignored in this family.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccDisableTIM14(lp) rccDisableAPB1(RCC_APB1ENR_TIM14EN, lp)
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/**
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* @brief Resets the TIM14 peripheral.
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*
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* @api
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*/
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#define rccResetTIM14() rccResetAPB1(RCC_APB1RSTR_TIM14RST)
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/**
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* @brief Enables the TIM15 peripheral clock.
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* @note The @p lp parameter is ignored in this family.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccEnableTIM15(lp) rccEnableAPB1(RCC_APB2ENR_TIM15EN, lp)
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/**
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* @brief Disables the TIM15 peripheral clock.
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* @note The @p lp parameter is ignored in this family.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccDisableTIM15(lp) rccDisableAPB1(RCC_APB2ENR_TIM15EN, lp)
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/**
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* @brief Resets the TIM15 peripheral.
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*
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* @api
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*/
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#define rccResetTIM15() rccResetAPB1(RCC_APB2RSTR_TIM15RST)
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/**
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* @brief Enables the TIM16 peripheral clock.
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* @note The @p lp parameter is ignored in this family.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccEnableTIM16(lp) rccEnableAPB1(RCC_APB2ENR_TIM16EN, lp)
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/**
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* @brief Disables the TIM16 peripheral clock.
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* @note The @p lp parameter is ignored in this family.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccDisableTIM16(lp) rccDisableAPB1(RCC_APB2ENR_TIM16EN, lp)
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/**
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* @brief Resets the TIM16 peripheral.
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*
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* @api
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*/
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#define rccResetTIM16() rccResetAPB1(RCC_APB2RSTR_TIM16RST)
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/**
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* @brief Enables the TIM17 peripheral clock.
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* @note The @p lp parameter is ignored in this family.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccEnableTIM17(lp) rccEnableAPB1(RCC_APB2ENR_TIM17EN, lp)
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/**
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* @brief Disables the TIM17 peripheral clock.
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* @note The @p lp parameter is ignored in this family.
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*
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* @param[in] lp low power enable flag
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*
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* @api
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*/
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#define rccDisableTIM17(lp) rccDisableAPB1(RCC_APB2ENR_TIM17EN, lp)
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/**
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* @brief Resets the TIM17 peripheral.
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*
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* @api
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*/
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#define rccResetTIM17() rccResetAPB1(RCC_APB2RSTR_TIM17RST)
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/** @} */
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/**
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@ -124,6 +124,8 @@
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- HAL: Updated STM32F0xx headers to STM32CubeF0 version 1.3.0. Added support
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for STM32F030xC, STM32F070x6, STM32F070xB, STM32F091xC,
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STM32F098xx devices.
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- HAL: Fixed missing RCC and ISR definitions for STM32F0xx timers (bug #651)
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(backported to 3.0.3 and 2.6.10).
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- HAL: Fixed incorrect compiler check in STM32 RTCv1 driver (bug #650)
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(backported to 3.0.3).
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- HAL: Fixed incorrect case in path (bug #649).
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