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ChibiOS
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4941 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2012-12-17 13:15:12 +00:00
parent 3341330bd9
commit 1f674a9703
1 changed files with 2 additions and 0 deletions
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2
os/hal/platforms/SPC563Mxx/hal_lld.c
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@ -114,6 +114,7 @@ void spc_clock_init(void) {
/* PLL activation.*/ /* PLL activation.*/
FMPLL.ESYNCR1.B.EMODE = 1; /* Enhanced mode on. */ FMPLL.ESYNCR1.B.EMODE = 1; /* Enhanced mode on. */
FMPLL.ESYNCR1.B.CLKCFG &= 1; /* Bypass mode, PLL off.*/ FMPLL.ESYNCR1.B.CLKCFG &= 1; /* Bypass mode, PLL off.*/
#if !SPC5_CLK_BYPASS
FMPLL.ESYNCR1.B.CLKCFG |= 2; /* PLL on. */ FMPLL.ESYNCR1.B.CLKCFG |= 2; /* PLL on. */
FMPLL.ESYNCR1.B.EPREDIV = SPC5_CLK_PREDIV; FMPLL.ESYNCR1.B.EPREDIV = SPC5_CLK_PREDIV;
FMPLL.ESYNCR1.B.EMFD = SPC5_CLK_MFD; FMPLL.ESYNCR1.B.EMFD = SPC5_CLK_MFD;
@ -121,6 +122,7 @@ void spc_clock_init(void) {
while (!FMPLL.SYNSR.B.LOCK) while (!FMPLL.SYNSR.B.LOCK)
; ;
FMPLL.ESYNCR1.B.CLKCFG |= 4; /* Clock from the PLL. */ FMPLL.ESYNCR1.B.CLKCFG |= 4; /* Clock from the PLL. */
#endif /* !SPC5_CLK_BYPASS */
#endif /* !SPC5_NO_INIT */ #endif /* !SPC5_NO_INIT */
} }