diff --git a/demos/ARM7-LPC214x-GCC-minimal/Makefile b/demos/ARM7-LPC214x-GCC-minimal/Makefile index f440f799d..e74d2f382 100644 --- a/demos/ARM7-LPC214x-GCC-minimal/Makefile +++ b/demos/ARM7-LPC214x-GCC-minimal/Makefile @@ -121,7 +121,7 @@ LIBS = $(DLIBS) $(ULIBS) MCFLAGS = -mcpu=$(MCU) ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(<:.s=.lst) $(ADEFS) -CPFLAGS = $(MCFLAGS) $(OPT) $(WARN) -Wa,-ahlms=$(<:.c=.lst) $(DEFS) +CPFLAGS = $(MCFLAGS) $(OPT) $(WARN) -Wa,-alms=$(<:.c=.lst) $(DEFS) LDFLAGS = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LIBDIR) ODFLAGS = -x --syms diff --git a/demos/ARM7-LPC214x-GCC-minimal/Makefile.thumb b/demos/ARM7-LPC214x-GCC-minimal/Makefile.thumb index 03f2c7ba9..68f308449 100644 --- a/demos/ARM7-LPC214x-GCC-minimal/Makefile.thumb +++ b/demos/ARM7-LPC214x-GCC-minimal/Makefile.thumb @@ -120,7 +120,7 @@ LIBS = $(DLIBS) $(ULIBS) MCFLAGS = -mcpu=$(MCU) ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(<:.s=.lst) $(ADEFS) -CPFLAGS = $(MCFLAGS) $(OPT) $(WARN) -Wa,-ahlms=$(<:.c=.lst) $(DEFS) +CPFLAGS = $(MCFLAGS) $(OPT) $(WARN) -Wa,-alms=$(<:.c=.lst) $(DEFS) LDFLAGS = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LIBDIR) ODFLAGS = -x --syms diff --git a/demos/ARM7-LPC214x-GCC/Makefile b/demos/ARM7-LPC214x-GCC/Makefile index 3698582e7..60c2df008 100644 --- a/demos/ARM7-LPC214x-GCC/Makefile +++ b/demos/ARM7-LPC214x-GCC/Makefile @@ -123,7 +123,7 @@ LIBS = $(DLIBS) $(ULIBS) MCFLAGS = -mcpu=$(MCU) ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(<:.s=.lst) $(ADEFS) -CPFLAGS = $(MCFLAGS) $(OPT) $(WARN) -Wa,-ahlms=$(<:.c=.lst) $(DEFS) +CPFLAGS = $(MCFLAGS) $(OPT) $(WARN) -Wa,-alms=$(<:.c=.lst) $(DEFS) LDFLAGS = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LIBDIR) ODFLAGS = -x --syms diff --git a/demos/ARM7-LPC214x-GCC/Makefile.thumb b/demos/ARM7-LPC214x-GCC/Makefile.thumb index c08d632f9..111fa8c7b 100644 --- a/demos/ARM7-LPC214x-GCC/Makefile.thumb +++ b/demos/ARM7-LPC214x-GCC/Makefile.thumb @@ -122,7 +122,7 @@ LIBS = $(DLIBS) $(ULIBS) MCFLAGS = -mcpu=$(MCU) ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(<:.s=.lst) $(ADEFS) -CPFLAGS = $(MCFLAGS) $(OPT) $(WARN) -Wa,-ahlms=$(<:.c=.lst) $(DEFS) +CPFLAGS = $(MCFLAGS) $(OPT) $(WARN) -Wa,-alms=$(<:.c=.lst) $(DEFS) LDFLAGS = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LIBDIR) ODFLAGS = -x --syms diff --git a/demos/ARM7-LPC214x-GCC/chcore2.s b/demos/ARM7-LPC214x-GCC/chcore2.s index 3bbffe26f..92d9d6d24 100644 --- a/demos/ARM7-LPC214x-GCC/chcore2.s +++ b/demos/ARM7-LPC214x-GCC/chcore2.s @@ -115,10 +115,11 @@ chSysSwitchI: * interrupt handler: * * High +------------+ - * | R12 | -+ + * | LR_USR | -+ + * | R12 | | * | R3 | | - * | R2 | | - * | R1 | | External context: IRQ handler frame + * | R2 | | External context: IRQ handler frame + * | R1 | | * | R0 | | * | LR_IRQ | | (user code return address) * | SPSR | -+ (user code status) @@ -136,7 +137,6 @@ chSysSwitchI: */ .globl IrqHandler IrqHandler: - sub lr, lr, #4 stmfd sp!, {r0-r3, r12, lr} #ifdef THUMB_NO_INTERWORKING add r0, pc, #1 @@ -152,7 +152,6 @@ IrqHandler: .globl T0IrqHandler T0IrqHandler: - sub lr, lr, #4 stmfd sp!, {r0-r3, r12, lr} #ifdef THUMB_NO_INTERWORKING add r0, pc, #1 @@ -168,7 +167,6 @@ T0IrqHandler: .globl UART0IrqHandler UART0IrqHandler: - sub lr, lr, #4 stmfd sp!, {r0-r3, r12, lr} #ifdef THUMB_NO_INTERWORKING add r0, pc, #1 @@ -184,7 +182,6 @@ UART0IrqHandler: .globl UART1IrqHandler UART1IrqHandler: - sub lr, lr, #4 stmfd sp!, {r0-r3, r12, lr} #ifdef THUMB_NO_INTERWORKING add r0, pc, #1 @@ -216,12 +213,13 @@ IrqCommon: bl chSchRescRequiredI #endif cmp r0, #0 // Simply returns if a - ldmeqfd sp!, {r0-r3, r12, pc}^ // reschedule is not required. + ldmeqfd sp!, {r0-r3, r12, lr} // reschedule is not + subeqs pc, lr, #4 // required. // Saves the IRQ mode registers in the system stack. ldmfd sp!, {r0-r3, r12, lr} // IRQ stack now empty. msr CPSR_c, #MODE_SYS | I_BIT - stmfd sp!, {r0-r3, r12} // Registers on System Stack. + stmfd sp!, {r0-r3, r12, lr} // Registers on System Stack. msr CPSR_c, #MODE_IRQ | I_BIT mrs r0, SPSR mov r1, lr @@ -247,6 +245,6 @@ IrqCommon: msr SPSR_fsxc, r0 mov lr, r1 msr CPSR_c, #MODE_SYS | I_BIT - ldmfd sp!, {r0-r3, r12} + ldmfd sp!, {r0-r3, r12, lr} msr CPSR_c, #MODE_IRQ | I_BIT - subs pc, lr, #0 + subs pc, lr, #4 diff --git a/readme.txt b/readme.txt index c9d29eeb8..61b5347d1 100644 --- a/readme.txt +++ b/readme.txt @@ -40,9 +40,15 @@ AVR-AT90CANx-GCC - Port on AVR AT90CAN128, not complete yet. ***************************************************************************** *** 0.4.4 *** +- Fixed a very important bug in the preemption ARM code, important enough to + make this update *mandatory*. + Note: This is not a kernel bug but something specific with the ARM port, the + other ports are not affected. - Fixed a nasty bug in the pure THUMB mode threads trampoline code (chcore2.s, threadstart), it failed on THUMB threads returning with a "bx" instruction. The bug did not affect ARM mode or THUMB with interworking mode. + Note: This is not a kernel bug but something specific with the ARM port, the + other ports are not affected. - Fixed a bug in chIQGetTimeout(), interrupts were not re-enabled when exiting the function because a timeout. The problem affected that API only. - Fixed a potential problem in chSysInit(), it should not affect any past diff --git a/test/test.c b/test/test.c index 289e74a3f..15b70b9d4 100644 --- a/test/test.c +++ b/test/test.c @@ -310,7 +310,7 @@ t_msg TestThread(void *p) { } print("Queues throughput = "); printn(i * 4); - print(" bytes/S"); + println(" bytes/S"); println("\r\nTest complete"); return 0;