git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7596 35acf78f-673a-0410-8e92-d51de3d6d3f4
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/*
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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you may not use this file except in compliance with the License.
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@ -14,7 +14,6 @@
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limitations under the License.
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limitations under the License.
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*/
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*/
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#include "ch.h"
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#include "hal.h"
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#include "hal.h"
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#if HAL_USE_PAL || defined(__DOXYGEN__)
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#if HAL_USE_PAL || defined(__DOXYGEN__)
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@ -23,26 +22,43 @@
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* @details Digital I/O ports static configuration as defined in @p board.h.
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* @details Digital I/O ports static configuration as defined in @p board.h.
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* This variable is used by the HAL when initializing the PAL driver.
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* This variable is used by the HAL when initializing the PAL driver.
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*/
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*/
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const PALConfig pal_default_config =
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const PALConfig pal_default_config = {
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{
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#if STM32_HAS_GPIOA
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{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
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{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
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VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
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VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
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#endif
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#if STM32_HAS_GPIOB
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{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
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{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
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VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
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VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
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#endif
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#if STM32_HAS_GPIOC
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{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
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{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
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VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
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VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
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#endif
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#if STM32_HAS_GPIOD
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{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
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{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
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VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
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VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
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#endif
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#if STM32_HAS_GPIOE
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{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
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{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
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VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
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VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
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#endif
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#if STM32_HAS_GPIOF
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{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
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{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
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VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
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VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
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#endif
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#if STM32_HAS_GPIOG
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{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
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{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
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VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
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VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
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#endif
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#if STM32_HAS_GPIOH
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{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
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{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
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VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
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VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
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#endif
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#if STM32_HAS_GPIOI
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{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
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{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
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VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
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VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
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#endif
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};
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};
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#endif
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#endif
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@ -60,21 +76,21 @@ void __early_init(void) {
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/**
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/**
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* @brief SDC card detection.
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* @brief SDC card detection.
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*/
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*/
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bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
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bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
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static bool_t last_status = FALSE;
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static bool last_status = false;
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if (blkIsTransferring(sdcp))
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if (blkIsTransferring(sdcp))
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return last_status;
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return last_status;
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return last_status = (bool_t)palReadPad(GPIOC, GPIOC_SD_D3);
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return last_status = (bool)palReadPad(GPIOC, GPIOC_SD_D3);
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}
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}
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/**
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/**
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* @brief SDC card write protection detection.
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* @brief SDC card write protection detection.
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*/
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*/
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bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
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bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
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(void)sdcp;
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(void)sdcp;
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return FALSE;
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return false;
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}
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}
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#endif /* HAL_USE_SDC */
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#endif /* HAL_USE_SDC */
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/**
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/**
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* @brief MMC_SPI card detection.
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* @brief MMC_SPI card detection.
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*/
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*/
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bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
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bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
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(void)mmcp;
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(void)mmcp;
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/* TODO: Fill the implementation.*/
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/* TODO: Fill the implementation.*/
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return TRUE;
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return true;
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}
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}
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/**
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/**
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* @brief MMC_SPI card write protection detection.
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* @brief MMC_SPI card write protection detection.
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*/
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*/
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bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
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bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
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(void)mmcp;
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(void)mmcp;
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/* TODO: Fill the implementation.*/
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/* TODO: Fill the implementation.*/
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return FALSE;
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return false;
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}
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}
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#endif
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#endif
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/*
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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you may not use this file except in compliance with the License.
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#define _BOARD_H_
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#define _BOARD_H_
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/*
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/*
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* Setup for Olimex STM32-E407 board.
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* Setup for Olimex STM32-E407 (rev.D) board.
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*/
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*/
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/*
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/*
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* Board identifier.
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* Board identifier.
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*/
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*/
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#define BOARD_OLIMEX_STM32_E407
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#define BOARD_OLIMEX_STM32_E407_REV_D
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#define BOARD_NAME "Olimex STM32-E407"
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#define BOARD_NAME "Olimex STM32-E407 (rev.D)"
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/*
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/*
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* Ethernet PHY type.
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* Ethernet PHY type.
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/*
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/*
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* MCU type as defined in the ST header.
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* MCU type as defined in the ST header.
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*/
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*/
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#define STM32F40_41xxx
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#define STM32F407xx
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/*
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/*
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* IO pins assignments.
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* IO pins assignments.
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# List of all the board related files.
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# List of all the board related files.
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BOARDSRC = ${CHIBIOS}/boards/OLIMEX_STM32_E407/board.c
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BOARDSRC = ${CHIBIOS}/os/hal/boards/OLIMEX_STM32_E407_REV_D/board.c
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# Required include directories
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# Required include directories
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BOARDINC = ${CHIBIOS}/boards/OLIMEX_STM32_E407
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BOARDINC = ${CHIBIOS}/os/hal/boards/OLIMEX_STM32_E407_REV_D
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<configuration_settings>
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<configuration_settings>
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<templates_path>resources/gencfg/processors/boards/stm32f4xx/templates</templates_path>
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<templates_path>resources/gencfg/processors/boards/stm32f4xx/templates</templates_path>
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<output_path>..</output_path>
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<output_path>..</output_path>
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<hal_version>3.0.x</hal_version>
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</configuration_settings>
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</configuration_settings>
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<board_name>Olimex STM32-E407</board_name>
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<board_name>Olimex STM32-E407 (rev.D)</board_name>
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<board_id>OLIMEX_STM32_E407</board_id>
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<board_id>OLIMEX_STM32_E407_REV_D</board_id>
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<board_functions>
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<board_functions>
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<sdc_lld_is_card_inserted><![CDATA[ static bool_t last_status = FALSE;
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<sdc_lld_is_card_inserted><![CDATA[ static bool last_status = false;
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if (blkIsTransferring(sdcp))
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if (blkIsTransferring(sdcp))
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return last_status;
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return last_status;
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return last_status = (bool_t)palReadPad(GPIOC, GPIOC_SD_D3);]]></sdc_lld_is_card_inserted>
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return last_status = (bool)palReadPad(GPIOC, GPIOC_SD_D3);]]></sdc_lld_is_card_inserted>
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<sdc_lld_is_write_protected>
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<sdc_lld_is_write_protected>
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<![CDATA[ (void)sdcp;
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<![CDATA[ (void)sdcp;
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return FALSE;]]></sdc_lld_is_write_protected>
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return false;]]></sdc_lld_is_write_protected>
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</board_functions>
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</board_functions>
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<ethernet_phy>
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<ethernet_phy>
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<identifier>MII_LAN8710A_ID</identifier>
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<identifier>MII_LAN8710A_ID</identifier>
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<bus_type>RMII</bus_type>
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<bus_type>RMII</bus_type>
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</ethernet_phy>
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</ethernet_phy>
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<subtype>STM32F40_41xxx</subtype>
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<subtype>STM32F407xx</subtype>
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<clocks
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<clocks
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HSEFrequency="12000000"
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HSEFrequency="12000000"
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HSEBypass="false"
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HSEBypass="false"
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