git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@16367 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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@ -132,6 +132,25 @@
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#define STM32_SW_HSE STM32_SW_FIELD(2U)
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#define STM32_SW_PLL1P STM32_SW_FIELD(3U)
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#define STM32_STOPWUCK_MASK (1U << 6)
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#define STM32_STOPWUCK_FIELD(n) ((n) << 6)
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#define STM32_STOPWUCK_HSI STM32_STOPWUCK_FIELD(0U)
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#define STM32_STOPWUCK_CSI STM32_STOPWUCK_FIELD(1U)
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#define STM32_STOPKERWUCK_MASK (1U << 7)
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#define STM32_STOPKERWUCK_FIELD(n) ((n) << 7)
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#define STM32_STOPKERWUCK_HSI STM32_STOPKERWUCK_FIELD(0U)
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#define STM32_STOPKERWUCK_CSI STM32_STOPKERWUCK_FIELD(1U)
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#define STM32_RTCPRE_MASK (63U << 8)
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#define STM32_RTCPRE_FIELD(n) ((n) << 8)
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#define STM32_RTCPRE_NOCLOCK STM32_RTCPRE_FIELD(0U)
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#define STM32_TIMPRE_MASK (1U << 15)
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#define STM32_TIMPRE_FIELD(n) ((n) << 15)
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#define STM32_TIMPRE_LOW STM32_TIMPRE_FIELD(0U)
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#define STM32_TIMPRE_HIGH STM32_TIMPRE_FIELD(1U)
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#define STM32_MCO1SEL_MASK (7U << 22)
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#define STM32_MCO1PRE_FIELD(n) ((n) << 22)
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#define STM32_MCO1SEL_HSI STM32_MCO1PRE_FIELD(0U)
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@ -142,22 +161,7 @@
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#define STM32_MCO1PRE_MASK (7U << 18)
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#define STM32_MCO1PRE_FIELD(n) ((n) << 18)
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#define STM32_MCO1PRE_DISABLED STM32_MCO1PRE_FIELD(0U)
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#define STM32_MCO1PRE_DIV1 STM32_MCO1PRE_FIELD(1U)
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#define STM32_MCO1PRE_DIV2 STM32_MCO1PRE_FIELD(2U)
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#define STM32_MCO1PRE_DIV3 STM32_MCO1PRE_FIELD(3U)
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#define STM32_MCO1PRE_DIV4 STM32_MCO1PRE_FIELD(4U)
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#define STM32_MCO1PRE_DIV5 STM32_MCO1PRE_FIELD(5U)
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#define STM32_MCO1PRE_DIV6 STM32_MCO1PRE_FIELD(6U)
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#define STM32_MCO1PRE_DIV7 STM32_MCO1PRE_FIELD(7U)
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#define STM32_MCO1PRE_DIV8 STM32_MCO1PRE_FIELD(8U)
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#define STM32_MCO1PRE_DIV9 STM32_MCO1PRE_FIELD(9U)
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#define STM32_MCO1PRE_DIV10 STM32_MCO1PRE_FIELD(10U)
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#define STM32_MCO1PRE_DIV11 STM32_MCO1PRE_FIELD(11U)
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#define STM32_MCO1PRE_DIV12 STM32_MCO1PRE_FIELD(12U)
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#define STM32_MCO1PRE_DIV13 STM32_MCO1PRE_FIELD(13U)
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#define STM32_MCO1PRE_DIV14 STM32_MCO1PRE_FIELD(14U)
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#define STM32_MCO1PRE_DIV15 STM32_MCO1PRE_FIELD(15U)
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#define STM32_MCO1PRE_NOCLOCK STM32_MCO1PRE_FIELD(0U)
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#define STM32_MCO2SEL_MASK (7U << 29)
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#define STM32_MCO2PRE_FIELD(n) ((n) << 29)
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@ -170,22 +174,7 @@
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#define STM32_MCO2PRE_MASK (7U << 18)
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#define STM32_MCO2PRE_FIELD(n) ((n) << 18)
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#define STM32_MCO2PRE_DISABLED STM32_MCO2PRE_FIELD(0U)
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#define STM32_MCO2PRE_DIV1 STM32_MCO2PRE_FIELD(1U)
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#define STM32_MCO2PRE_DIV2 STM32_MCO2PRE_FIELD(2U)
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#define STM32_MCO2PRE_DIV3 STM32_MCO2PRE_FIELD(3U)
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#define STM32_MCO2PRE_DIV4 STM32_MCO2PRE_FIELD(4U)
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#define STM32_MCO2PRE_DIV5 STM32_MCO2PRE_FIELD(5U)
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#define STM32_MCO2PRE_DIV6 STM32_MCO2PRE_FIELD(6U)
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#define STM32_MCO2PRE_DIV7 STM32_MCO2PRE_FIELD(7U)
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#define STM32_MCO2PRE_DIV8 STM32_MCO2PRE_FIELD(8U)
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#define STM32_MCO2PRE_DIV9 STM32_MCO2PRE_FIELD(9U)
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#define STM32_MCO2PRE_DIV10 STM32_MCO2PRE_FIELD(10U)
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#define STM32_MCO2PRE_DIV11 STM32_MCO2PRE_FIELD(11U)
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#define STM32_MCO2PRE_DIV12 STM32_MCO2PRE_FIELD(12U)
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#define STM32_MCO2PRE_DIV13 STM32_MCO2PRE_FIELD(13U)
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#define STM32_MCO2PRE_DIV14 STM32_MCO2PRE_FIELD(14U)
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#define STM32_MCO2PRE_DIV15 STM32_MCO2PRE_FIELD(15U)
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#define STM32_MCO2PRE_NOCLOCK STM32_MCO2PRE_FIELD(0U)
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/** @} */
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/**
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@ -922,6 +911,34 @@
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#define STM32_PPRE3 STM32_PPRE3_DIV1
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#endif
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/**
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* @brief System clock source after STOP.
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*/
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#if !defined(STM32_STOPWUCK) || defined(__DOXYGEN__)
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#define STM32_STOPWUCK STM32_STOPWUCK_HSI
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#endif
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/**
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* @brief Kernel clock source after STOP.
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*/
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#if !defined(STM32_STOPKERWUCK) || defined(__DOXYGEN__)
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#define STM32_STOPKERWUCK STM32_STOPKERWUCK_HSI
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#endif
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/**
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* @brief RTC prescaler value.
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*/
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#if !defined(STM32_RTCPRE_VALUE) || defined(__DOXYGEN__)
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#define STM32_RTCPRE_VALUE STM32_RTCPRE_NOCLOCK
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#endif
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/**
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* @brief TIMPRE timers clocks prescaler selection.
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*/
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#if !defined(STM32_TIMPRE) || defined(__DOXYGEN__)
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#define STM32_TIMPRE STM32_TIMPRE_LOW
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#endif
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/**
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* @brief MCO1 clock source.
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*/
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@ -933,7 +950,7 @@
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* @brief MCO1 divider setting.
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*/
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#if !defined(STM32_MCO1PRE_VALUE) || defined(__DOXYGEN__)
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#define STM32_MCO1PRE_VALUE STM32_MCO1PRE_DISABLED
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#define STM32_MCO1PRE_VALUE STM32_MCO1PRE_NOCLOCK
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#endif
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/**
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* @brief MCO1 divider setting.
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*/
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#if !defined(STM32_MCO2PRE_VALUE) || defined(__DOXYGEN__)
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#define STM32_MCO2PRE_VALUE STM32_MCO2PRE_DISABLED
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#define STM32_MCO2PRE_VALUE STM32_MCO2PRE_NOCLOCK
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#endif
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/**
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#include "stm32_apb2.inc"
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#include "stm32_apb3.inc"
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/**
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* @brief STOPWUCK source clock.
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*/
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#if (STM32_STOPWUCK == STM32_STOPWUCK_HSI) || defined(__DOXYGEN__)
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#elif STM32_STOPWUCK == STM32_STOPWUCK_CSI
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#else
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#error "invalid STM32_STOPWUCK value specified"
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#endif
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/**
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* @brief STOPKERWUCK source clock.
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*/
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#if (STM32_STOPKERWUCK == STM32_STOPKERWUCK_HSI) || defined(__DOXYGEN__)
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#elif STM32_STOPKERWUCK == STM32_STOPKERWUCK_CSI
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#else
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#error "invalid STM32_STOPKERWUCK value specified"
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#endif
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/**
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* @brief RTCPRE clock frequency.
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*/
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#if (STM32_RTCPRE_VALUE == STM32_RTCPRE_NOCLOCK) || defined(__DOXYGEN__)
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#define STM32_RTCPRECLK 0
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#elif (STM32_RTCPRE_VALUE >= 2) && (STM32_RTCPRE_VALUE <= 63)
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#define STM32_RTCPRECLK (STM32_HSECLK / STM32_RTCPRE_VALUE)
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#else
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#error "invalid STM32_RTCPRECLK_VALUE value specified"
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#endif
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#elif (STM32_MCO1PRE_VALUE > STM32_MCO1PRE_NOCLOCK) && \
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(STM32_MCO1PRE_VALUE < 16)
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#define STM32_MCO1PRE STM32_MCO1PRE_FIELD(STM32_MCO1PRE_VALUE)
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#define STM32_MCO1CLK (STM32_MCO1DIVCLK / STM32_MCO1PRE_VALUE)
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#else
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#error "invalid STM32_MCO1PRE_VALUE value specified"
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#endif
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/**
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* @brief MCO1 source clock.
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*/
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/**
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* @brief MCO1 output pin clock frequency.
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*/
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#if (STM32_MCO1PRE_VALUE == STM32_MCO1PRE_DISABLED) || defined(__DOXYGEN__)
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#if (STM32_MCO1PRE_VALUE == STM32_MCO1PRE_NOCLOCK) || defined(__DOXYGEN__)
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#define STM32_MCO1CLK 0
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#elif (STM32_MCO1PRE_VALUE > STM32_MCO1PRE_DISABLED) && \
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#elif (STM32_MCO1PRE_VALUE > STM32_MCO1PRE_NOCLOCK) && \
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(STM32_MCO1PRE_VALUE < 16)
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#define STM32_MCO1PRE STM32_MCO1PRE_FIELD(STM32_MCO1PRE_VALUE)
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#define STM32_MCO1CLK (STM32_MCO1DIVCLK / STM32_MCO1PRE_VALUE)
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/**
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* @brief MCO2 output pin clock frequency.
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*/
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#if (STM32_MCO2PRE_VALUE == STM32_MCO2PRE_DISABLED) || defined(__DOXYGEN__)
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#if (STM32_MCO2PRE_VALUE == STM32_MCO2PRE_NOCLOCK) || defined(__DOXYGEN__)
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#define STM32_MCO2CLK 0
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#elif (STM32_MCO2PRE_VALUE > STM32_MCO2PRE_DISABLED) && \
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#elif (STM32_MCO2PRE_VALUE > STM32_MCO2PRE_NOCLOCK) && \
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(STM32_MCO2PRE_VALUE < 16)
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#define STM32_MCO2PRE STM32_MCO2PRE_FIELD(STM32_MCO2PRE_VALUE)
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#define STM32_MCO2CLK (STM32_MCO2DIVCLK / STM32_MCO2PRE_VALUE)
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#define STM32_RTCCLK STM32_LSICLK
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#elif STM32_RTCSEL == STM32_RTCSEL_HSEDIV
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#define STM32_RTCCLK (STM32_HSECLK / 32)
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#define STM32_RTCCLK STM32_RTCPRECLK
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#else
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#error "invalid STM32_RTCSEL value specified"
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#error "invalid source selected for SAI2 clock"
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#endif
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/**
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* @brief TIMP1CLK clock frequency.
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*/
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#if (STM32_PPRE1 == STM32_PPRE1_DIV1) || defined(__DOXYGEN__)
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#define STM32_TIMP1CLK (STM32_PCLK1 * 1)
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#else
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#define STM32_TIMP1CLK (STM32_PCLK1 * 2)
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#endif
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#if (STM32_TIMPRE == STM32_TIMPRE_LOW) || defined(__DOXYGEN__)
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/**
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* @brief TIMP1CLK clock frequency.
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*/
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#if (STM32_PPRE1 == STM32_PPRE1_DIV1) || \
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(STM32_PPRE1 == STM32_PPRE1_DIV2) || defined(__DOXYGEN__)
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#define STM32_TIMP1CLK STM32_HCLK
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#else
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#define STM32_TIMP1CLK (STM32_PCLK1 * 2)
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#endif
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/**
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* @brief TIMP2CLK clock frequency.
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*/
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#if (STM32_PPRE2 == STM32_PPRE2_DIV1) || defined(__DOXYGEN__)
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#define STM32_TIMP2CLK (STM32_PCLK2 * 1)
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#else
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#define STM32_TIMP2CLK (STM32_PCLK2 * 2)
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#endif
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/**
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* @brief TIMP2CLK clock frequency.
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*/
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#if (STM32_PPRE2 == STM32_PPRE2_DIV1) || \
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(STM32_PPRE2 == STM32_PPRE2_DIV2) || defined(__DOXYGEN__)
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#define STM32_TIMP2CLK STM32_HCLK
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#else
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#define STM32_TIMP2CLK (STM32_PCLK2 * 2)
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#endif
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#else
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#if (STM32_PPRE1 == STM32_PPRE1_DIV1) || \
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(STM32_PPRE1 == STM32_PPRE1_DIV2) || \
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(STM32_PPRE1 == STM32_PPRE1_DIV4) || defined(__DOXYGEN__)
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#define STM32_TIMP1CLK (STM32_PCLK1 * 2)
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#else
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#define STM32_TIMP1CLK (STM32_PCLK1 * 4)
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#endif
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#if (STM32_PPRE2 == STM32_PPRE2_DIV1) || \
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(STM32_PPRE2 == STM32_PPRE2_DIV2) || \
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(STM32_PPRE2 == STM32_PPRE2_DIV4) || defined(__DOXYGEN__)
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#define STM32_TIMP2CLK (STM32_PCLK2 * 2)
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#else
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#define STM32_TIMP2CLK (STM32_PCLK2 * 4)
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#endif
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#endif
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/**
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