From 24b3b3472ddfcd186043fd81e9fc4d38ac9a0360 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Tue, 1 Mar 2016 18:37:53 +0000 Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9004 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/boards/ST_STM32F401C_DISCOVERY/board.c | 19 +- os/hal/boards/ST_STM32F401C_DISCOVERY/board.h | 1256 ++++++++++++----- .../ST_STM32F401C_DISCOVERY/cfg/board.chcfg | 1193 ++++++++++++++++ 3 files changed, 2104 insertions(+), 364 deletions(-) create mode 100644 os/hal/boards/ST_STM32F401C_DISCOVERY/cfg/board.chcfg diff --git a/os/hal/boards/ST_STM32F401C_DISCOVERY/board.c b/os/hal/boards/ST_STM32F401C_DISCOVERY/board.c index 9981b83b5..4d546e3d6 100644 --- a/os/hal/boards/ST_STM32F401C_DISCOVERY/board.c +++ b/os/hal/boards/ST_STM32F401C_DISCOVERY/board.c @@ -22,8 +22,7 @@ * @details Digital I/O ports static configuration as defined in @p board.h. * This variable is used by the HAL when initializing the PAL driver. */ -const PALConfig pal_default_config = -{ +const PALConfig pal_default_config = { #if STM32_HAS_GPIOA {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, @@ -77,21 +76,21 @@ void __early_init(void) { /** * @brief SDC card detection. */ -bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) { +bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { (void)sdcp; /* TODO: Fill the implementation.*/ - return TRUE; + return true; } /** * @brief SDC card write protection detection. */ -bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) { +bool sdc_lld_is_write_protected(SDCDriver *sdcp) { (void)sdcp; /* TODO: Fill the implementation.*/ - return FALSE; + return false; } #endif /* HAL_USE_SDC */ @@ -99,21 +98,21 @@ bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) { /** * @brief MMC_SPI card detection. */ -bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) { +bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { (void)mmcp; /* TODO: Fill the implementation.*/ - return TRUE; + return true; } /** * @brief MMC_SPI card write protection detection. */ -bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) { +bool mmc_lld_is_write_protected(MMCDriver *mmcp) { (void)mmcp; /* TODO: Fill the implementation.*/ - return FALSE; + return false; } #endif diff --git a/os/hal/boards/ST_STM32F401C_DISCOVERY/board.h b/os/hal/boards/ST_STM32F401C_DISCOVERY/board.h index 668cbd9ae..50fd3b089 100644 --- a/os/hal/boards/ST_STM32F401C_DISCOVERY/board.h +++ b/os/hal/boards/ST_STM32F401C_DISCOVERY/board.h @@ -27,24 +27,23 @@ #define BOARD_ST_STM32F401C_DISCOVERY #define BOARD_NAME "STMicroelectronics STM32F401C-Discovery" - /* * Board oscillators-related settings. * NOTE: LSE not fitted. */ #if !defined(STM32_LSECLK) -#define STM32_LSECLK 0 +#define STM32_LSECLK 0U #endif #if !defined(STM32_HSECLK) -#define STM32_HSECLK 8000000 +#define STM32_HSECLK 8000000U #endif /* * Board voltages. * Required for performance limits calculation. */ -#define STM32_VDD 300 +#define STM32_VDD 300U /* * MCU type as defined in the ST header. @@ -54,115 +53,230 @@ /* * IO pins assignments. */ -#define GPIOA_BUTTON 0 -#define GPIOA_PIN1 1 -#define GPIOA_PIN2 2 -#define GPIOA_PIN3 3 -#define GPIOA_LRCK 4 -#define GPIOA_SPC 5 -#define GPIOA_SDO 6 -#define GPIOA_SDI 7 -#define GPIOA_PIN8 8 -#define GPIOA_VBUS_FS 9 -#define GPIOA_OTG_FS_ID 10 -#define GPIOA_OTG_FS_DM 11 -#define GPIOA_OTG_FS_DP 12 -#define GPIOA_SWDIO 13 -#define GPIOA_SWCLK 14 -#define GPIOA_PIN15 15 +#define GPIOA_BUTTON 0U +#define GPIOA_PIN1 1U +#define GPIOA_PIN2 2U +#define GPIOA_PIN3 3U +#define GPIOA_CS43L22_LRCK 4U +#define GPIOA_L3GD20_SCL 5U +#define GPIOA_L3GD20_SD0 6U +#define GPIOA_L3GD20_SDI 7U +#define GPIOA_PIN8 8U +#define GPIOA_VBUS_FS 9U +#define GPIOA_OTG_FS_ID 10U +#define GPIOA_OTG_FS_DM 11U +#define GPIOA_OTG_FS_DP 12U +#define GPIOA_SWDIO 13U +#define GPIOA_SWCLK 14U +#define GPIOA_PIN15 15U -#define GPIOB_PIN0 0 -#define GPIOB_PIN1 1 -#define GPIOB_PIN2 2 -#define GPIOB_SWO 3 -#define GPIOB_PIN4 4 -#define GPIOB_PIN5 5 -#define GPIOB_SCL 6 -#define GPIOB_PIN7 7 -#define GPIOB_PIN8 8 -#define GPIOB_SDA 9 -#define GPIOB_CLK_IN 10 -#define GPIOB_NOT_AVAILABLE 11 //This is now VCAP1, not usable as a pin -#define GPIOB_PIN12 12 -#define GPIOB_PIN13 13 -#define GPIOB_PIN14 14 -#define GPIOB_PIN15 15 +#define GPIOB_PIN0 0U +#define GPIOB_PIN1 1U +#define GPIOB_PIN2 2U +#define GPIOB_SWO 3U +#define GPIOB_PIN4 4U +#define GPIOB_PIN5 5U +#define GPIOB_LSM303DLHC_SCL 6U +#define GPIOB_PIN7 7U +#define GPIOB_PIN8 8U +#define GPIOB_LSM303DLHC_SDA 9U +#define GPIOB_MP45DT02_CLK_IN 10U +#define GPIOB_PIN11 11U +#define GPIOB_PIN12 12U +#define GPIOB_PIN13 13U +#define GPIOB_PIN14 14U +#define GPIOB_PIN15 15U -#define GPIOC_OTG_FS_POWER_ON 0 -#define GPIOC_PIN1 1 -#define GPIOC_PIN2 2 -#define GPIOC_PDM_OUT 3 -#define GPIOC_PIN4 4 -#define GPIOC_PIN5 5 -#define GPIOC_PIN6 6 -#define GPIOC_MCLK 7 -#define GPIOC_PIN8 8 -#define GPIOC_PIN9 9 -#define GPIOC_SCLK 10 -#define GPIOC_PIN11 11 -#define GPIOC_SDIN 12 -#define GPIOC_PIN13 13 -#define GPIOC_PIN14 14 //If crystal fitted and SB18 removed, OSC32_IN -#define GPIOC_PIN15 15 //If crystal fitted and SB17 removed, OSC32_OUT +#define GPIOC_OTG_FS_POWER_ON 0U +#define GPIOC_PIN1 1U +#define GPIOC_PIN2 2U +#define GPIOC_CS43L22_AIN4x 3U +#define GPIOC_MP45DT02_PDM_OUT 3U +#define GPIOC_PIN4 4U +#define GPIOC_PIN5 5U +#define GPIOC_PIN6 6U +#define GPIOC_CS43L22_MCLK 7U +#define GPIOC_PIN8 8U +#define GPIOC_PIN9 9U +#define GPIOC_CS43L22_SCLK 10U +#define GPIOC_PIN11 11U +#define GPIOC_CS43L22_SDIN 12U +#define GPIOC_PIN13 13U +#define GPIOC_OSC32_IN 14U +#define GPIOC_OSC32_OUT 15U -#define GPIOD_PIN0 0 -#define GPIOD_PIN1 1 -#define GPIOD_PIN2 2 -#define GPIOD_PIN3 3 -#define GPIOD_RESET 4 -#define GPIOD_OVER_CURRENT 5 -#define GPIOD_PIN6 6 -#define GPIOD_PIN7 7 -#define GPIOD_PIN8 8 -#define GPIOD_PIN9 9 -#define GPIOD_PIN10 10 -#define GPIOD_PIN11 11 -#define GPIOD_LED4 12 -#define GPIOD_LED3 13 -#define GPIOD_LED5 14 -#define GPIOD_LED6 15 +#define GPIOD_PIN0 0U +#define GPIOD_PIN1 1U +#define GPIOD_PIN2 2U +#define GPIOD_PIN3 3U +#define GPIOD_CS43L22_RESET 4U +#define GPIOD_OverCurrent 5U +#define GPIOD_PIN6 6U +#define GPIOD_PIN7 7U +#define GPIOD_PIN8 8U +#define GPIOD_PIN9 9U +#define GPIOD_PIN10 10U +#define GPIOD_PIN11 11U +#define GPIOD_LED4 12U +#define GPIOD_LED3 13U +#define GPIOD_LED5 14U +#define GPIOD_LED6 15U -#define GPIOE_INT1 0 -#define GPIOE_INT2 1 -#define GPIOE_LSM_DRDY 2 //LSM303DLHC DRDY -#define GPIOE_CS_SPI 3 -#define GPIOE_LSM_INT1 4 //LSM303DLHC INT1 -#define GPIOE_LSM_INT2 5 //LSM303DLHC INT2 -#define GPIOE_PIN6 6 -#define GPIOE_PIN7 7 -#define GPIOE_PIN8 8 -#define GPIOE_PIN9 9 -#define GPIOE_PIN10 10 -#define GPIOE_PIN11 11 -#define GPIOE_PIN12 12 -#define GPIOE_PIN13 13 -#define GPIOE_PIN14 14 -#define GPIOE_PIN15 15 +#define GPIOE_L3GD20_INT1 0U +#define GPIOE_L3GD20_INT2 1U +#define GPIOE_LSM303DLHC_DRDY 2U +#define GPIOE_L3GD20_CS 3U +#define GPIOE_LSM303DLHC_INT1 4U +#define GPIOE_LSM303DLHC_INT2 5U +#define GPIOE_PIN6 6U +#define GPIOE_PIN7 7U +#define GPIOE_PIN8 8U +#define GPIOE_PIN9 9U +#define GPIOE_PIN10 10U +#define GPIOE_PIN11 11U +#define GPIOE_PIN12 12U +#define GPIOE_PIN13 13U +#define GPIOE_PIN14 14U +#define GPIOE_PIN15 15U + +#define GPIOF_PIN0 0U +#define GPIOF_PIN1 1U +#define GPIOF_PIN2 2U +#define GPIOF_PIN3 3U +#define GPIOF_PIN4 4U +#define GPIOF_PIN5 5U +#define GPIOF_PIN6 6U +#define GPIOF_PIN7 7U +#define GPIOF_PIN8 8U +#define GPIOF_PIN9 9U +#define GPIOF_PIN10 10U +#define GPIOF_PIN11 11U +#define GPIOF_PIN12 12U +#define GPIOF_PIN13 13U +#define GPIOF_PIN14 14U +#define GPIOF_PIN15 15U + +#define GPIOG_PIN0 0U +#define GPIOG_PIN1 1U +#define GPIOG_PIN2 2U +#define GPIOG_PIN3 3U +#define GPIOG_PIN4 4U +#define GPIOG_PIN5 5U +#define GPIOG_PIN6 6U +#define GPIOG_PIN7 7U +#define GPIOG_PIN8 8U +#define GPIOG_PIN9 9U +#define GPIOG_PIN10 10U +#define GPIOG_PIN11 11U +#define GPIOG_PIN12 12U +#define GPIOG_PIN13 13U +#define GPIOG_PIN14 14U +#define GPIOG_PIN15 15U + +#define GPIOH_OSC_IN 0U +#define GPIOH_OSC_OUT 1U +#define GPIOH_PIN2 2U +#define GPIOH_PIN3 3U +#define GPIOH_PIN4 4U +#define GPIOH_PIN5 5U +#define GPIOH_PIN6 6U +#define GPIOH_PIN7 7U +#define GPIOH_PIN8 8U +#define GPIOH_PIN9 9U +#define GPIOH_PIN10 10U +#define GPIOH_PIN11 11U +#define GPIOH_PIN12 12U +#define GPIOH_PIN13 13U +#define GPIOH_PIN14 14U +#define GPIOH_PIN15 15U + +#define GPIOI_PIN0 0U +#define GPIOI_PIN1 1U +#define GPIOI_PIN2 2U +#define GPIOI_PIN3 3U +#define GPIOI_PIN4 4U +#define GPIOI_PIN5 5U +#define GPIOI_PIN6 6U +#define GPIOI_PIN7 7U +#define GPIOI_PIN8 8U +#define GPIOI_PIN9 9U +#define GPIOI_PIN10 10U +#define GPIOI_PIN11 11U +#define GPIOI_PIN12 12U +#define GPIOI_PIN13 13U +#define GPIOI_PIN14 14U +#define GPIOI_PIN15 15U + +/* + * IO lines assignments. + */ +#define LINE_BUTTON PAL_LINE(GPIOA, 0U) +#define LINE_CS43L22_LRCK PAL_LINE(GPIOA, 4U) +#define LINE_L3GD20_SCL PAL_LINE(GPIOA, 5U) +#define LINE_L3GD20_SD0 PAL_LINE(GPIOA, 6U) +#define LINE_L3GD20_SDI PAL_LINE(GPIOA, 7U) +#define LINE_VBUS_FS PAL_LINE(GPIOA, 9U) +#define LINE_OTG_FS_ID PAL_LINE(GPIOA, 10U) +#define LINE_OTG_FS_DM PAL_LINE(GPIOA, 11U) +#define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U) +#define LINE_SWDIO PAL_LINE(GPIOA, 13U) +#define LINE_SWCLK PAL_LINE(GPIOA, 14U) + +#define LINE_SWO PAL_LINE(GPIOB, 3U) +#define LINE_LSM303DLHC_SCL PAL_LINE(GPIOB, 6U) +#define LINE_LSM303DLHC_SDA PAL_LINE(GPIOB, 9U) +#define LINE_MP45DT02_CLK_IN PAL_LINE(GPIOB, 10U) + +#define LINE_OTG_FS_POWER_ON PAL_LINE(GPIOC, 0U) +#define LINE_CS43L22_AIN4x PAL_LINE(GPIOC, 3U) +#define LINE_MP45DT02_PDM_OUT PAL_LINE(GPIOC, 3U) +#define LINE_CS43L22_MCLK PAL_LINE(GPIOC, 7U) +#define LINE_CS43L22_SCLK PAL_LINE(GPIOC, 10U) +#define LINE_CS43L22_SDIN PAL_LINE(GPIOC, 12U) +#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) +#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) + +#define LINE_CS43L22_RESET PAL_LINE(GPIOD, 4U) +#define LINE_OverCurrent PAL_LINE(GPIOD, 5U) +#define LINE_LED4 PAL_LINE(GPIOD, 12U) +#define LINE_LED3 PAL_LINE(GPIOD, 13U) +#define LINE_LED5 PAL_LINE(GPIOD, 14U) +#define LINE_LED6 PAL_LINE(GPIOD, 15U) + +#define LINE_L3GD20_INT1 PAL_LINE(GPIOE, 0U) +#define LINE_L3GD20_INT2 PAL_LINE(GPIOE, 1U) +#define LINE_LSM303DLHC_DRDY PAL_LINE(GPIOE, 2U) +#define LINE_L3GD20_CS PAL_LINE(GPIOE, 3U) +#define LINE_LSM303DLHC_INT1 PAL_LINE(GPIOE, 4U) +#define LINE_LSM303DLHC_INT2 PAL_LINE(GPIOE, 5U) + + + +#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) +#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) -#define GPIOH_OSC_IN 0 -#define GPIOH_OSC_OUT 1 /* * I/O ports initial setup, this configuration is established soon after reset * in the initialization code. * Please refer to the STM32 Reference Manual for details. */ -#define PIN_MODE_INPUT(n) (0U << ((n) * 2)) -#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2)) -#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2)) -#define PIN_MODE_ANALOG(n) (3U << ((n) * 2)) +#define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) +#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) +#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) +#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) #define PIN_ODR_LOW(n) (0U << (n)) #define PIN_ODR_HIGH(n) (1U << (n)) #define PIN_OTYPE_PUSHPULL(n) (0U << (n)) #define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) -#define PIN_OSPEED_2M(n) (0U << ((n) * 2)) -#define PIN_OSPEED_25M(n) (1U << ((n) * 2)) -#define PIN_OSPEED_50M(n) (2U << ((n) * 2)) -#define PIN_OSPEED_100M(n) (3U << ((n) * 2)) -#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2)) -#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2)) -#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2)) -#define PIN_AFIO_AF(n, v) ((v##U) << ((n % 8) * 4)) +#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U)) +#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U)) +#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U)) +#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U)) +#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) +#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) +#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) +#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) /* * GPIOA setup: @@ -171,10 +285,10 @@ * PA1 - PIN1 (input pullup). * PA2 - PIN2 (input pullup). * PA3 - PIN3 (input pullup). - * PA4 - LRCK (alternate 6). - * PA5 - SPC (alternate 5). - * PA6 - SDO (alternate 5). - * PA7 - SDI (alternate 5). + * PA4 - CS43L22_LRCK (alternate 6). + * PA5 - L3GD20_SCL (alternate 5). + * PA6 - L3GD20_SD0 (alternate 5). + * PA7 - L3GD20_SDI (alternate 5). * PA8 - PIN8 (input pullup). * PA9 - VBUS_FS (input floating). * PA10 - OTG_FS_ID (alternate 10). @@ -188,10 +302,10 @@ PIN_MODE_INPUT(GPIOA_PIN1) | \ PIN_MODE_INPUT(GPIOA_PIN2) | \ PIN_MODE_INPUT(GPIOA_PIN3) | \ - PIN_MODE_ALTERNATE(GPIOA_LRCK) | \ - PIN_MODE_ALTERNATE(GPIOA_SPC) | \ - PIN_MODE_ALTERNATE(GPIOA_SDO) | \ - PIN_MODE_ALTERNATE(GPIOA_SDI) | \ + PIN_MODE_ALTERNATE(GPIOA_CS43L22_LRCK) |\ + PIN_MODE_ALTERNATE(GPIOA_L3GD20_SCL) | \ + PIN_MODE_ALTERNATE(GPIOA_L3GD20_SD0) | \ + PIN_MODE_ALTERNATE(GPIOA_L3GD20_SDI) | \ PIN_MODE_INPUT(GPIOA_PIN8) | \ PIN_MODE_INPUT(GPIOA_VBUS_FS) | \ PIN_MODE_ALTERNATE(GPIOA_OTG_FS_ID) | \ @@ -204,10 +318,10 @@ PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \ PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOA_LRCK) | \ - PIN_OTYPE_PUSHPULL(GPIOA_SPC) | \ - PIN_OTYPE_PUSHPULL(GPIOA_SDO) | \ - PIN_OTYPE_PUSHPULL(GPIOA_SDI) | \ + PIN_OTYPE_PUSHPULL(GPIOA_CS43L22_LRCK) |\ + PIN_OTYPE_PUSHPULL(GPIOA_L3GD20_SCL) | \ + PIN_OTYPE_PUSHPULL(GPIOA_L3GD20_SD0) | \ + PIN_OTYPE_PUSHPULL(GPIOA_L3GD20_SDI) | \ PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \ PIN_OTYPE_PUSHPULL(GPIOA_VBUS_FS) | \ PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_ID) | \ @@ -216,30 +330,30 @@ PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) -#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_100M(GPIOA_BUTTON) | \ - PIN_OSPEED_100M(GPIOA_PIN1) | \ - PIN_OSPEED_100M(GPIOA_PIN2) | \ - PIN_OSPEED_100M(GPIOA_PIN3) | \ - PIN_OSPEED_100M(GPIOA_LRCK) | \ - PIN_OSPEED_50M(GPIOA_SPC) | \ - PIN_OSPEED_50M(GPIOA_SDO) | \ - PIN_OSPEED_50M(GPIOA_SDI) | \ - PIN_OSPEED_100M(GPIOA_PIN8) | \ - PIN_OSPEED_100M(GPIOA_VBUS_FS) | \ - PIN_OSPEED_100M(GPIOA_OTG_FS_ID) | \ - PIN_OSPEED_100M(GPIOA_OTG_FS_DM) | \ - PIN_OSPEED_100M(GPIOA_OTG_FS_DP) | \ - PIN_OSPEED_100M(GPIOA_SWDIO) | \ - PIN_OSPEED_100M(GPIOA_SWCLK) | \ - PIN_OSPEED_100M(GPIOA_PIN15)) +#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_BUTTON) | \ + PIN_OSPEED_HIGH(GPIOA_PIN1) | \ + PIN_OSPEED_HIGH(GPIOA_PIN2) | \ + PIN_OSPEED_HIGH(GPIOA_PIN3) | \ + PIN_OSPEED_HIGH(GPIOA_CS43L22_LRCK) | \ + PIN_OSPEED_HIGH(GPIOA_L3GD20_SCL) | \ + PIN_OSPEED_HIGH(GPIOA_L3GD20_SD0) | \ + PIN_OSPEED_HIGH(GPIOA_L3GD20_SDI) | \ + PIN_OSPEED_HIGH(GPIOA_PIN8) | \ + PIN_OSPEED_HIGH(GPIOA_VBUS_FS) | \ + PIN_OSPEED_HIGH(GPIOA_OTG_FS_ID) | \ + PIN_OSPEED_HIGH(GPIOA_OTG_FS_DM) | \ + PIN_OSPEED_HIGH(GPIOA_OTG_FS_DP) | \ + PIN_OSPEED_HIGH(GPIOA_SWDIO) | \ + PIN_OSPEED_HIGH(GPIOA_SWCLK) | \ + PIN_OSPEED_HIGH(GPIOA_PIN15)) #define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_BUTTON) | \ PIN_PUPDR_PULLUP(GPIOA_PIN1) | \ PIN_PUPDR_PULLUP(GPIOA_PIN2) | \ PIN_PUPDR_PULLUP(GPIOA_PIN3) | \ - PIN_PUPDR_FLOATING(GPIOA_LRCK) | \ - PIN_PUPDR_FLOATING(GPIOA_SPC) | \ - PIN_PUPDR_FLOATING(GPIOA_SDO) | \ - PIN_PUPDR_FLOATING(GPIOA_SDI) | \ + PIN_PUPDR_FLOATING(GPIOA_CS43L22_LRCK) |\ + PIN_PUPDR_FLOATING(GPIOA_L3GD20_SCL) | \ + PIN_PUPDR_PULLUP(GPIOA_L3GD20_SD0) | \ + PIN_PUPDR_PULLUP(GPIOA_L3GD20_SDI) | \ PIN_PUPDR_PULLUP(GPIOA_PIN8) | \ PIN_PUPDR_FLOATING(GPIOA_VBUS_FS) | \ PIN_PUPDR_FLOATING(GPIOA_OTG_FS_ID) | \ @@ -252,10 +366,10 @@ PIN_ODR_HIGH(GPIOA_PIN1) | \ PIN_ODR_HIGH(GPIOA_PIN2) | \ PIN_ODR_HIGH(GPIOA_PIN3) | \ - PIN_ODR_HIGH(GPIOA_LRCK) | \ - PIN_ODR_HIGH(GPIOA_SPC) | \ - PIN_ODR_HIGH(GPIOA_SDO) | \ - PIN_ODR_HIGH(GPIOA_SDI) | \ + PIN_ODR_HIGH(GPIOA_CS43L22_LRCK) | \ + PIN_ODR_HIGH(GPIOA_L3GD20_SCL) | \ + PIN_ODR_HIGH(GPIOA_L3GD20_SD0) | \ + PIN_ODR_HIGH(GPIOA_L3GD20_SDI) | \ PIN_ODR_HIGH(GPIOA_PIN8) | \ PIN_ODR_HIGH(GPIOA_VBUS_FS) | \ PIN_ODR_HIGH(GPIOA_OTG_FS_ID) | \ @@ -268,10 +382,10 @@ PIN_AFIO_AF(GPIOA_PIN1, 0) | \ PIN_AFIO_AF(GPIOA_PIN2, 0) | \ PIN_AFIO_AF(GPIOA_PIN3, 0) | \ - PIN_AFIO_AF(GPIOA_LRCK, 6) | \ - PIN_AFIO_AF(GPIOA_SPC, 5) | \ - PIN_AFIO_AF(GPIOA_SDO, 5) | \ - PIN_AFIO_AF(GPIOA_SDI, 5)) + PIN_AFIO_AF(GPIOA_CS43L22_LRCK, 6) | \ + PIN_AFIO_AF(GPIOA_L3GD20_SCL, 5) | \ + PIN_AFIO_AF(GPIOA_L3GD20_SD0, 5) | \ + PIN_AFIO_AF(GPIOA_L3GD20_SDI, 5)) #define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \ PIN_AFIO_AF(GPIOA_VBUS_FS, 0) | \ PIN_AFIO_AF(GPIOA_OTG_FS_ID, 10) | \ @@ -290,12 +404,12 @@ * PB3 - SWO (alternate 0). * PB4 - PIN4 (input pullup). * PB5 - PIN5 (input pullup). - * PB6 - SCL (alternate 4). + * PB6 - LSM303DLHC_SCL (alternate 4). * PB7 - PIN7 (input pullup). * PB8 - PIN8 (input pullup). - * PB9 - SDA (alternate 4). - * PB10 - CLK_IN (input pullup). - * PB11 - NOT_AVAILABLE (input floating). + * PB9 - LSM303DLHC_SDA (alternate 4). + * PB10 - MP45DT02_CLK_IN (alternate 5). + * PB11 - PIN11 (input pullup). * PB12 - PIN12 (input pullup). * PB13 - PIN13 (input pullup). * PB14 - PIN14 (input pullup). @@ -307,12 +421,12 @@ PIN_MODE_ALTERNATE(GPIOB_SWO) | \ PIN_MODE_INPUT(GPIOB_PIN4) | \ PIN_MODE_INPUT(GPIOB_PIN5) | \ - PIN_MODE_ALTERNATE(GPIOB_SCL) | \ + PIN_MODE_ALTERNATE(GPIOB_LSM303DLHC_SCL) |\ PIN_MODE_INPUT(GPIOB_PIN7) | \ PIN_MODE_INPUT(GPIOB_PIN8) | \ - PIN_MODE_ALTERNATE(GPIOB_SDA) | \ - PIN_MODE_INPUT(GPIOB_CLK_IN) | \ - PIN_MODE_INPUT(GPIOB_NOT_AVAILABLE) | \ + PIN_MODE_ALTERNATE(GPIOB_LSM303DLHC_SDA) |\ + PIN_MODE_ALTERNATE(GPIOB_MP45DT02_CLK_IN) |\ + PIN_MODE_INPUT(GPIOB_PIN11) | \ PIN_MODE_INPUT(GPIOB_PIN12) | \ PIN_MODE_INPUT(GPIOB_PIN13) | \ PIN_MODE_INPUT(GPIOB_PIN14) | \ @@ -323,44 +437,44 @@ PIN_OTYPE_PUSHPULL(GPIOB_SWO) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \ - PIN_OTYPE_OPENDRAIN(GPIOB_SCL) | \ + PIN_OTYPE_PUSHPULL(GPIOB_LSM303DLHC_SCL) |\ PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \ - PIN_OTYPE_OPENDRAIN(GPIOB_SDA) | \ - PIN_OTYPE_PUSHPULL(GPIOB_CLK_IN) | \ - PIN_OTYPE_PUSHPULL(GPIOB_NOT_AVAILABLE) | \ + PIN_OTYPE_PUSHPULL(GPIOB_LSM303DLHC_SDA) |\ + PIN_OTYPE_PUSHPULL(GPIOB_MP45DT02_CLK_IN) |\ + PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) -#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_100M(GPIOB_PIN0) | \ - PIN_OSPEED_100M(GPIOB_PIN1) | \ - PIN_OSPEED_100M(GPIOB_PIN2) | \ - PIN_OSPEED_100M(GPIOB_SWO) | \ - PIN_OSPEED_100M(GPIOB_PIN4) | \ - PIN_OSPEED_100M(GPIOB_PIN5) | \ - PIN_OSPEED_100M(GPIOB_SCL) | \ - PIN_OSPEED_100M(GPIOB_PIN7) | \ - PIN_OSPEED_100M(GPIOB_PIN8) | \ - PIN_OSPEED_100M(GPIOB_SDA) | \ - PIN_OSPEED_100M(GPIOB_CLK_IN) | \ - PIN_OSPEED_100M(GPIOB_NOT_AVAILABLE) | \ - PIN_OSPEED_100M(GPIOB_PIN12) | \ - PIN_OSPEED_100M(GPIOB_PIN13) | \ - PIN_OSPEED_100M(GPIOB_PIN14) | \ - PIN_OSPEED_100M(GPIOB_PIN15)) +#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_PIN0) | \ + PIN_OSPEED_HIGH(GPIOB_PIN1) | \ + PIN_OSPEED_HIGH(GPIOB_PIN2) | \ + PIN_OSPEED_HIGH(GPIOB_SWO) | \ + PIN_OSPEED_HIGH(GPIOB_PIN4) | \ + PIN_OSPEED_HIGH(GPIOB_PIN5) | \ + PIN_OSPEED_HIGH(GPIOB_LSM303DLHC_SCL) |\ + PIN_OSPEED_HIGH(GPIOB_PIN7) | \ + PIN_OSPEED_HIGH(GPIOB_PIN8) | \ + PIN_OSPEED_HIGH(GPIOB_LSM303DLHC_SDA) |\ + PIN_OSPEED_HIGH(GPIOB_MP45DT02_CLK_IN) |\ + PIN_OSPEED_HIGH(GPIOB_PIN11) | \ + PIN_OSPEED_HIGH(GPIOB_PIN12) | \ + PIN_OSPEED_HIGH(GPIOB_PIN13) | \ + PIN_OSPEED_HIGH(GPIOB_PIN14) | \ + PIN_OSPEED_HIGH(GPIOB_PIN15)) #define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \ PIN_PUPDR_PULLUP(GPIOB_PIN1) | \ PIN_PUPDR_PULLUP(GPIOB_PIN2) | \ - PIN_PUPDR_FLOATING(GPIOB_SWO) | \ + PIN_PUPDR_PULLUP(GPIOB_SWO) | \ PIN_PUPDR_PULLUP(GPIOB_PIN4) | \ PIN_PUPDR_PULLUP(GPIOB_PIN5) | \ - PIN_PUPDR_FLOATING(GPIOB_SCL) | \ + PIN_PUPDR_FLOATING(GPIOB_LSM303DLHC_SCL) |\ PIN_PUPDR_PULLUP(GPIOB_PIN7) | \ PIN_PUPDR_PULLUP(GPIOB_PIN8) | \ - PIN_PUPDR_FLOATING(GPIOB_SDA) | \ - PIN_PUPDR_PULLUP(GPIOB_CLK_IN) | \ - PIN_PUPDR_FLOATING(GPIOB_NOT_AVAILABLE) | \ + PIN_PUPDR_FLOATING(GPIOB_LSM303DLHC_SDA) |\ + PIN_PUPDR_FLOATING(GPIOB_MP45DT02_CLK_IN) |\ + PIN_PUPDR_PULLUP(GPIOB_PIN11) | \ PIN_PUPDR_PULLUP(GPIOB_PIN12) | \ PIN_PUPDR_PULLUP(GPIOB_PIN13) | \ PIN_PUPDR_PULLUP(GPIOB_PIN14) | \ @@ -371,12 +485,12 @@ PIN_ODR_HIGH(GPIOB_SWO) | \ PIN_ODR_HIGH(GPIOB_PIN4) | \ PIN_ODR_HIGH(GPIOB_PIN5) | \ - PIN_ODR_HIGH(GPIOB_SCL) | \ + PIN_ODR_HIGH(GPIOB_LSM303DLHC_SCL) | \ PIN_ODR_HIGH(GPIOB_PIN7) | \ PIN_ODR_HIGH(GPIOB_PIN8) | \ - PIN_ODR_HIGH(GPIOB_SDA) | \ - PIN_ODR_HIGH(GPIOB_CLK_IN) | \ - PIN_ODR_HIGH(GPIOB_NOT_AVAILABLE) | \ + PIN_ODR_HIGH(GPIOB_LSM303DLHC_SDA) | \ + PIN_ODR_HIGH(GPIOB_MP45DT02_CLK_IN) | \ + PIN_ODR_HIGH(GPIOB_PIN11) | \ PIN_ODR_HIGH(GPIOB_PIN12) | \ PIN_ODR_HIGH(GPIOB_PIN13) | \ PIN_ODR_HIGH(GPIOB_PIN14) | \ @@ -387,12 +501,12 @@ PIN_AFIO_AF(GPIOB_SWO, 0) | \ PIN_AFIO_AF(GPIOB_PIN4, 0) | \ PIN_AFIO_AF(GPIOB_PIN5, 0) | \ - PIN_AFIO_AF(GPIOB_SCL, 4) | \ + PIN_AFIO_AF(GPIOB_LSM303DLHC_SCL, 4) | \ PIN_AFIO_AF(GPIOB_PIN7, 0)) #define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \ - PIN_AFIO_AF(GPIOB_SDA, 4) | \ - PIN_AFIO_AF(GPIOB_CLK_IN, 0) | \ - PIN_AFIO_AF(GPIOB_NOT_AVAILABLE, 0) | \ + PIN_AFIO_AF(GPIOB_LSM303DLHC_SDA, 4) | \ + PIN_AFIO_AF(GPIOB_MP45DT02_CLK_IN, 5) |\ + PIN_AFIO_AF(GPIOB_PIN11, 0) | \ PIN_AFIO_AF(GPIOB_PIN12, 0) | \ PIN_AFIO_AF(GPIOB_PIN13, 0) | \ PIN_AFIO_AF(GPIOB_PIN14, 0) | \ @@ -404,116 +518,116 @@ * PC0 - OTG_FS_POWER_ON (output pushpull maximum). * PC1 - PIN1 (input pullup). * PC2 - PIN2 (input pullup). - * PC3 - PDM_OUT (input pullup). + * PC3 - CS43L22_AIN4x MP45DT02_PDM_OUT(alternate 5). * PC4 - PIN4 (input pullup). * PC5 - PIN5 (input pullup). * PC6 - PIN6 (input pullup). - * PC7 - MCLK (alternate 6). + * PC7 - CS43L22_MCLK (alternate 6). * PC8 - PIN8 (input pullup). * PC9 - PIN9 (input pullup). - * PC10 - SCLK (alternate 6). + * PC10 - CS43L22_SCLK (alternate 6). * PC11 - PIN11 (input pullup). - * PC12 - SDIN (alternate 6). + * PC12 - CS43L22_SDIN (alternate 6). * PC13 - PIN13 (input pullup). - * PC14 - PIN14 (input pullup). - * PC15 - PIN15 (input pullup). + * PC14 - OSC32_IN (input floating). + * PC15 - OSC32_OUT (input floating). */ #define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_OTG_FS_POWER_ON) |\ PIN_MODE_INPUT(GPIOC_PIN1) | \ PIN_MODE_INPUT(GPIOC_PIN2) | \ - PIN_MODE_INPUT(GPIOC_PDM_OUT) | \ + PIN_MODE_ALTERNATE(GPIOC_CS43L22_AIN4x) |\ PIN_MODE_INPUT(GPIOC_PIN4) | \ PIN_MODE_INPUT(GPIOC_PIN5) | \ PIN_MODE_INPUT(GPIOC_PIN6) | \ - PIN_MODE_ALTERNATE(GPIOC_MCLK) | \ + PIN_MODE_ALTERNATE(GPIOC_CS43L22_MCLK) |\ PIN_MODE_INPUT(GPIOC_PIN8) | \ PIN_MODE_INPUT(GPIOC_PIN9) | \ - PIN_MODE_ALTERNATE(GPIOC_SCLK) | \ + PIN_MODE_ALTERNATE(GPIOC_CS43L22_SCLK) |\ PIN_MODE_INPUT(GPIOC_PIN11) | \ - PIN_MODE_ALTERNATE(GPIOC_SDIN) | \ + PIN_MODE_ALTERNATE(GPIOC_CS43L22_SDIN) |\ PIN_MODE_INPUT(GPIOC_PIN13) | \ - PIN_MODE_INPUT(GPIOC_PIN14) | \ - PIN_MODE_INPUT(GPIOC_PIN15)) + PIN_MODE_INPUT(GPIOC_OSC32_IN) | \ + PIN_MODE_INPUT(GPIOC_OSC32_OUT)) #define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_OTG_FS_POWER_ON) |\ PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PDM_OUT) | \ + PIN_OTYPE_PUSHPULL(GPIOC_CS43L22_AIN4x) |\ PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOC_MCLK) | \ + PIN_OTYPE_PUSHPULL(GPIOC_CS43L22_MCLK) |\ PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOC_SCLK) | \ + PIN_OTYPE_PUSHPULL(GPIOC_CS43L22_SCLK) |\ PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOC_SDIN) | \ + PIN_OTYPE_PUSHPULL(GPIOC_CS43L22_SDIN) |\ PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN15)) -#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_100M(GPIOC_OTG_FS_POWER_ON) |\ - PIN_OSPEED_100M(GPIOC_PIN1) | \ - PIN_OSPEED_100M(GPIOC_PIN2) | \ - PIN_OSPEED_100M(GPIOC_PDM_OUT) | \ - PIN_OSPEED_100M(GPIOC_PIN4) | \ - PIN_OSPEED_100M(GPIOC_PIN5) | \ - PIN_OSPEED_100M(GPIOC_PIN6) | \ - PIN_OSPEED_100M(GPIOC_MCLK) | \ - PIN_OSPEED_100M(GPIOC_PIN8) | \ - PIN_OSPEED_100M(GPIOC_PIN9) | \ - PIN_OSPEED_100M(GPIOC_SCLK) | \ - PIN_OSPEED_100M(GPIOC_PIN11) | \ - PIN_OSPEED_100M(GPIOC_SDIN) | \ - PIN_OSPEED_100M(GPIOC_PIN13) | \ - PIN_OSPEED_100M(GPIOC_PIN14) | \ - PIN_OSPEED_100M(GPIOC_PIN15)) -#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_OTG_FS_POWER_ON) |\ + PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | \ + PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT)) +#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_OTG_FS_POWER_ON) |\ + PIN_OSPEED_HIGH(GPIOC_PIN1) | \ + PIN_OSPEED_HIGH(GPIOC_PIN2) | \ + PIN_OSPEED_HIGH(GPIOC_CS43L22_AIN4x) | \ + PIN_OSPEED_HIGH(GPIOC_PIN4) | \ + PIN_OSPEED_HIGH(GPIOC_PIN5) | \ + PIN_OSPEED_HIGH(GPIOC_PIN6) | \ + PIN_OSPEED_HIGH(GPIOC_CS43L22_MCLK) | \ + PIN_OSPEED_HIGH(GPIOC_PIN8) | \ + PIN_OSPEED_HIGH(GPIOC_PIN9) | \ + PIN_OSPEED_HIGH(GPIOC_CS43L22_SCLK) | \ + PIN_OSPEED_HIGH(GPIOC_PIN11) | \ + PIN_OSPEED_HIGH(GPIOC_CS43L22_SDIN) | \ + PIN_OSPEED_HIGH(GPIOC_PIN13) | \ + PIN_OSPEED_HIGH(GPIOC_OSC32_IN) | \ + PIN_OSPEED_HIGH(GPIOC_OSC32_OUT)) +#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_OTG_FS_POWER_ON) |\ PIN_PUPDR_PULLUP(GPIOC_PIN1) | \ PIN_PUPDR_PULLUP(GPIOC_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOC_PDM_OUT) | \ + PIN_PUPDR_FLOATING(GPIOC_CS43L22_AIN4x) |\ PIN_PUPDR_PULLUP(GPIOC_PIN4) | \ PIN_PUPDR_PULLUP(GPIOC_PIN5) | \ PIN_PUPDR_PULLUP(GPIOC_PIN6) | \ - PIN_PUPDR_FLOATING(GPIOC_MCLK) | \ + PIN_PUPDR_PULLUP(GPIOC_CS43L22_MCLK) | \ PIN_PUPDR_PULLUP(GPIOC_PIN8) | \ PIN_PUPDR_PULLUP(GPIOC_PIN9) | \ - PIN_PUPDR_FLOATING(GPIOC_SCLK) | \ + PIN_PUPDR_PULLUP(GPIOC_CS43L22_SCLK) | \ PIN_PUPDR_PULLUP(GPIOC_PIN11) | \ - PIN_PUPDR_FLOATING(GPIOC_SDIN) | \ + PIN_PUPDR_PULLUP(GPIOC_CS43L22_SDIN) | \ PIN_PUPDR_PULLUP(GPIOC_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN15)) + PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | \ + PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT)) #define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_OTG_FS_POWER_ON) | \ PIN_ODR_HIGH(GPIOC_PIN1) | \ PIN_ODR_HIGH(GPIOC_PIN2) | \ - PIN_ODR_HIGH(GPIOC_PDM_OUT) | \ + PIN_ODR_HIGH(GPIOC_CS43L22_AIN4x) | \ PIN_ODR_HIGH(GPIOC_PIN4) | \ PIN_ODR_HIGH(GPIOC_PIN5) | \ PIN_ODR_HIGH(GPIOC_PIN6) | \ - PIN_ODR_HIGH(GPIOC_MCLK) | \ + PIN_ODR_HIGH(GPIOC_CS43L22_MCLK) | \ PIN_ODR_HIGH(GPIOC_PIN8) | \ PIN_ODR_HIGH(GPIOC_PIN9) | \ - PIN_ODR_HIGH(GPIOC_SCLK) | \ + PIN_ODR_HIGH(GPIOC_CS43L22_SCLK) | \ PIN_ODR_HIGH(GPIOC_PIN11) | \ - PIN_ODR_HIGH(GPIOC_SDIN) | \ + PIN_ODR_HIGH(GPIOC_CS43L22_SDIN) | \ PIN_ODR_HIGH(GPIOC_PIN13) | \ - PIN_ODR_HIGH(GPIOC_PIN14) | \ - PIN_ODR_HIGH(GPIOC_PIN15)) + PIN_ODR_HIGH(GPIOC_OSC32_IN) | \ + PIN_ODR_HIGH(GPIOC_OSC32_OUT)) #define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_OTG_FS_POWER_ON, 0) |\ PIN_AFIO_AF(GPIOC_PIN1, 0) | \ PIN_AFIO_AF(GPIOC_PIN2, 0) | \ - PIN_AFIO_AF(GPIOC_PDM_OUT, 0) | \ + PIN_AFIO_AF(GPIOC_CS43L22_AIN4x, 5) | \ PIN_AFIO_AF(GPIOC_PIN4, 0) | \ PIN_AFIO_AF(GPIOC_PIN5, 0) | \ PIN_AFIO_AF(GPIOC_PIN6, 0) | \ - PIN_AFIO_AF(GPIOC_MCLK, 6)) + PIN_AFIO_AF(GPIOC_CS43L22_MCLK, 6)) #define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | \ PIN_AFIO_AF(GPIOC_PIN9, 0) | \ - PIN_AFIO_AF(GPIOC_SCLK, 6) | \ + PIN_AFIO_AF(GPIOC_CS43L22_SCLK, 6) | \ PIN_AFIO_AF(GPIOC_PIN11, 0) | \ - PIN_AFIO_AF(GPIOC_SDIN, 6) | \ + PIN_AFIO_AF(GPIOC_CS43L22_SDIN, 6) | \ PIN_AFIO_AF(GPIOC_PIN13, 0) | \ - PIN_AFIO_AF(GPIOC_PIN14, 0) | \ - PIN_AFIO_AF(GPIOC_PIN15, 0)) + PIN_AFIO_AF(GPIOC_OSC32_IN, 0) | \ + PIN_AFIO_AF(GPIOC_OSC32_OUT, 0)) /* * GPIOD setup: @@ -522,8 +636,8 @@ * PD1 - PIN1 (input pullup). * PD2 - PIN2 (input pullup). * PD3 - PIN3 (input pullup). - * PD4 - RESET (output pushpull maximum). - * PD5 - OVER_CURRENT (input floating). + * PD4 - CS43L22_RESET (output pushpull maximum). + * PD5 - OverCurrent (input floating). * PD6 - PIN6 (input pullup). * PD7 - PIN7 (input pullup). * PD8 - PIN8 (input pullup). @@ -539,8 +653,8 @@ PIN_MODE_INPUT(GPIOD_PIN1) | \ PIN_MODE_INPUT(GPIOD_PIN2) | \ PIN_MODE_INPUT(GPIOD_PIN3) | \ - PIN_MODE_OUTPUT(GPIOD_RESET) | \ - PIN_MODE_INPUT(GPIOD_OVER_CURRENT) | \ + PIN_MODE_OUTPUT(GPIOD_CS43L22_RESET) | \ + PIN_MODE_INPUT(GPIOD_OverCurrent) | \ PIN_MODE_INPUT(GPIOD_PIN6) | \ PIN_MODE_INPUT(GPIOD_PIN7) | \ PIN_MODE_INPUT(GPIOD_PIN8) | \ @@ -555,8 +669,8 @@ PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOD_RESET) | \ - PIN_OTYPE_PUSHPULL(GPIOD_OVER_CURRENT) |\ + PIN_OTYPE_PUSHPULL(GPIOD_CS43L22_RESET) |\ + PIN_OTYPE_PUSHPULL(GPIOD_OverCurrent) |\ PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ @@ -567,28 +681,28 @@ PIN_OTYPE_PUSHPULL(GPIOD_LED3) | \ PIN_OTYPE_PUSHPULL(GPIOD_LED5) | \ PIN_OTYPE_PUSHPULL(GPIOD_LED6)) -#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_100M(GPIOD_PIN0) | \ - PIN_OSPEED_100M(GPIOD_PIN1) | \ - PIN_OSPEED_100M(GPIOD_PIN2) | \ - PIN_OSPEED_100M(GPIOD_PIN3) | \ - PIN_OSPEED_100M(GPIOD_RESET) | \ - PIN_OSPEED_100M(GPIOD_OVER_CURRENT) | \ - PIN_OSPEED_100M(GPIOD_PIN6) | \ - PIN_OSPEED_100M(GPIOD_PIN7) | \ - PIN_OSPEED_100M(GPIOD_PIN8) | \ - PIN_OSPEED_100M(GPIOD_PIN9) | \ - PIN_OSPEED_100M(GPIOD_PIN10) | \ - PIN_OSPEED_100M(GPIOD_PIN11) | \ - PIN_OSPEED_100M(GPIOD_LED4) | \ - PIN_OSPEED_100M(GPIOD_LED3) | \ - PIN_OSPEED_100M(GPIOD_LED5) | \ - PIN_OSPEED_100M(GPIOD_LED6)) +#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_PIN0) | \ + PIN_OSPEED_HIGH(GPIOD_PIN1) | \ + PIN_OSPEED_HIGH(GPIOD_PIN2) | \ + PIN_OSPEED_HIGH(GPIOD_PIN3) | \ + PIN_OSPEED_HIGH(GPIOD_CS43L22_RESET) | \ + PIN_OSPEED_HIGH(GPIOD_OverCurrent) | \ + PIN_OSPEED_HIGH(GPIOD_PIN6) | \ + PIN_OSPEED_HIGH(GPIOD_PIN7) | \ + PIN_OSPEED_HIGH(GPIOD_PIN8) | \ + PIN_OSPEED_HIGH(GPIOD_PIN9) | \ + PIN_OSPEED_HIGH(GPIOD_PIN10) | \ + PIN_OSPEED_HIGH(GPIOD_PIN11) | \ + PIN_OSPEED_HIGH(GPIOD_LED4) | \ + PIN_OSPEED_HIGH(GPIOD_LED3) | \ + PIN_OSPEED_HIGH(GPIOD_LED5) | \ + PIN_OSPEED_HIGH(GPIOD_LED6)) #define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \ PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ PIN_PUPDR_PULLUP(GPIOD_PIN2) | \ PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ - PIN_PUPDR_FLOATING(GPIOD_RESET) | \ - PIN_PUPDR_FLOATING(GPIOD_OVER_CURRENT) |\ + PIN_PUPDR_PULLUP(GPIOD_CS43L22_RESET) |\ + PIN_PUPDR_FLOATING(GPIOD_OverCurrent) |\ PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ @@ -603,8 +717,8 @@ PIN_ODR_HIGH(GPIOD_PIN1) | \ PIN_ODR_HIGH(GPIOD_PIN2) | \ PIN_ODR_HIGH(GPIOD_PIN3) | \ - PIN_ODR_HIGH(GPIOD_RESET) | \ - PIN_ODR_HIGH(GPIOD_OVER_CURRENT) | \ + PIN_ODR_HIGH(GPIOD_CS43L22_RESET) | \ + PIN_ODR_HIGH(GPIOD_OverCurrent) | \ PIN_ODR_HIGH(GPIOD_PIN6) | \ PIN_ODR_HIGH(GPIOD_PIN7) | \ PIN_ODR_HIGH(GPIOD_PIN8) | \ @@ -619,8 +733,8 @@ PIN_AFIO_AF(GPIOD_PIN1, 0) | \ PIN_AFIO_AF(GPIOD_PIN2, 0) | \ PIN_AFIO_AF(GPIOD_PIN3, 0) | \ - PIN_AFIO_AF(GPIOD_RESET, 0) | \ - PIN_AFIO_AF(GPIOD_OVER_CURRENT, 0) | \ + PIN_AFIO_AF(GPIOD_CS43L22_RESET, 0) | \ + PIN_AFIO_AF(GPIOD_OverCurrent, 0) | \ PIN_AFIO_AF(GPIOD_PIN6, 0) | \ PIN_AFIO_AF(GPIOD_PIN7, 0)) #define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \ @@ -635,29 +749,29 @@ /* * GPIOE setup: * - * PE0 - INT1 (input floating). - * PE1 - INT2 (input floating). - * PE2 - LSM_DRDY (input floating). - * PE3 - CS_SPI (output pushpull maximum). - * PE4 - LSM_INT1 (input floating). - * PE5 - LSM_INT2 (input floating). - * PE6 - PIN6 (input floating). - * PE7 - PIN7 (input floating). - * PE8 - PIN8 (input floating). - * PE9 - PIN9 (input floating). - * PE10 - PIN10 (input floating). - * PE11 - PIN11 (input floating). - * PE12 - PIN12 (input floating). - * PE13 - PIN13 (input floating). - * PE14 - PIN14 (input floating). - * PE15 - PIN15 (input floating). + * PE0 - L3GD20_INT1 (input pullup). + * PE1 - L3GD20_INT2 (input pullup). + * PE2 - LSM303DLHC_DRDY (input floating). + * PE3 - L3GD20_CS (output pushpull maximum). + * PE4 - LSM303DLHC_INT1 (output pushpull maximum). + * PE5 - LSM303DLHC_INT2 (output pushpull maximum). + * PE6 - PIN6 (input pullup). + * PE7 - PIN7 (input pullup). + * PE8 - PIN8 (input pullup). + * PE9 - PIN9 (input pullup). + * PE10 - PIN10 (input pullup). + * PE11 - PIN11 (input pullup). + * PE12 - PIN12 (input pullup). + * PE13 - PIN13 (input pullup). + * PE14 - PIN14 (input pullup). + * PE15 - PIN15 (input pullup). */ -#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_INT1) | \ - PIN_MODE_INPUT(GPIOE_INT2) | \ - PIN_MODE_INPUT(GPIOE_LSM_DRDY) | \ - PIN_MODE_OUTPUT(GPIOE_CS_SPI) | \ - PIN_MODE_INPUT(GPIOE_LSM_INT1) | \ - PIN_MODE_INPUT(GPIOE_LSM_INT2) | \ +#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_L3GD20_INT1) | \ + PIN_MODE_INPUT(GPIOE_L3GD20_INT2) | \ + PIN_MODE_INPUT(GPIOE_LSM303DLHC_DRDY) |\ + PIN_MODE_OUTPUT(GPIOE_L3GD20_CS) | \ + PIN_MODE_OUTPUT(GPIOE_LSM303DLHC_INT1) |\ + PIN_MODE_OUTPUT(GPIOE_LSM303DLHC_INT2) |\ PIN_MODE_INPUT(GPIOE_PIN6) | \ PIN_MODE_INPUT(GPIOE_PIN7) | \ PIN_MODE_INPUT(GPIOE_PIN8) | \ @@ -668,12 +782,12 @@ PIN_MODE_INPUT(GPIOE_PIN13) | \ PIN_MODE_INPUT(GPIOE_PIN14) | \ PIN_MODE_INPUT(GPIOE_PIN15)) -#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_INT1) | \ - PIN_OTYPE_PUSHPULL(GPIOE_INT2) | \ - PIN_OTYPE_PUSHPULL(GPIOE_LSM_DRDY) | \ - PIN_OTYPE_PUSHPULL(GPIOE_CS_SPI) | \ - PIN_OTYPE_PUSHPULL(GPIOE_LSM_INT1) | \ - PIN_OTYPE_PUSHPULL(GPIOE_LSM_INT2) | \ +#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_L3GD20_INT1) |\ + PIN_OTYPE_PUSHPULL(GPIOE_L3GD20_INT2) |\ + PIN_OTYPE_PUSHPULL(GPIOE_LSM303DLHC_DRDY) |\ + PIN_OTYPE_PUSHPULL(GPIOE_L3GD20_CS) | \ + PIN_OTYPE_PUSHPULL(GPIOE_LSM303DLHC_INT1) |\ + PIN_OTYPE_PUSHPULL(GPIOE_LSM303DLHC_INT2) |\ PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ @@ -684,44 +798,44 @@ PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) -#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_100M(GPIOE_INT1) | \ - PIN_OSPEED_100M(GPIOE_INT2) | \ - PIN_OSPEED_100M(GPIOE_LSM_DRDY) | \ - PIN_OSPEED_100M(GPIOE_CS_SPI) | \ - PIN_OSPEED_100M(GPIOE_LSM_INT1) | \ - PIN_OSPEED_100M(GPIOE_LSM_INT2) | \ - PIN_OSPEED_100M(GPIOE_PIN6) | \ - PIN_OSPEED_100M(GPIOE_PIN7) | \ - PIN_OSPEED_100M(GPIOE_PIN8) | \ - PIN_OSPEED_100M(GPIOE_PIN9) | \ - PIN_OSPEED_100M(GPIOE_PIN10) | \ - PIN_OSPEED_100M(GPIOE_PIN11) | \ - PIN_OSPEED_100M(GPIOE_PIN12) | \ - PIN_OSPEED_100M(GPIOE_PIN13) | \ - PIN_OSPEED_100M(GPIOE_PIN14) | \ - PIN_OSPEED_100M(GPIOE_PIN15)) -#define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(GPIOE_INT1) | \ - PIN_PUPDR_FLOATING(GPIOE_INT2) | \ - PIN_PUPDR_FLOATING(GPIOE_LSM_DRDY) | \ - PIN_PUPDR_FLOATING(GPIOE_CS_SPI) | \ - PIN_PUPDR_FLOATING(GPIOE_LSM_INT1) | \ - PIN_PUPDR_FLOATING(GPIOE_LSM_INT2) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN6) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN7) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN8) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN9) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN11) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN12) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN13) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN14) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN15)) -#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_INT1) | \ - PIN_ODR_HIGH(GPIOE_INT2) | \ - PIN_ODR_HIGH(GPIOE_LSM_DRDY) | \ - PIN_ODR_HIGH(GPIOE_CS_SPI) | \ - PIN_ODR_HIGH(GPIOE_LSM_INT1) | \ - PIN_ODR_HIGH(GPIOE_LSM_INT2) | \ +#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_L3GD20_INT1) | \ + PIN_OSPEED_HIGH(GPIOE_L3GD20_INT2) | \ + PIN_OSPEED_HIGH(GPIOE_LSM303DLHC_DRDY) |\ + PIN_OSPEED_HIGH(GPIOE_L3GD20_CS) | \ + PIN_OSPEED_HIGH(GPIOE_LSM303DLHC_INT1) |\ + PIN_OSPEED_HIGH(GPIOE_LSM303DLHC_INT2) |\ + PIN_OSPEED_HIGH(GPIOE_PIN6) | \ + PIN_OSPEED_HIGH(GPIOE_PIN7) | \ + PIN_OSPEED_HIGH(GPIOE_PIN8) | \ + PIN_OSPEED_HIGH(GPIOE_PIN9) | \ + PIN_OSPEED_HIGH(GPIOE_PIN10) | \ + PIN_OSPEED_HIGH(GPIOE_PIN11) | \ + PIN_OSPEED_HIGH(GPIOE_PIN12) | \ + PIN_OSPEED_HIGH(GPIOE_PIN13) | \ + PIN_OSPEED_HIGH(GPIOE_PIN14) | \ + PIN_OSPEED_HIGH(GPIOE_PIN15)) +#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_L3GD20_INT1) | \ + PIN_PUPDR_PULLUP(GPIOE_L3GD20_INT2) | \ + PIN_PUPDR_FLOATING(GPIOE_LSM303DLHC_DRDY) |\ + PIN_PUPDR_PULLUP(GPIOE_L3GD20_CS) | \ + PIN_PUPDR_PULLUP(GPIOE_LSM303DLHC_INT1) |\ + PIN_PUPDR_PULLUP(GPIOE_LSM303DLHC_INT2) |\ + PIN_PUPDR_PULLUP(GPIOE_PIN6) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN7) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN8) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN9) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN10) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN11) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN12) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN13) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN14) | \ + PIN_PUPDR_PULLUP(GPIOE_PIN15)) +#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_L3GD20_INT1) | \ + PIN_ODR_HIGH(GPIOE_L3GD20_INT2) | \ + PIN_ODR_HIGH(GPIOE_LSM303DLHC_DRDY) | \ + PIN_ODR_HIGH(GPIOE_L3GD20_CS) | \ + PIN_ODR_HIGH(GPIOE_LSM303DLHC_INT1) | \ + PIN_ODR_HIGH(GPIOE_LSM303DLHC_INT2) | \ PIN_ODR_HIGH(GPIOE_PIN6) | \ PIN_ODR_HIGH(GPIOE_PIN7) | \ PIN_ODR_HIGH(GPIOE_PIN8) | \ @@ -732,12 +846,12 @@ PIN_ODR_HIGH(GPIOE_PIN13) | \ PIN_ODR_HIGH(GPIOE_PIN14) | \ PIN_ODR_HIGH(GPIOE_PIN15)) -#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_INT1, 0) | \ - PIN_AFIO_AF(GPIOE_INT2, 0) | \ - PIN_AFIO_AF(GPIOE_LSM_DRDY, 0) | \ - PIN_AFIO_AF(GPIOE_CS_SPI, 0) | \ - PIN_AFIO_AF(GPIOE_LSM_INT1, 0) | \ - PIN_AFIO_AF(GPIOE_LSM_INT2, 0) | \ +#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_L3GD20_INT1, 0) | \ + PIN_AFIO_AF(GPIOE_L3GD20_INT2, 0) | \ + PIN_AFIO_AF(GPIOE_LSM303DLHC_DRDY, 0) |\ + PIN_AFIO_AF(GPIOE_L3GD20_CS, 0) | \ + PIN_AFIO_AF(GPIOE_LSM303DLHC_INT1, 0) |\ + PIN_AFIO_AF(GPIOE_LSM303DLHC_INT2, 0) |\ PIN_AFIO_AF(GPIOE_PIN6, 0) | \ PIN_AFIO_AF(GPIOE_PIN7, 0)) #define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0) | \ @@ -749,39 +863,473 @@ PIN_AFIO_AF(GPIOE_PIN14, 0) | \ PIN_AFIO_AF(GPIOE_PIN15, 0)) +/* + * GPIOF setup: + * + * PF0 - PIN0 (input pullup). + * PF1 - PIN1 (input pullup). + * PF2 - PIN2 (input pullup). + * PF3 - PIN3 (input pullup). + * PF4 - PIN4 (input pullup). + * PF5 - PIN5 (input pullup). + * PF6 - PIN6 (input pullup). + * PF7 - PIN7 (input pullup). + * PF8 - PIN8 (input pullup). + * PF9 - PIN9 (input pullup). + * PF10 - PIN10 (input pullup). + * PF11 - PIN11 (input pullup). + * PF12 - PIN12 (input pullup). + * PF13 - PIN13 (input pullup). + * PF14 - PIN14 (input pullup). + * PF15 - PIN15 (input pullup). + */ +#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | \ + PIN_MODE_INPUT(GPIOF_PIN1) | \ + PIN_MODE_INPUT(GPIOF_PIN2) | \ + PIN_MODE_INPUT(GPIOF_PIN3) | \ + PIN_MODE_INPUT(GPIOF_PIN4) | \ + PIN_MODE_INPUT(GPIOF_PIN5) | \ + PIN_MODE_INPUT(GPIOF_PIN6) | \ + PIN_MODE_INPUT(GPIOF_PIN7) | \ + PIN_MODE_INPUT(GPIOF_PIN8) | \ + PIN_MODE_INPUT(GPIOF_PIN9) | \ + PIN_MODE_INPUT(GPIOF_PIN10) | \ + PIN_MODE_INPUT(GPIOF_PIN11) | \ + PIN_MODE_INPUT(GPIOF_PIN12) | \ + PIN_MODE_INPUT(GPIOF_PIN13) | \ + PIN_MODE_INPUT(GPIOF_PIN14) | \ + PIN_MODE_INPUT(GPIOF_PIN15)) +#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) +#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_PIN0) | \ + PIN_OSPEED_HIGH(GPIOF_PIN1) | \ + PIN_OSPEED_HIGH(GPIOF_PIN2) | \ + PIN_OSPEED_HIGH(GPIOF_PIN3) | \ + PIN_OSPEED_HIGH(GPIOF_PIN4) | \ + PIN_OSPEED_HIGH(GPIOF_PIN5) | \ + PIN_OSPEED_HIGH(GPIOF_PIN6) | \ + PIN_OSPEED_HIGH(GPIOF_PIN7) | \ + PIN_OSPEED_HIGH(GPIOF_PIN8) | \ + PIN_OSPEED_HIGH(GPIOF_PIN9) | \ + PIN_OSPEED_HIGH(GPIOF_PIN10) | \ + PIN_OSPEED_HIGH(GPIOF_PIN11) | \ + PIN_OSPEED_HIGH(GPIOF_PIN12) | \ + PIN_OSPEED_HIGH(GPIOF_PIN13) | \ + PIN_OSPEED_HIGH(GPIOF_PIN14) | \ + PIN_OSPEED_HIGH(GPIOF_PIN15)) +#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_PIN0) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN1) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN2) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN3) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN4) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN5) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN6) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN7) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN8) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN9) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN10) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN11) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN12) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN13) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN14) | \ + PIN_PUPDR_PULLUP(GPIOF_PIN15)) +#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_PIN0) | \ + PIN_ODR_HIGH(GPIOF_PIN1) | \ + PIN_ODR_HIGH(GPIOF_PIN2) | \ + PIN_ODR_HIGH(GPIOF_PIN3) | \ + PIN_ODR_HIGH(GPIOF_PIN4) | \ + PIN_ODR_HIGH(GPIOF_PIN5) | \ + PIN_ODR_HIGH(GPIOF_PIN6) | \ + PIN_ODR_HIGH(GPIOF_PIN7) | \ + PIN_ODR_HIGH(GPIOF_PIN8) | \ + PIN_ODR_HIGH(GPIOF_PIN9) | \ + PIN_ODR_HIGH(GPIOF_PIN10) | \ + PIN_ODR_HIGH(GPIOF_PIN11) | \ + PIN_ODR_HIGH(GPIOF_PIN12) | \ + PIN_ODR_HIGH(GPIOF_PIN13) | \ + PIN_ODR_HIGH(GPIOF_PIN14) | \ + PIN_ODR_HIGH(GPIOF_PIN15)) +#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0) | \ + PIN_AFIO_AF(GPIOF_PIN1, 0) | \ + PIN_AFIO_AF(GPIOF_PIN2, 0) | \ + PIN_AFIO_AF(GPIOF_PIN3, 0) | \ + PIN_AFIO_AF(GPIOF_PIN4, 0) | \ + PIN_AFIO_AF(GPIOF_PIN5, 0) | \ + PIN_AFIO_AF(GPIOF_PIN6, 0) | \ + PIN_AFIO_AF(GPIOF_PIN7, 0)) +#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \ + PIN_AFIO_AF(GPIOF_PIN9, 0) | \ + PIN_AFIO_AF(GPIOF_PIN10, 0) | \ + PIN_AFIO_AF(GPIOF_PIN11, 0) | \ + PIN_AFIO_AF(GPIOF_PIN12, 0) | \ + PIN_AFIO_AF(GPIOF_PIN13, 0) | \ + PIN_AFIO_AF(GPIOF_PIN14, 0) | \ + PIN_AFIO_AF(GPIOF_PIN15, 0)) + +/* + * GPIOG setup: + * + * PG0 - PIN0 (input pullup). + * PG1 - PIN1 (input pullup). + * PG2 - PIN2 (input pullup). + * PG3 - PIN3 (input pullup). + * PG4 - PIN4 (input pullup). + * PG5 - PIN5 (input pullup). + * PG6 - PIN6 (input pullup). + * PG7 - PIN7 (input pullup). + * PG8 - PIN8 (input pullup). + * PG9 - PIN9 (input pullup). + * PG10 - PIN10 (input pullup). + * PG11 - PIN11 (input pullup). + * PG12 - PIN12 (input pullup). + * PG13 - PIN13 (input pullup). + * PG14 - PIN14 (input pullup). + * PG15 - PIN15 (input pullup). + */ +#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \ + PIN_MODE_INPUT(GPIOG_PIN1) | \ + PIN_MODE_INPUT(GPIOG_PIN2) | \ + PIN_MODE_INPUT(GPIOG_PIN3) | \ + PIN_MODE_INPUT(GPIOG_PIN4) | \ + PIN_MODE_INPUT(GPIOG_PIN5) | \ + PIN_MODE_INPUT(GPIOG_PIN6) | \ + PIN_MODE_INPUT(GPIOG_PIN7) | \ + PIN_MODE_INPUT(GPIOG_PIN8) | \ + PIN_MODE_INPUT(GPIOG_PIN9) | \ + PIN_MODE_INPUT(GPIOG_PIN10) | \ + PIN_MODE_INPUT(GPIOG_PIN11) | \ + PIN_MODE_INPUT(GPIOG_PIN12) | \ + PIN_MODE_INPUT(GPIOG_PIN13) | \ + PIN_MODE_INPUT(GPIOG_PIN14) | \ + PIN_MODE_INPUT(GPIOG_PIN15)) +#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) +#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_HIGH(GPIOG_PIN0) | \ + PIN_OSPEED_HIGH(GPIOG_PIN1) | \ + PIN_OSPEED_HIGH(GPIOG_PIN2) | \ + PIN_OSPEED_HIGH(GPIOG_PIN3) | \ + PIN_OSPEED_HIGH(GPIOG_PIN4) | \ + PIN_OSPEED_HIGH(GPIOG_PIN5) | \ + PIN_OSPEED_HIGH(GPIOG_PIN6) | \ + PIN_OSPEED_HIGH(GPIOG_PIN7) | \ + PIN_OSPEED_HIGH(GPIOG_PIN8) | \ + PIN_OSPEED_HIGH(GPIOG_PIN9) | \ + PIN_OSPEED_HIGH(GPIOG_PIN10) | \ + PIN_OSPEED_HIGH(GPIOG_PIN11) | \ + PIN_OSPEED_HIGH(GPIOG_PIN12) | \ + PIN_OSPEED_HIGH(GPIOG_PIN13) | \ + PIN_OSPEED_HIGH(GPIOG_PIN14) | \ + PIN_OSPEED_HIGH(GPIOG_PIN15)) +#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN1) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN2) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN3) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN4) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN5) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN6) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN7) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN8) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN9) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN10) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN11) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN12) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN13) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN14) | \ + PIN_PUPDR_PULLUP(GPIOG_PIN15)) +#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \ + PIN_ODR_HIGH(GPIOG_PIN1) | \ + PIN_ODR_HIGH(GPIOG_PIN2) | \ + PIN_ODR_HIGH(GPIOG_PIN3) | \ + PIN_ODR_HIGH(GPIOG_PIN4) | \ + PIN_ODR_HIGH(GPIOG_PIN5) | \ + PIN_ODR_HIGH(GPIOG_PIN6) | \ + PIN_ODR_HIGH(GPIOG_PIN7) | \ + PIN_ODR_HIGH(GPIOG_PIN8) | \ + PIN_ODR_HIGH(GPIOG_PIN9) | \ + PIN_ODR_HIGH(GPIOG_PIN10) | \ + PIN_ODR_HIGH(GPIOG_PIN11) | \ + PIN_ODR_HIGH(GPIOG_PIN12) | \ + PIN_ODR_HIGH(GPIOG_PIN13) | \ + PIN_ODR_HIGH(GPIOG_PIN14) | \ + PIN_ODR_HIGH(GPIOG_PIN15)) +#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0) | \ + PIN_AFIO_AF(GPIOG_PIN1, 0) | \ + PIN_AFIO_AF(GPIOG_PIN2, 0) | \ + PIN_AFIO_AF(GPIOG_PIN3, 0) | \ + PIN_AFIO_AF(GPIOG_PIN4, 0) | \ + PIN_AFIO_AF(GPIOG_PIN5, 0) | \ + PIN_AFIO_AF(GPIOG_PIN6, 0) | \ + PIN_AFIO_AF(GPIOG_PIN7, 0)) +#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0) | \ + PIN_AFIO_AF(GPIOG_PIN9, 0) | \ + PIN_AFIO_AF(GPIOG_PIN10, 0) | \ + PIN_AFIO_AF(GPIOG_PIN11, 0) | \ + PIN_AFIO_AF(GPIOG_PIN12, 0) | \ + PIN_AFIO_AF(GPIOG_PIN13, 0) | \ + PIN_AFIO_AF(GPIOG_PIN14, 0) | \ + PIN_AFIO_AF(GPIOG_PIN15, 0)) + /* * GPIOH setup: * * PH0 - OSC_IN (input floating). * PH1 - OSC_OUT (input floating). - * PH2 - PIN2 (input floating). - * PH3 - PIN3 (input floating). - * PH4 - PIN4 (input floating). - * PH5 - PIN5 (input floating). - * PH6 - PIN6 (input floating). - * PH7 - PIN7 (input floating). - * PH8 - PIN8 (input floating). - * PH9 - PIN9 (input floating). - * PH10 - PIN10 (input floating). - * PH11 - PIN11 (input floating). - * PH12 - PIN12 (input floating). - * PH13 - PIN13 (input floating). - * PH14 - PIN14 (input floating). - * PH15 - PIN15 (input floating). + * PH2 - PIN2 (input pullup). + * PH3 - PIN3 (input pullup). + * PH4 - PIN4 (input pullup). + * PH5 - PIN5 (input pullup). + * PH6 - PIN6 (input pullup). + * PH7 - PIN7 (input pullup). + * PH8 - PIN8 (input pullup). + * PH9 - PIN9 (input pullup). + * PH10 - PIN10 (input pullup). + * PH11 - PIN11 (input pullup). + * PH12 - PIN12 (input pullup). + * PH13 - PIN13 (input pullup). + * PH14 - PIN14 (input pullup). + * PH15 - PIN15 (input pullup). */ #define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \ - PIN_MODE_INPUT(GPIOH_OSC_OUT)) + PIN_MODE_INPUT(GPIOH_OSC_OUT) | \ + PIN_MODE_INPUT(GPIOH_PIN2) | \ + PIN_MODE_INPUT(GPIOH_PIN3) | \ + PIN_MODE_INPUT(GPIOH_PIN4) | \ + PIN_MODE_INPUT(GPIOH_PIN5) | \ + PIN_MODE_INPUT(GPIOH_PIN6) | \ + PIN_MODE_INPUT(GPIOH_PIN7) | \ + PIN_MODE_INPUT(GPIOH_PIN8) | \ + PIN_MODE_INPUT(GPIOH_PIN9) | \ + PIN_MODE_INPUT(GPIOH_PIN10) | \ + PIN_MODE_INPUT(GPIOH_PIN11) | \ + PIN_MODE_INPUT(GPIOH_PIN12) | \ + PIN_MODE_INPUT(GPIOH_PIN13) | \ + PIN_MODE_INPUT(GPIOH_PIN14) | \ + PIN_MODE_INPUT(GPIOH_PIN15)) #define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \ - PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT)) -#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_100M(GPIOH_OSC_IN) | \ - PIN_OSPEED_100M(GPIOH_OSC_OUT)) + PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) +#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_HIGH(GPIOH_OSC_IN) | \ + PIN_OSPEED_HIGH(GPIOH_OSC_OUT) | \ + PIN_OSPEED_HIGH(GPIOH_PIN2) | \ + PIN_OSPEED_HIGH(GPIOH_PIN3) | \ + PIN_OSPEED_HIGH(GPIOH_PIN4) | \ + PIN_OSPEED_HIGH(GPIOH_PIN5) | \ + PIN_OSPEED_HIGH(GPIOH_PIN6) | \ + PIN_OSPEED_HIGH(GPIOH_PIN7) | \ + PIN_OSPEED_HIGH(GPIOH_PIN8) | \ + PIN_OSPEED_HIGH(GPIOH_PIN9) | \ + PIN_OSPEED_HIGH(GPIOH_PIN10) | \ + PIN_OSPEED_HIGH(GPIOH_PIN11) | \ + PIN_OSPEED_HIGH(GPIOH_PIN12) | \ + PIN_OSPEED_HIGH(GPIOH_PIN13) | \ + PIN_OSPEED_HIGH(GPIOH_PIN14) | \ + PIN_OSPEED_HIGH(GPIOH_PIN15)) #define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \ - PIN_PUPDR_FLOATING(GPIOH_OSC_OUT)) + PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN2) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN3) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN4) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN5) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN6) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN7) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN8) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN9) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN10) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN11) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN12) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN13) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN14) | \ + PIN_PUPDR_PULLUP(GPIOH_PIN15)) #define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | \ - PIN_ODR_HIGH(GPIOH_OSC_OUT)) + PIN_ODR_HIGH(GPIOH_OSC_OUT) | \ + PIN_ODR_HIGH(GPIOH_PIN2) | \ + PIN_ODR_HIGH(GPIOH_PIN3) | \ + PIN_ODR_HIGH(GPIOH_PIN4) | \ + PIN_ODR_HIGH(GPIOH_PIN5) | \ + PIN_ODR_HIGH(GPIOH_PIN6) | \ + PIN_ODR_HIGH(GPIOH_PIN7) | \ + PIN_ODR_HIGH(GPIOH_PIN8) | \ + PIN_ODR_HIGH(GPIOH_PIN9) | \ + PIN_ODR_HIGH(GPIOH_PIN10) | \ + PIN_ODR_HIGH(GPIOH_PIN11) | \ + PIN_ODR_HIGH(GPIOH_PIN12) | \ + PIN_ODR_HIGH(GPIOH_PIN13) | \ + PIN_ODR_HIGH(GPIOH_PIN14) | \ + PIN_ODR_HIGH(GPIOH_PIN15)) #define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0) | \ - PIN_AFIO_AF(GPIOH_OSC_OUT, 0)) -#define VAL_GPIOH_AFRH (0) + PIN_AFIO_AF(GPIOH_OSC_OUT, 0) | \ + PIN_AFIO_AF(GPIOH_PIN2, 0) | \ + PIN_AFIO_AF(GPIOH_PIN3, 0) | \ + PIN_AFIO_AF(GPIOH_PIN4, 0) | \ + PIN_AFIO_AF(GPIOH_PIN5, 0) | \ + PIN_AFIO_AF(GPIOH_PIN6, 0) | \ + PIN_AFIO_AF(GPIOH_PIN7, 0)) +#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0) | \ + PIN_AFIO_AF(GPIOH_PIN9, 0) | \ + PIN_AFIO_AF(GPIOH_PIN10, 0) | \ + PIN_AFIO_AF(GPIOH_PIN11, 0) | \ + PIN_AFIO_AF(GPIOH_PIN12, 0) | \ + PIN_AFIO_AF(GPIOH_PIN13, 0) | \ + PIN_AFIO_AF(GPIOH_PIN14, 0) | \ + PIN_AFIO_AF(GPIOH_PIN15, 0)) + +/* + * GPIOI setup: + * + * PI0 - PIN0 (input pullup). + * PI1 - PIN1 (input pullup). + * PI2 - PIN2 (input pullup). + * PI3 - PIN3 (input pullup). + * PI4 - PIN4 (input pullup). + * PI5 - PIN5 (input pullup). + * PI6 - PIN6 (input pullup). + * PI7 - PIN7 (input pullup). + * PI8 - PIN8 (input pullup). + * PI9 - PIN9 (input pullup). + * PI10 - PIN10 (input pullup). + * PI11 - PIN11 (input pullup). + * PI12 - PIN12 (input pullup). + * PI13 - PIN13 (input pullup). + * PI14 - PIN14 (input pullup). + * PI15 - PIN15 (input pullup). + */ +#define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_PIN0) | \ + PIN_MODE_INPUT(GPIOI_PIN1) | \ + PIN_MODE_INPUT(GPIOI_PIN2) | \ + PIN_MODE_INPUT(GPIOI_PIN3) | \ + PIN_MODE_INPUT(GPIOI_PIN4) | \ + PIN_MODE_INPUT(GPIOI_PIN5) | \ + PIN_MODE_INPUT(GPIOI_PIN6) | \ + PIN_MODE_INPUT(GPIOI_PIN7) | \ + PIN_MODE_INPUT(GPIOI_PIN8) | \ + PIN_MODE_INPUT(GPIOI_PIN9) | \ + PIN_MODE_INPUT(GPIOI_PIN10) | \ + PIN_MODE_INPUT(GPIOI_PIN11) | \ + PIN_MODE_INPUT(GPIOI_PIN12) | \ + PIN_MODE_INPUT(GPIOI_PIN13) | \ + PIN_MODE_INPUT(GPIOI_PIN14) | \ + PIN_MODE_INPUT(GPIOI_PIN15)) +#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN10) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | \ + PIN_OTYPE_PUSHPULL(GPIOI_PIN15)) +#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_HIGH(GPIOI_PIN0) | \ + PIN_OSPEED_HIGH(GPIOI_PIN1) | \ + PIN_OSPEED_HIGH(GPIOI_PIN2) | \ + PIN_OSPEED_HIGH(GPIOI_PIN3) | \ + PIN_OSPEED_HIGH(GPIOI_PIN4) | \ + PIN_OSPEED_HIGH(GPIOI_PIN5) | \ + PIN_OSPEED_HIGH(GPIOI_PIN6) | \ + PIN_OSPEED_HIGH(GPIOI_PIN7) | \ + PIN_OSPEED_HIGH(GPIOI_PIN8) | \ + PIN_OSPEED_HIGH(GPIOI_PIN9) | \ + PIN_OSPEED_HIGH(GPIOI_PIN10) | \ + PIN_OSPEED_HIGH(GPIOI_PIN11) | \ + PIN_OSPEED_HIGH(GPIOI_PIN12) | \ + PIN_OSPEED_HIGH(GPIOI_PIN13) | \ + PIN_OSPEED_HIGH(GPIOI_PIN14) | \ + PIN_OSPEED_HIGH(GPIOI_PIN15)) +#define VAL_GPIOI_PUPDR (PIN_PUPDR_PULLUP(GPIOI_PIN0) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN1) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN2) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN3) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN4) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN5) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN6) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN7) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN8) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN9) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN10) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN11) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN12) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN13) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN14) | \ + PIN_PUPDR_PULLUP(GPIOI_PIN15)) +#define VAL_GPIOI_ODR (PIN_ODR_HIGH(GPIOI_PIN0) | \ + PIN_ODR_HIGH(GPIOI_PIN1) | \ + PIN_ODR_HIGH(GPIOI_PIN2) | \ + PIN_ODR_HIGH(GPIOI_PIN3) | \ + PIN_ODR_HIGH(GPIOI_PIN4) | \ + PIN_ODR_HIGH(GPIOI_PIN5) | \ + PIN_ODR_HIGH(GPIOI_PIN6) | \ + PIN_ODR_HIGH(GPIOI_PIN7) | \ + PIN_ODR_HIGH(GPIOI_PIN8) | \ + PIN_ODR_HIGH(GPIOI_PIN9) | \ + PIN_ODR_HIGH(GPIOI_PIN10) | \ + PIN_ODR_HIGH(GPIOI_PIN11) | \ + PIN_ODR_HIGH(GPIOI_PIN12) | \ + PIN_ODR_HIGH(GPIOI_PIN13) | \ + PIN_ODR_HIGH(GPIOI_PIN14) | \ + PIN_ODR_HIGH(GPIOI_PIN15)) +#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0) | \ + PIN_AFIO_AF(GPIOI_PIN1, 0) | \ + PIN_AFIO_AF(GPIOI_PIN2, 0) | \ + PIN_AFIO_AF(GPIOI_PIN3, 0) | \ + PIN_AFIO_AF(GPIOI_PIN4, 0) | \ + PIN_AFIO_AF(GPIOI_PIN5, 0) | \ + PIN_AFIO_AF(GPIOI_PIN6, 0) | \ + PIN_AFIO_AF(GPIOI_PIN7, 0)) +#define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, 0) | \ + PIN_AFIO_AF(GPIOI_PIN9, 0) | \ + PIN_AFIO_AF(GPIOI_PIN10, 0) | \ + PIN_AFIO_AF(GPIOI_PIN11, 0) | \ + PIN_AFIO_AF(GPIOI_PIN12, 0) | \ + PIN_AFIO_AF(GPIOI_PIN13, 0) | \ + PIN_AFIO_AF(GPIOI_PIN14, 0) | \ + PIN_AFIO_AF(GPIOI_PIN15, 0)) #if !defined(_FROM_ASM_) diff --git a/os/hal/boards/ST_STM32F401C_DISCOVERY/cfg/board.chcfg b/os/hal/boards/ST_STM32F401C_DISCOVERY/cfg/board.chcfg new file mode 100644 index 000000000..ae64e0e91 --- /dev/null +++ b/os/hal/boards/ST_STM32F401C_DISCOVERY/cfg/board.chcfg @@ -0,0 +1,1193 @@ + + + + + resources/gencfg/processors/boards/stm32f4xx/templates + .. + 3.0.x + + STMicroelectronics STM32F401C-Discovery + ST_STM32F401C_DISCOVERY + + STM32F401xC + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +