AT91SAM7A3. Initial commit.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4799 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -31,7 +31,7 @@ const PALConfig pal_default_config =
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{
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{VAL_PIOA_ODSR, VAL_PIOA_OSR, VAL_PIOA_PUSR},
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#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
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(SAM7_PLATFORM == SAM7X512)
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(SAM7_PLATFORM == SAM7X512) || (SAM7_PLATFORM == SAM7A3)
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{VAL_PIOB_ODSR, VAL_PIOB_OSR, VAL_PIOB_PUSR}
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#endif
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};
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@ -31,7 +31,7 @@ const PALConfig pal_default_config =
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{
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{VAL_PIOA_ODSR, VAL_PIOA_OSR, VAL_PIOA_PUSR},
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#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
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(SAM7_PLATFORM == SAM7X512)
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(SAM7_PLATFORM == SAM7X512) || (SAM7_PLATFORM == SAM7A3)
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{VAL_PIOB_ODSR, VAL_PIOB_OSR, VAL_PIOB_PUSR}
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#endif
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};
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@ -0,0 +1,113 @@
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/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "ch.h"
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#include "hal.h"
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/**
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* @brief PAL setup.
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* @details Digital I/O ports static configuration as defined in @p board.h.
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* This variable is used by the HAL when initializing the PAL driver.
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*/
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#if HAL_USE_PAL || defined(__DOXYGEN__)
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const PALConfig pal_default_config =
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{
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{VAL_PIOA_ODSR, VAL_PIOA_OSR, VAL_PIOA_PUSR},
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#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
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(SAM7_PLATFORM == SAM7X512) || (SAM7_PLATFORM == SAM7A3)
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{VAL_PIOB_ODSR, VAL_PIOB_OSR, VAL_PIOB_PUSR}
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#endif
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};
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#endif
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/*
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* SYS IRQ handling here.
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*/
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static CH_IRQ_HANDLER(SYSIrqHandler) {
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CH_IRQ_PROLOGUE();
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if (AT91C_BASE_PITC->PITC_PISR & AT91C_PITC_PITS) {
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(void) AT91C_BASE_PITC->PITC_PIVR;
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chSysLockFromIsr();
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chSysTimerHandlerI();
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chSysUnlockFromIsr();
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}
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#if USE_SAM7_DBGU_UART
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if (AT91C_BASE_DBGU->DBGU_CSR &
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(AT91C_US_RXRDY | AT91C_US_TXRDY | AT91C_US_PARE | AT91C_US_FRAME | AT91C_US_OVRE | AT91C_US_RXBRK)) {
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sd_lld_serve_interrupt(&SDDBG);
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}
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#endif
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AT91C_BASE_AIC->AIC_EOICR = 0;
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CH_IRQ_EPILOGUE();
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}
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/*
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* Early initialization code.
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* This initialization must be performed just after stack setup and before
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* any other initialization.
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*/
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void __early_init(void) {
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/* Watchdog disabled.*/
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AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
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at91sam7_clock_init();
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}
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#if HAL_USE_MMC_SPI
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/* Board-related functions related to the MMC_SPI driver.*/
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bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
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(void)mmcp;
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return !palReadPad(IOPORT2, PIOB_MMC_CP);
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}
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bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
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(void)mmcp;
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return palReadPad(IOPORT2, PIOB_MMC_WP);
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}
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#endif
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/*
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* Board-specific initialization code.
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*/
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void boardInit(void) {
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/*
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* PIT Initialization.
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*/
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AIC_ConfigureIT(AT91C_ID_SYS,
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AT91C_AIC_SRCTYPE_HIGH_LEVEL | (AT91C_AIC_PRIOR_HIGHEST - 1),
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SYSIrqHandler);
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AIC_EnableIT(AT91C_ID_SYS);
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AT91C_BASE_PITC->PITC_PIMR = (MCK / 16 / CH_FREQUENCY) - 1;
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AT91C_BASE_PITC->PITC_PIMR |= AT91C_PITC_PITEN | AT91C_PITC_PITIEN;
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/*
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* RTS/CTS pins enabled for USART0 only.
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*/
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AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_RTS0 | AT91C_PA4_CTS0;
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AT91C_BASE_PIOA->PIO_ASR = AT91C_PIO_PA3 | AT91C_PIO_PA4;
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AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PIO_PA3 | AT91C_PIO_PA4;
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}
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@ -0,0 +1,97 @@
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/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/*
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* Setup for the Studiel AT91SAM7A3-EK board.
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*/
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/*
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* Board identifier.
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*/
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#define BOARD_STUDIEL_AT91SAM7A3_EK
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#define BOARD_NAME "Studiel AT91SAM7A3-EK eval. board"
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/*
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* Select your platform by modifying the following line.
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*/
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#if !defined(SAM7A3_PLATFORM)
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#define SAM7_PLATFORM SAM7A3
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#endif
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#include "at91sam7.h"
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#define CLK 18432000
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#define MCK 48054857
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/*
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* I/O definitions.
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*/
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#define PIOA_RXD0 2
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#define PIOA_RXD0_MASK (1 << PIOA_RXD0)
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#define PIOA_TXD0 3
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#define PIOA_TXD0_MASK (1 << PIOA_TXD0)
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#define PIOA_LED1 20
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#define PIOA_LED1_MASK (1 << PIOA_LED1)
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#define PIOA_LED2 21
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#define PIOA_LED2_MASK (1 << PIOA_LED2)
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#define PIOA_LED3 24
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#define PIOA_LED3_MASK (1 << PIOA_LED3)
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#define PIOA_LED4 25
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#define PIOA_LED4_MASK (1 << PIOA_LED4)
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// mmc-spi
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#define PIOA_SPI0_NSS 14
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#define PIOA_SPI0_NSS_MASK (1 << PIOA_SPI0_NSS)
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#define PIOA_SPI0_MISO 15
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#define PIOA_SPI0_MISO_MASK (1 << PIOA_SPI0_MISO)
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#define PIOA_SPI0_MOSI 16
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#define PIOA_SPI0_MOSI_MASK (1 << PIOA_SPI0_MOSI)
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#define PIOA_SPI0_CLK 17
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#define PIOA_SPI0_CLK_MASK (1 << PIOA_SPI0_CLK)
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/*
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* Initial I/O setup.
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*/
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/* Output data. */
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#define VAL_PIOA_ODSR 0x00000000
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/* Direction. */
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#define VAL_PIOA_OSR 0x00000000 | PIOA_LED1_MASK | PIOA_LED2_MASK | \
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PIOA_LED3_MASK | PIOA_LED4_MASK
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/* Pull-up. */
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#define VAL_PIOA_PUSR 0xFFFFFFFF
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#define VAL_PIOB_ODSR 0x00000000 /* Output data. */
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#define VAL_PIOB_OSR 0x00000000 /* Direction. */
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#define VAL_PIOB_PUSR 0xFFFFFFFF /* Pull-up. */
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#if !defined(_FROM_ASM_)
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#ifdef __cplusplus
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extern "C" {
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#endif
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void boardInit(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _FROM_ASM_ */
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#endif /* _BOARD_H_ */
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@ -31,6 +31,7 @@
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#define SAM7X128 4
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#define SAM7X256 5
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#define SAM7X512 6
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#define SAM7A3 7
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#ifndef SAM7_PLATFORM
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#error "SAM7 platform not defined"
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@ -50,6 +51,8 @@
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#include "at91lib/AT91SAM7X256.h"
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#elif SAM7_PLATFORM == SAM7X512
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#include "at91lib/AT91SAM7X512.h"
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#elif SAM7_PLATFORM == SAM7A3
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#include "at91lib/AT91SAM7A3.h"
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#else
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#error "SAM7 platform not supported"
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#endif
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@ -63,7 +63,7 @@ void _pal_lld_init(const PALConfig *config) {
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uint32_t ports = (1 << AT91C_ID_PIOA);
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#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
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(SAM7_PLATFORM == SAM7X512)
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(SAM7_PLATFORM == SAM7X512) || (SAM7_PLATFORM == SAM7A3)
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ports |= (1 << AT91C_ID_PIOB);
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#endif
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AT91C_BASE_PMC->PMC_PCER = ports;
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@ -87,7 +87,7 @@ void _pal_lld_init(const PALConfig *config) {
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* PIOB setup.
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*/
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#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
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(SAM7_PLATFORM == SAM7X512)
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(SAM7_PLATFORM == SAM7X512) || (SAM7_PLATFORM == SAM7A3)
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AT91C_BASE_PIOB->PIO_PPUER = config->P1Data.pusr; /* Pull-up as spec.*/
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AT91C_BASE_PIOB->PIO_PPUDR = ~config->P1Data.pusr;
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AT91C_BASE_PIOB->PIO_PER = 0xFFFFFFFF; /* PIO enabled.*/
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@ -64,7 +64,8 @@ typedef struct {
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/** @brief Port 0 setup data.*/
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at91sam7_pio_setup_t P0Data;
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#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
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(SAM7_PLATFORM == SAM7X512) || defined(__DOXYGEN__)
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(SAM7_PLATFORM == SAM7X512) || (SAM7_PLATFORM == SAM7A3) || \
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defined(__DOXYGEN__)
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/** @brief Port 1 setup data.*/
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at91sam7_pio_setup_t P1Data;
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#endif
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@ -112,7 +113,8 @@ typedef AT91PS_PIO ioportid_t;
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* @brief PIO port B identifier.
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*/
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#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
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(SAM7_PLATFORM == SAM7X512) || defined(__DOXYGEN__)
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(SAM7_PLATFORM == SAM7X512) || (SAM7_PLATFORM == SAM7A3) || \
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defined(__DOXYGEN__)
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#define IOPORT2 AT91C_BASE_PIOB
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#endif
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@ -51,9 +51,19 @@
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#define SAM7_DBGU_RX AT91C_PA27_DRXD
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#define SAM7_DBGU_TX AT91C_PA28_DTXD
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#elif (SAM7_PLATFORM == SAM7A3)
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#define SAM7_USART0_RX AT91C_PA2_RXD0
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#define SAM7_USART0_TX AT91C_PA3_TXD0
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#define SAM7_USART1_RX AT91C_PA7_RXD1
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#define SAM7_USART1_TX AT91C_PA8_TXD1
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#define SAM7_USART2_RX AT91C_PA9_RXD2
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#define SAM7_USART2_TX AT91C_PA10_TXD2
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#define SAM7_DBGU_RX AT91C_PA30_DRXD
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#define SAM7_DBGU_TX AT91C_PA31_DTXD
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#else
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#error "serial lines not defined for this SAM7 version"
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#endif
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#endif /* HAL_USE_SERIAL */
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/*===========================================================================*/
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/* Driver exported variables. */
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@ -68,10 +78,17 @@ SerialDriver SD1;
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/** @brief USART1 serial driver identifier.*/
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SerialDriver SD2;
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#endif
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#if (SAM7_PLATFORM == SAM7A3)
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#if USE_SAM7_USART2 || defined(__DOXYGEN__)
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/** @brief USART2 serial driver identifier.*/
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SerialDriver SD3;
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#endif
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#endif
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#if USE_SAM7_DBGU_UART || defined(__DOXYGEN__)
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/** @brief DBGU_UART serial driver identifier.*/
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SerialDriver SD3;
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SerialDriver SDDBG;
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#endif
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/*===========================================================================*/
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@ -212,9 +229,19 @@ static void notify2(GenericQueue *qp) {
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}
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#endif
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#if USE_SAM7_DBGU_UART || defined(__DOXYGEN__)
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#if (SAM7_PLATFORM == SAM7A3)
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#if USE_SAM7_USART2 || defined(__DOXYGEN__)
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static void notify3(GenericQueue *qp) {
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(void)qp;
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AT91C_BASE_US2->US_IER = AT91C_US_TXRDY;
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}
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#endif
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#endif /* (SAM7_PLATFORM == SAM7A3) */
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#if USE_SAM7_DBGU_UART || defined(__DOXYGEN__)
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static void notify_dbg(GenericQueue *qp) {
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(void)qp;
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AT91C_BASE_DBGU->DBGU_IER = AT91C_US_TXRDY;
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}
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@ -254,6 +281,23 @@ CH_IRQ_HANDLER(USART1IrqHandler) {
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}
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#endif
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#if (SAM7_PLATFORM == SAM7A3)
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#if USE_SAM7_USART2 || defined(__DOXYGEN__)
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/**
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* @brief USART2 interrupt handler.
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*
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* @isr
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*/
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CH_IRQ_HANDLER(USART2IrqHandler) {
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CH_IRQ_PROLOGUE();
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sd_lld_serve_interrupt(&SD3);
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AT91C_BASE_AIC->AIC_EOICR = 0;
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CH_IRQ_EPILOGUE();
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}
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#endif
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#endif /* (SAM7_PLATFORM == SAM7A3) */
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/* note - DBGU_UART IRQ is the SysIrq in board.c
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since it's not vectored separately by the AIC.*/
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@ -290,12 +334,25 @@ void sd_lld_init(void) {
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USART1IrqHandler);
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#endif
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#if USE_SAM7_DBGU_UART
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#if (SAM7_PLATFORM == SAM7A3)
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#if USE_SAM7_USART2
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sdObjectInit(&SD3, NULL, notify3);
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SD3.usart = AT91C_BASE_US2;
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AT91C_BASE_PIOA->PIO_PDR = SAM7_USART2_RX | SAM7_USART2_TX;
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AT91C_BASE_PIOA->PIO_ASR = SAM7_USART2_RX | SAM7_USART2_TX;
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AT91C_BASE_PIOA->PIO_PPUDR = SAM7_USART2_RX | SAM7_USART2_TX;
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AIC_ConfigureIT(AT91C_ID_US2,
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AT91C_AIC_SRCTYPE_HIGH_LEVEL | SAM7_USART2_PRIORITY,
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USART2IrqHandler);
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#endif
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#endif /* (SAM7_PLATFORM == SAM7A3) */
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#if USE_SAM7_DBGU_UART
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sdObjectInit(&SDDBG, NULL, notify_dbg);
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/* this is a little cheap, but OK for now since there's enough overlap
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between dbgu and usart register maps. it means we can reuse all the
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same usart interrupt handling and config that already exists.*/
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SD3.usart = (AT91PS_USART)AT91C_BASE_DBGU;
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SDDBG.usart = (AT91PS_USART)AT91C_BASE_DBGU;
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AT91C_BASE_PIOA->PIO_PDR = SAM7_DBGU_RX | SAM7_DBGU_TX;
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AT91C_BASE_PIOA->PIO_ASR = SAM7_DBGU_RX | SAM7_DBGU_TX;
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AT91C_BASE_PIOA->PIO_PPUDR = SAM7_DBGU_RX | SAM7_DBGU_TX;
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@ -334,6 +391,16 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
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AIC_EnableIT(AT91C_ID_US1);
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}
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#endif
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#if (SAM7_PLATFORM == SAM7A3)
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#if USE_SAM7_USART2
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if (&SD3 == sdp) {
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/* Starts the clock and clears possible sources of immediate interrupts.*/
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AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_US2);
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/* Enables associated interrupt vector.*/
|
||||
AIC_EnableIT(AT91C_ID_US2);
|
||||
}
|
||||
#endif
|
||||
#endif /* (SAM7_PLATFORM == SAM7A3) */
|
||||
/* Note - no explicit start for SD3 (DBGU_UART) since it's not included
|
||||
in the AIC or PMC.*/
|
||||
}
|
||||
|
@ -368,7 +435,7 @@ void sd_lld_stop(SerialDriver *sdp) {
|
|||
}
|
||||
#endif
|
||||
#if USE_SAM7_DBGU_UART
|
||||
if (&SD3 == sdp) {
|
||||
if (&SDDBG == sdp) {
|
||||
AT91C_BASE_DBGU->DBGU_IDR = 0xFFFFFFFF;
|
||||
return;
|
||||
}
|
||||
|
|
|
@ -57,6 +57,17 @@
|
|||
#define USE_SAM7_USART1 TRUE
|
||||
#endif
|
||||
|
||||
#if (SAM7_PLATFORM == SAM7A3)
|
||||
/**
|
||||
* @brief UART2 driver enable switch.
|
||||
* @details If set to @p TRUE the support for USART3 is included.
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(USE_SAM7_USART2) || defined(__DOXYGEN__)
|
||||
#define USE_SAM7_USART2 TRUE
|
||||
#endif
|
||||
#endif /* (SAM7_PLATFORM == SAM7A3) */
|
||||
|
||||
/**
|
||||
* @brief DBGU UART driver enable switch.
|
||||
* @details If set to @p TRUE the support for the DBGU UART is included.
|
||||
|
@ -80,6 +91,15 @@
|
|||
#define SAM7_USART1_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 2)
|
||||
#endif
|
||||
|
||||
#if (SAM7_PLATFORM == SAM7A3)
|
||||
/**
|
||||
* @brief UART2 interrupt priority level setting.
|
||||
*/
|
||||
#if !defined(SAM7_USART2_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define SAM7_USART2_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 2)
|
||||
#endif
|
||||
#endif /* (SAM7_PLATFORM == SAM7A3) */
|
||||
|
||||
/**
|
||||
* @brief DBGU_UART interrupt priority level setting.
|
||||
*/
|
||||
|
@ -146,9 +166,14 @@ extern SerialDriver SD1;
|
|||
#if USE_SAM7_USART1 && !defined(__DOXYGEN__)
|
||||
extern SerialDriver SD2;
|
||||
#endif
|
||||
#if USE_SAM7_DBGU_UART
|
||||
#if (SAM7_PLATFORM == SAM7A3)
|
||||
#if USE_SAM7_USART2 && !defined(__DOXYGEN__)
|
||||
extern SerialDriver SD3;
|
||||
#endif
|
||||
#endif
|
||||
#if USE_SAM7_DBGU_UART
|
||||
extern SerialDriver SDDBG;
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
|
Loading…
Reference in New Issue