AT91SAM7A3. Initial commit.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4799 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
barthess 2012-11-08 07:29:55 +00:00
parent 07f4e8ed94
commit 25acf389b0
9 changed files with 320 additions and 13 deletions

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@ -31,7 +31,7 @@ const PALConfig pal_default_config =
{
{VAL_PIOA_ODSR, VAL_PIOA_OSR, VAL_PIOA_PUSR},
#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
(SAM7_PLATFORM == SAM7X512)
(SAM7_PLATFORM == SAM7X512) || (SAM7_PLATFORM == SAM7A3)
{VAL_PIOB_ODSR, VAL_PIOB_OSR, VAL_PIOB_PUSR}
#endif
};

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@ -31,7 +31,7 @@ const PALConfig pal_default_config =
{
{VAL_PIOA_ODSR, VAL_PIOA_OSR, VAL_PIOA_PUSR},
#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
(SAM7_PLATFORM == SAM7X512)
(SAM7_PLATFORM == SAM7X512) || (SAM7_PLATFORM == SAM7A3)
{VAL_PIOB_ODSR, VAL_PIOB_OSR, VAL_PIOB_PUSR}
#endif
};

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@ -0,0 +1,113 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
{VAL_PIOA_ODSR, VAL_PIOA_OSR, VAL_PIOA_PUSR},
#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
(SAM7_PLATFORM == SAM7X512) || (SAM7_PLATFORM == SAM7A3)
{VAL_PIOB_ODSR, VAL_PIOB_OSR, VAL_PIOB_PUSR}
#endif
};
#endif
/*
* SYS IRQ handling here.
*/
static CH_IRQ_HANDLER(SYSIrqHandler) {
CH_IRQ_PROLOGUE();
if (AT91C_BASE_PITC->PITC_PISR & AT91C_PITC_PITS) {
(void) AT91C_BASE_PITC->PITC_PIVR;
chSysLockFromIsr();
chSysTimerHandlerI();
chSysUnlockFromIsr();
}
#if USE_SAM7_DBGU_UART
if (AT91C_BASE_DBGU->DBGU_CSR &
(AT91C_US_RXRDY | AT91C_US_TXRDY | AT91C_US_PARE | AT91C_US_FRAME | AT91C_US_OVRE | AT91C_US_RXBRK)) {
sd_lld_serve_interrupt(&SDDBG);
}
#endif
AT91C_BASE_AIC->AIC_EOICR = 0;
CH_IRQ_EPILOGUE();
}
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
/* Watchdog disabled.*/
AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
at91sam7_clock_init();
}
#if HAL_USE_MMC_SPI
/* Board-related functions related to the MMC_SPI driver.*/
bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
return !palReadPad(IOPORT2, PIOB_MMC_CP);
}
bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
return palReadPad(IOPORT2, PIOB_MMC_WP);
}
#endif
/*
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* PIT Initialization.
*/
AIC_ConfigureIT(AT91C_ID_SYS,
AT91C_AIC_SRCTYPE_HIGH_LEVEL | (AT91C_AIC_PRIOR_HIGHEST - 1),
SYSIrqHandler);
AIC_EnableIT(AT91C_ID_SYS);
AT91C_BASE_PITC->PITC_PIMR = (MCK / 16 / CH_FREQUENCY) - 1;
AT91C_BASE_PITC->PITC_PIMR |= AT91C_PITC_PITEN | AT91C_PITC_PITIEN;
/*
* RTS/CTS pins enabled for USART0 only.
*/
AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_RTS0 | AT91C_PA4_CTS0;
AT91C_BASE_PIOA->PIO_ASR = AT91C_PIO_PA3 | AT91C_PIO_PA4;
AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PIO_PA3 | AT91C_PIO_PA4;
}

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@ -0,0 +1,97 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* Setup for the Studiel AT91SAM7A3-EK board.
*/
/*
* Board identifier.
*/
#define BOARD_STUDIEL_AT91SAM7A3_EK
#define BOARD_NAME "Studiel AT91SAM7A3-EK eval. board"
/*
* Select your platform by modifying the following line.
*/
#if !defined(SAM7A3_PLATFORM)
#define SAM7_PLATFORM SAM7A3
#endif
#include "at91sam7.h"
#define CLK 18432000
#define MCK 48054857
/*
* I/O definitions.
*/
#define PIOA_RXD0 2
#define PIOA_RXD0_MASK (1 << PIOA_RXD0)
#define PIOA_TXD0 3
#define PIOA_TXD0_MASK (1 << PIOA_TXD0)
#define PIOA_LED1 20
#define PIOA_LED1_MASK (1 << PIOA_LED1)
#define PIOA_LED2 21
#define PIOA_LED2_MASK (1 << PIOA_LED2)
#define PIOA_LED3 24
#define PIOA_LED3_MASK (1 << PIOA_LED3)
#define PIOA_LED4 25
#define PIOA_LED4_MASK (1 << PIOA_LED4)
// mmc-spi
#define PIOA_SPI0_NSS 14
#define PIOA_SPI0_NSS_MASK (1 << PIOA_SPI0_NSS)
#define PIOA_SPI0_MISO 15
#define PIOA_SPI0_MISO_MASK (1 << PIOA_SPI0_MISO)
#define PIOA_SPI0_MOSI 16
#define PIOA_SPI0_MOSI_MASK (1 << PIOA_SPI0_MOSI)
#define PIOA_SPI0_CLK 17
#define PIOA_SPI0_CLK_MASK (1 << PIOA_SPI0_CLK)
/*
* Initial I/O setup.
*/
/* Output data. */
#define VAL_PIOA_ODSR 0x00000000
/* Direction. */
#define VAL_PIOA_OSR 0x00000000 | PIOA_LED1_MASK | PIOA_LED2_MASK | \
PIOA_LED3_MASK | PIOA_LED4_MASK
/* Pull-up. */
#define VAL_PIOA_PUSR 0xFFFFFFFF
#define VAL_PIOB_ODSR 0x00000000 /* Output data. */
#define VAL_PIOB_OSR 0x00000000 /* Direction. */
#define VAL_PIOB_PUSR 0xFFFFFFFF /* Pull-up. */
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* _BOARD_H_ */

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@ -31,6 +31,7 @@
#define SAM7X128 4
#define SAM7X256 5
#define SAM7X512 6
#define SAM7A3 7
#ifndef SAM7_PLATFORM
#error "SAM7 platform not defined"
@ -50,6 +51,8 @@
#include "at91lib/AT91SAM7X256.h"
#elif SAM7_PLATFORM == SAM7X512
#include "at91lib/AT91SAM7X512.h"
#elif SAM7_PLATFORM == SAM7A3
#include "at91lib/AT91SAM7A3.h"
#else
#error "SAM7 platform not supported"
#endif

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@ -63,7 +63,7 @@ void _pal_lld_init(const PALConfig *config) {
uint32_t ports = (1 << AT91C_ID_PIOA);
#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
(SAM7_PLATFORM == SAM7X512)
(SAM7_PLATFORM == SAM7X512) || (SAM7_PLATFORM == SAM7A3)
ports |= (1 << AT91C_ID_PIOB);
#endif
AT91C_BASE_PMC->PMC_PCER = ports;
@ -87,7 +87,7 @@ void _pal_lld_init(const PALConfig *config) {
* PIOB setup.
*/
#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
(SAM7_PLATFORM == SAM7X512)
(SAM7_PLATFORM == SAM7X512) || (SAM7_PLATFORM == SAM7A3)
AT91C_BASE_PIOB->PIO_PPUER = config->P1Data.pusr; /* Pull-up as spec.*/
AT91C_BASE_PIOB->PIO_PPUDR = ~config->P1Data.pusr;
AT91C_BASE_PIOB->PIO_PER = 0xFFFFFFFF; /* PIO enabled.*/

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@ -64,7 +64,8 @@ typedef struct {
/** @brief Port 0 setup data.*/
at91sam7_pio_setup_t P0Data;
#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
(SAM7_PLATFORM == SAM7X512) || defined(__DOXYGEN__)
(SAM7_PLATFORM == SAM7X512) || (SAM7_PLATFORM == SAM7A3) || \
defined(__DOXYGEN__)
/** @brief Port 1 setup data.*/
at91sam7_pio_setup_t P1Data;
#endif
@ -112,7 +113,8 @@ typedef AT91PS_PIO ioportid_t;
* @brief PIO port B identifier.
*/
#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
(SAM7_PLATFORM == SAM7X512) || defined(__DOXYGEN__)
(SAM7_PLATFORM == SAM7X512) || (SAM7_PLATFORM == SAM7A3) || \
defined(__DOXYGEN__)
#define IOPORT2 AT91C_BASE_PIOB
#endif

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@ -51,9 +51,19 @@
#define SAM7_DBGU_RX AT91C_PA27_DRXD
#define SAM7_DBGU_TX AT91C_PA28_DTXD
#elif (SAM7_PLATFORM == SAM7A3)
#define SAM7_USART0_RX AT91C_PA2_RXD0
#define SAM7_USART0_TX AT91C_PA3_TXD0
#define SAM7_USART1_RX AT91C_PA7_RXD1
#define SAM7_USART1_TX AT91C_PA8_TXD1
#define SAM7_USART2_RX AT91C_PA9_RXD2
#define SAM7_USART2_TX AT91C_PA10_TXD2
#define SAM7_DBGU_RX AT91C_PA30_DRXD
#define SAM7_DBGU_TX AT91C_PA31_DTXD
#else
#error "serial lines not defined for this SAM7 version"
#endif
#endif /* HAL_USE_SERIAL */
/*===========================================================================*/
/* Driver exported variables. */
@ -68,10 +78,17 @@ SerialDriver SD1;
/** @brief USART1 serial driver identifier.*/
SerialDriver SD2;
#endif
#if (SAM7_PLATFORM == SAM7A3)
#if USE_SAM7_USART2 || defined(__DOXYGEN__)
/** @brief USART2 serial driver identifier.*/
SerialDriver SD3;
#endif
#endif
#if USE_SAM7_DBGU_UART || defined(__DOXYGEN__)
/** @brief DBGU_UART serial driver identifier.*/
SerialDriver SD3;
SerialDriver SDDBG;
#endif
/*===========================================================================*/
@ -212,9 +229,19 @@ static void notify2(GenericQueue *qp) {
}
#endif
#if USE_SAM7_DBGU_UART || defined(__DOXYGEN__)
#if (SAM7_PLATFORM == SAM7A3)
#if USE_SAM7_USART2 || defined(__DOXYGEN__)
static void notify3(GenericQueue *qp) {
(void)qp;
AT91C_BASE_US2->US_IER = AT91C_US_TXRDY;
}
#endif
#endif /* (SAM7_PLATFORM == SAM7A3) */
#if USE_SAM7_DBGU_UART || defined(__DOXYGEN__)
static void notify_dbg(GenericQueue *qp) {
(void)qp;
AT91C_BASE_DBGU->DBGU_IER = AT91C_US_TXRDY;
}
@ -254,6 +281,23 @@ CH_IRQ_HANDLER(USART1IrqHandler) {
}
#endif
#if (SAM7_PLATFORM == SAM7A3)
#if USE_SAM7_USART2 || defined(__DOXYGEN__)
/**
* @brief USART2 interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(USART2IrqHandler) {
CH_IRQ_PROLOGUE();
sd_lld_serve_interrupt(&SD3);
AT91C_BASE_AIC->AIC_EOICR = 0;
CH_IRQ_EPILOGUE();
}
#endif
#endif /* (SAM7_PLATFORM == SAM7A3) */
/* note - DBGU_UART IRQ is the SysIrq in board.c
since it's not vectored separately by the AIC.*/
@ -290,12 +334,25 @@ void sd_lld_init(void) {
USART1IrqHandler);
#endif
#if USE_SAM7_DBGU_UART
#if (SAM7_PLATFORM == SAM7A3)
#if USE_SAM7_USART2
sdObjectInit(&SD3, NULL, notify3);
SD3.usart = AT91C_BASE_US2;
AT91C_BASE_PIOA->PIO_PDR = SAM7_USART2_RX | SAM7_USART2_TX;
AT91C_BASE_PIOA->PIO_ASR = SAM7_USART2_RX | SAM7_USART2_TX;
AT91C_BASE_PIOA->PIO_PPUDR = SAM7_USART2_RX | SAM7_USART2_TX;
AIC_ConfigureIT(AT91C_ID_US2,
AT91C_AIC_SRCTYPE_HIGH_LEVEL | SAM7_USART2_PRIORITY,
USART2IrqHandler);
#endif
#endif /* (SAM7_PLATFORM == SAM7A3) */
#if USE_SAM7_DBGU_UART
sdObjectInit(&SDDBG, NULL, notify_dbg);
/* this is a little cheap, but OK for now since there's enough overlap
between dbgu and usart register maps. it means we can reuse all the
same usart interrupt handling and config that already exists.*/
SD3.usart = (AT91PS_USART)AT91C_BASE_DBGU;
SDDBG.usart = (AT91PS_USART)AT91C_BASE_DBGU;
AT91C_BASE_PIOA->PIO_PDR = SAM7_DBGU_RX | SAM7_DBGU_TX;
AT91C_BASE_PIOA->PIO_ASR = SAM7_DBGU_RX | SAM7_DBGU_TX;
AT91C_BASE_PIOA->PIO_PPUDR = SAM7_DBGU_RX | SAM7_DBGU_TX;
@ -334,6 +391,16 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
AIC_EnableIT(AT91C_ID_US1);
}
#endif
#if (SAM7_PLATFORM == SAM7A3)
#if USE_SAM7_USART2
if (&SD3 == sdp) {
/* Starts the clock and clears possible sources of immediate interrupts.*/
AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_US2);
/* Enables associated interrupt vector.*/
AIC_EnableIT(AT91C_ID_US2);
}
#endif
#endif /* (SAM7_PLATFORM == SAM7A3) */
/* Note - no explicit start for SD3 (DBGU_UART) since it's not included
in the AIC or PMC.*/
}
@ -368,7 +435,7 @@ void sd_lld_stop(SerialDriver *sdp) {
}
#endif
#if USE_SAM7_DBGU_UART
if (&SD3 == sdp) {
if (&SDDBG == sdp) {
AT91C_BASE_DBGU->DBGU_IDR = 0xFFFFFFFF;
return;
}

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@ -57,6 +57,17 @@
#define USE_SAM7_USART1 TRUE
#endif
#if (SAM7_PLATFORM == SAM7A3)
/**
* @brief UART2 driver enable switch.
* @details If set to @p TRUE the support for USART3 is included.
* @note The default is @p TRUE.
*/
#if !defined(USE_SAM7_USART2) || defined(__DOXYGEN__)
#define USE_SAM7_USART2 TRUE
#endif
#endif /* (SAM7_PLATFORM == SAM7A3) */
/**
* @brief DBGU UART driver enable switch.
* @details If set to @p TRUE the support for the DBGU UART is included.
@ -80,6 +91,15 @@
#define SAM7_USART1_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 2)
#endif
#if (SAM7_PLATFORM == SAM7A3)
/**
* @brief UART2 interrupt priority level setting.
*/
#if !defined(SAM7_USART2_PRIORITY) || defined(__DOXYGEN__)
#define SAM7_USART2_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 2)
#endif
#endif /* (SAM7_PLATFORM == SAM7A3) */
/**
* @brief DBGU_UART interrupt priority level setting.
*/
@ -146,9 +166,14 @@ extern SerialDriver SD1;
#if USE_SAM7_USART1 && !defined(__DOXYGEN__)
extern SerialDriver SD2;
#endif
#if USE_SAM7_DBGU_UART
#if (SAM7_PLATFORM == SAM7A3)
#if USE_SAM7_USART2 && !defined(__DOXYGEN__)
extern SerialDriver SD3;
#endif
#endif
#if USE_SAM7_DBGU_UART
extern SerialDriver SDDBG;
#endif
#ifdef __cplusplus
extern "C" {