git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6452 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -57,9 +57,9 @@
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_VOS STM32_VOS_HIGH
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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/*
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/*
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* ADC driver system settings.
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* ADC driver system settings.
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_VOS STM32_VOS_HIGH
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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/*
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/*
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* ADC driver system settings.
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* ADC driver system settings.
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_VOS STM32_VOS_HIGH
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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/*
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/*
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* ADC driver system settings.
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* ADC driver system settings.
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_VOS STM32_VOS_HIGH
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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/*
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/*
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* ADC driver system settings.
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* ADC driver system settings.
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_VOS STM32_VOS_HIGH
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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/*
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/*
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* ADC driver system settings.
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* ADC driver system settings.
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_VOS STM32_VOS_HIGH
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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/*
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/*
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* ADC driver system settings.
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* ADC driver system settings.
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_VOS STM32_VOS_HIGH
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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/*
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/*
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* ADC driver system settings.
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* ADC driver system settings.
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_VOS STM32_VOS_HIGH
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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/*
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/*
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* ADC driver system settings.
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* ADC driver system settings.
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_VOS STM32_VOS_HIGH
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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/*
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/*
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* ADC driver system settings.
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* ADC driver system settings.
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_VOS STM32_VOS_HIGH
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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/*
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/*
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* ADC driver system settings.
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* ADC driver system settings.
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_VOS STM32_VOS_HIGH
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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/*
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/*
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* ADC driver system settings.
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* ADC driver system settings.
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_VOS STM32_VOS_HIGH
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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/*
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/*
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* ADC driver system settings.
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* ADC driver system settings.
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_VOS STM32_VOS_HIGH
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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/*
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/*
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* ADC driver system settings.
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* ADC driver system settings.
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_VOS STM32_VOS_HIGH
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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/*
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/*
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* ADC driver system settings.
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* ADC driver system settings.
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_VOS STM32_VOS_HIGH
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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/*
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/*
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* ADC driver system settings.
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* ADC driver system settings.
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_VOS STM32_VOS_HIGH
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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/*
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/*
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* ADC driver system settings.
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* ADC driver system settings.
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