git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6715 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
parent
1bdcf39d7b
commit
27261ab8a6
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@ -1,5 +1,5 @@
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# List of all the ChibiOS/RT HAL files, there is no need to remove the files
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# List of all the ChibiOS/HAL files, there is no need to remove the files
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# from this list, you can disable parts of the kernel by editing halconf.h.
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# from this list, you can disable parts of the HAL by editing halconf.h.
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HALSRC = ${CHIBIOS}/os/hal/src/hal.c \
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HALSRC = ${CHIBIOS}/os/hal/src/hal.c \
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${CHIBIOS}/os/hal/src/hal_queues.c \
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${CHIBIOS}/os/hal/src/hal_queues.c \
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${CHIBIOS}/os/hal/src/hal_mmcsd.c \
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${CHIBIOS}/os/hal/src/hal_mmcsd.c \
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@ -8,6 +8,7 @@ HALSRC = ${CHIBIOS}/os/hal/src/hal.c \
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${CHIBIOS}/os/hal/src/ext.c \
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${CHIBIOS}/os/hal/src/ext.c \
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${CHIBIOS}/os/hal/src/gpt.c \
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${CHIBIOS}/os/hal/src/gpt.c \
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${CHIBIOS}/os/hal/src/i2c.c \
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${CHIBIOS}/os/hal/src/i2c.c \
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${CHIBIOS}/os/hal/src/i2s.c \
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${CHIBIOS}/os/hal/src/icu.c \
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${CHIBIOS}/os/hal/src/icu.c \
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${CHIBIOS}/os/hal/src/mmc_spi.c \
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${CHIBIOS}/os/hal/src/mmc_spi.c \
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${CHIBIOS}/os/hal/src/pal.c \
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${CHIBIOS}/os/hal/src/pal.c \
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@ -51,6 +51,7 @@
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#include "ext.h"
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#include "ext.h"
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#include "gpt.h"
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#include "gpt.h"
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#include "i2c.h"
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#include "i2c.h"
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#include "i2s.h"
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#include "icu.h"
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#include "icu.h"
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//#include "mac.h"
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//#include "mac.h"
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#include "pwm.h"
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#include "pwm.h"
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@ -0,0 +1,175 @@
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/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012,2013 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file i2s.h
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* @brief I2S Driver macros and structures.
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*
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* @addtogroup I2S
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* @{
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*/
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#ifndef _I2S_H_
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#define _I2S_H_
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#if HAL_USE_I2S || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/**
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* @name I2S modes
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* @{
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*/
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#define I2S_MODE_SLAVE 0
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#define I2S_MODE_MASTER 1
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#define I2S_MODE_TX 2
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#define I2S_MODE_RX 4
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#define I2S_MODE_TXRX (I2S_MODE_TX | I2S_MODE_RX)
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#define I2S_MODE_CONTINUOUS 16
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/** @} */
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief Driver state machine possible states.
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*/
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typedef enum {
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I2S_UNINIT = 0, /**< Not initialized. */
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I2S_STOP = 1, /**< Stopped. */
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I2S_READY = 2, /**< Ready. */
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I2S_ACTIVE = 3, /**< Active. */
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I2S_COMPLETE = 4 /**< Transmission complete. */
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} i2sstate_t;
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#include "i2s_lld.h"
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/**
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* @name Macro Functions
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* @{
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*/
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/**
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* @brief Starts a I2S data exchange.
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*
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* @param[in] i2sp pointer to the @p I2SDriver object
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*
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* @iclass
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*/
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#define i2sStartExchangeI(i2sp) { \
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i2s_lld_start_exchange(i2sp); \
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(i2sp)->state = I2S_ACTIVE; \
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}
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/**
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* @brief Stops the ongoing data exchange.
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* @details The ongoing data exchange, if any, is stopped, if the driver
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* was not active the function does nothing.
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*
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* @param[in] i2sp pointer to the @p I2SDriver object
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*
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* @iclass
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*/
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#define i2sStopExchangeI(i2sp) { \
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i2s_lld_stop_exchange(i2sp); \
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(i2sp)->state = I2S_READY; \
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}
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/**
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* @brief Common ISR code, half buffer event.
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* @details This code handles the portable part of the ISR code:
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* - Callback invocation.
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* .
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* @note This macro is meant to be used in the low level drivers
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* implementation only.
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*
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* @param[in] i2sp pointer to the @p I2CDriver object
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*
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* @notapi
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*/
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#define _i2S_isr_half_code(i2sp) { \
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if ((i2sp)->end_cb != NULL) { \
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(i2sp)->end_cb(i2sp, 0, (i2sp)->config->depth / 2); \
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} \
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}
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/**
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* @brief Common ISR code.
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* @details This code handles the portable part of the ISR code:
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* - Callback invocation.
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* - Driver state transitions.
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* .
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* @note This macro is meant to be used in the low level drivers
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* implementation only.
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*
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* @param[in] i2sp pointer to the @p I2CDriver object
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*
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* @notapi
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*/
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#define _i2s_isr_code(i2sp) { \
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if ((i2sp)->config->end_cb) { \
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(i2sp)->state = I2S_COMPLETE; \
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(i2sp)->config->end_cb(i2sp, \
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(i2sp)->config->depth / 2, \
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(i2sp)->config->depth / 2); \
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if ((i2sp)->state == I2S_COMPLETE) \
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(i2sp)->state = I2S_READY; \
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} \
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else \
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(i2sp)->state = I2S_READY; \
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}
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/** @} */
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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void i2sInit(void);
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void i2sObjectInit(I2SDriver *i2sp);
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void i2sStart(I2SDriver *i2sp, const I2SConfig *config);
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void i2sStop(I2SDriver *i2sp);
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void i2sStartExchange(I2SDriver *i2sp);
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void i2sStopExchange(I2SDriver *i2sp);
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_USE_I2S */
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#endif /* _I2S_H_ */
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/** @} */
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@ -15,14 +15,13 @@
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*/
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*/
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/**
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/**
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* @file STM32/i2s_lld.c
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* @file i2s_lld.c
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* @brief I2S Driver subsystem low level driver source template.
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* @brief I2S Driver subsystem low level driver source template.
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*
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*
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* @addtogroup I2S
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* @addtogroup I2S
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* @{
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* @{
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*/
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*/
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#include "ch.h"
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#include "hal.h"
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#include "hal.h"
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#if HAL_USE_I2S || defined(__DOXYGEN__)
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#if HAL_USE_I2S || defined(__DOXYGEN__)
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@ -35,6 +34,16 @@
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/* Driver exported variables. */
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/** @brief I2S2 driver identifier.*/
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#if STM32_I2S_USE_SPI2 || defined(__DOXYGEN__)
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I2SDriver I2SD2;
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#endif
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/** @brief I2S3 driver identifier.*/
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#if STM32_I2S_USE_SPI3 || defined(__DOXYGEN__)
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I2SDriver I2SD3;
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#endif
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables and types. */
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/* Driver local variables and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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@ -43,6 +52,51 @@
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/* Driver local functions. */
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/* Driver local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/**
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* @brief Shared end-of-rx service routine.
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*
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* @param[in] i2sp pointer to the @p I2SDriver object
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* @param[in] flags pre-shifted content of the ISR register
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*/
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static void i2s_lld_serve_rx_interrupt(I2SDriver *i2sp, uint32_t flags) {
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/* DMA errors handling.*/
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#if defined(STM32_I2S_DMA_ERROR_HOOK)
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if ((flags & (STM32_DMA_ISR_TEIF | STM32_DMA_ISR_DMEIF)) != 0) {
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STM32_I2S_DMA_ERROR_HOOK(i2sp);
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}
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#else
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(void)flags;
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#endif
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/* Stop everything.*/
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dmaStreamDisable(i2sp->dmatx);
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dmaStreamDisable(i2sp->dmarx);
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/* Portable I2S ISR code defined in the high level driver, note, it is
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a macro.*/
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_i2s_isr_code(i2sp);
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}
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/**
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* @brief Shared end-of-tx service routine.
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*
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* @param[in] i2sp pointer to the @p I2SDriver object
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* @param[in] flags pre-shifted content of the ISR register
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*/
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static void i2s_lld_serve_tx_interrupt(I2SDriver *i2sp, uint32_t flags) {
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/* DMA errors handling.*/
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#if defined(STM32_I2S_DMA_ERROR_HOOK)
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(void)i2sp;
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if ((flags & (STM32_DMA_ISR_TEIF | STM32_DMA_ISR_DMEIF)) != 0) {
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STM32_I2S_DMA_ERROR_HOOK(i2sp);
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}
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#else
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(void)flags;
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#endif
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}
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|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
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||||||
/* Driver interrupt handlers. */
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/* Driver interrupt handlers. */
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||||||
/*===========================================================================*/
|
/*===========================================================================*/
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||||||
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@ -58,13 +112,13 @@
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*/
|
*/
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||||||
void i2s_lld_init(void) {
|
void i2s_lld_init(void) {
|
||||||
|
|
||||||
#if STM32_I2S_USE_I2S2
|
#if STM32_I2S_USE_SPI2
|
||||||
spiObjectInit(&I2SD2);
|
i2sObjectInit(&I2SD2);
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I2SD2.spi = SPI2;
|
I2SD2.spi = SPI2;
|
||||||
#endif
|
#endif
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|
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#if STM32_I2S_USE_I2S3
|
#if STM32_I2S_USE_SPI3
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spiObjectInit(&I2SD3);
|
i2sObjectInit(&I2SD3);
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I2SD3.spi = SPI3;
|
I2SD3.spi = SPI3;
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||||||
#endif
|
#endif
|
||||||
}
|
}
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|
@ -80,25 +134,35 @@ void i2s_lld_start(I2SDriver *i2sp) {
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||||||
|
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||||||
/* If in stopped state then enables the SPI and DMA clocks.*/
|
/* If in stopped state then enables the SPI and DMA clocks.*/
|
||||||
if (i2sp->state == I2S_STOP) {
|
if (i2sp->state == I2S_STOP) {
|
||||||
#if STM32_SPI_USE_SPI2
|
#if STM32_I2S_USE_SPI2
|
||||||
if (&SPID2 == spip) {
|
if (&I2SD2 == i2sp) {
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||||||
bool_t b;
|
bool b;
|
||||||
b = dmaStreamAllocate(spip->dma,
|
b = dmaStreamAllocate(i2sp->dmarx,
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STM32_I2S_I2S2_IRQ_PRIORITY,
|
STM32_I2S_SPI2_IRQ_PRIORITY,
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||||||
(stm32_dmaisr_t)i2s_lld_serve_rx_interrupt,
|
(stm32_dmaisr_t)i2s_lld_serve_rx_interrupt,
|
||||||
(void *)spip);
|
(void *)i2sp);
|
||||||
chDbgAssert(!b, "spi_lld_start(), #1", "stream already allocated");
|
osalDbgAssert(!b, "stream already allocated");
|
||||||
|
b = dmaStreamAllocate(i2sp->dmatx,
|
||||||
|
STM32_I2S_SPI2_IRQ_PRIORITY,
|
||||||
|
(stm32_dmaisr_t)i2s_lld_serve_tx_interrupt,
|
||||||
|
(void *)i2sp);
|
||||||
|
osalDbgAssert(!b, "stream already allocated");
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rccEnableSPI2(FALSE);
|
rccEnableSPI2(FALSE);
|
||||||
}
|
}
|
||||||
#endif
|
#endif
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||||||
#if STM32_SPI_USE_SPI3
|
#if STM32_I2S_USE_SPI3
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||||||
if (&SPID3 == spip) {
|
if (&I2SD3 == i2sp) {
|
||||||
bool_t b;
|
bool b;
|
||||||
b = dmaStreamAllocate(spip->dma,
|
b = dmaStreamAllocate(i2sp->dmarx,
|
||||||
STM32_I2S_I2S3_IRQ_PRIORITY,
|
STM32_I2S_SPI3_IRQ_PRIORITY,
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(stm32_dmaisr_t)i2s_lld_serve_rx_interrupt,
|
(stm32_dmaisr_t)i2s_lld_serve_rx_interrupt,
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||||||
(void *)spip);
|
(void *)i2sp);
|
||||||
chDbgAssert(!b, "spi_lld_start(), #2", "stream already allocated");
|
osalDbgAssert(!b, "stream already allocated");
|
||||||
|
b = dmaStreamAllocate(i2sp->dmatx,
|
||||||
|
STM32_I2S_SPI3_IRQ_PRIORITY,
|
||||||
|
(stm32_dmaisr_t)i2s_lld_serve_tx_interrupt,
|
||||||
|
(void *)i2sp);
|
||||||
|
osalDbgAssert(!b, "stream already allocated");
|
||||||
rccEnableSPI3(FALSE);
|
rccEnableSPI3(FALSE);
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
@ -115,9 +179,23 @@ void i2s_lld_start(I2SDriver *i2sp) {
|
||||||
*/
|
*/
|
||||||
void i2s_lld_stop(I2SDriver *i2sp) {
|
void i2s_lld_stop(I2SDriver *i2sp) {
|
||||||
|
|
||||||
|
/* If in ready state then disables the SPI clock.*/
|
||||||
if (i2sp->state == I2S_READY) {
|
if (i2sp->state == I2S_READY) {
|
||||||
/* Clock deactivation.*/
|
|
||||||
|
|
||||||
|
/* SPI disable.*/
|
||||||
|
i2sp->spi->CR1 = 0;
|
||||||
|
i2sp->spi->CR2 = 0;
|
||||||
|
dmaStreamRelease(i2sp->dmarx);
|
||||||
|
dmaStreamRelease(i2sp->dmatx);
|
||||||
|
|
||||||
|
#if STM32_I2S_USE_SPI2
|
||||||
|
if (&I2SD2 == i2sp)
|
||||||
|
rccDisableSPI2(FALSE);
|
||||||
|
#endif
|
||||||
|
#if STM32_I2S_USE_SPI3
|
||||||
|
if (&I2SD3 == i2sp)
|
||||||
|
rccDisableSPI3(FALSE);
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -132,17 +210,6 @@ void i2s_lld_start_exchange(I2SDriver *i2sp) {
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Starts a I2S data exchange in continuous mode.
|
|
||||||
*
|
|
||||||
* @param[in] i2sp pointer to the @p I2SDriver object
|
|
||||||
*
|
|
||||||
* @notapi
|
|
||||||
*/
|
|
||||||
void i2s_lld_start_exchange_continuous(I2SDriver *i2sp) {
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Stops the ongoing data exchange.
|
* @brief Stops the ongoing data exchange.
|
||||||
* @details The ongoing data exchange, if any, is stopped, if the driver
|
* @details The ongoing data exchange, if any, is stopped, if the driver
|
|
@ -15,7 +15,7 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @file STM32/i2s_lld.h
|
* @file i2s_lld.h
|
||||||
* @brief I2S Driver subsystem low level driver header template.
|
* @brief I2S Driver subsystem low level driver header template.
|
||||||
*
|
*
|
||||||
* @addtogroup I2S
|
* @addtogroup I2S
|
||||||
|
@ -44,8 +44,8 @@
|
||||||
* @details If set to @p TRUE the support for I2S2 is included.
|
* @details If set to @p TRUE the support for I2S2 is included.
|
||||||
* @note The default is @p TRUE.
|
* @note The default is @p TRUE.
|
||||||
*/
|
*/
|
||||||
#if !defined(STM32_I2S_USE_I2S2) || defined(__DOXYGEN__)
|
#if !defined(STM32_I2S_USE_SPI2) || defined(__DOXYGEN__)
|
||||||
#define STM32_I2S_USE_I2S2 FALSE
|
#define STM32_I2S_USE_SPI2 FALSE
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -53,127 +53,121 @@
|
||||||
* @details If set to @p TRUE the support for I2S3 is included.
|
* @details If set to @p TRUE the support for I2S3 is included.
|
||||||
* @note The default is @p TRUE.
|
* @note The default is @p TRUE.
|
||||||
*/
|
*/
|
||||||
#if !defined(STM32_I2S_USE_I2S3) || defined(__DOXYGEN__)
|
#if !defined(STM32_I2S_USE_SPI3) || defined(__DOXYGEN__)
|
||||||
#define STM32_I2S_USE_I2S3 FALSE
|
#define STM32_I2S_USE_SPI3 FALSE
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief I2S2 interrupt priority level setting.
|
* @brief I2S2 interrupt priority level setting.
|
||||||
*/
|
*/
|
||||||
#if !defined(STM32_I2S_I2S2_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
#if !defined(STM32_I2S_SPI2_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
||||||
#define STM32_I2S_I2S2_IRQ_PRIORITY 10
|
#define STM32_I2S_SPI2_IRQ_PRIORITY 10
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief I2S3 interrupt priority level setting.
|
* @brief I2S3 interrupt priority level setting.
|
||||||
*/
|
*/
|
||||||
#if !defined(STM32_I2S_I2S3_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
#if !defined(STM32_I2S_SPI3_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
||||||
#define STM32_I2S_I2S3_IRQ_PRIORITY 10
|
#define STM32_I2S_SPI3_IRQ_PRIORITY 10
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief I2S2 DMA priority (0..3|lowest..highest).
|
* @brief I2S2 DMA priority (0..3|lowest..highest).
|
||||||
*/
|
*/
|
||||||
#if !defined(STM32_I2S_I2S2_DMA_PRIORITY) || defined(__DOXYGEN__)
|
#if !defined(STM32_I2S_SPI2_DMA_PRIORITY) || defined(__DOXYGEN__)
|
||||||
#define STM32_I2S_I2S2_DMA_PRIORITY 1
|
#define STM32_I2S_SPI2_DMA_PRIORITY 1
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief I2S3 DMA priority (0..3|lowest..highest).
|
* @brief I2S3 DMA priority (0..3|lowest..highest).
|
||||||
*/
|
*/
|
||||||
#if !defined(STM32_I2S_I2S2_DMA_PRIORITY) || defined(__DOXYGEN__)
|
#if !defined(STM32_I2S_SPI3_DMA_PRIORITY) || defined(__DOXYGEN__)
|
||||||
#define STM32_I2S_I2S2_DMA_PRIORITY 1
|
#define STM32_I2S_SPI3_DMA_PRIORITY 1
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief I2S DMA error hook.
|
* @brief I2S DMA error hook.
|
||||||
*/
|
*/
|
||||||
#if !defined(STM32_I2S_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
|
#if !defined(STM32_I2S_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
|
||||||
#define STM32_I2S_DMA_ERROR_HOOK(i2sp) chSysHalt()
|
#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure")
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if STM32_ADVANCED_DMA || defined(__DOXYGEN__)
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief DMA stream used for I2S2 RX operations.
|
|
||||||
* @note This option is only available on platforms with enhanced DMA.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_I2S_I2S2_RX_DMA_STREAM) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_I2S_I2S2_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief DMA stream used for I2S2 TX operations.
|
|
||||||
* @note This option is only available on platforms with enhanced DMA.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_I2S_I2S2_TX_DMA_STREAM) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_I2S_I2S2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief DMA stream used for I2S3 RX operations.
|
|
||||||
* @note This option is only available on platforms with enhanced DMA.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_I2S_I2S3_RX_DMA_STREAM) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_I2S_I2S3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief DMA stream used for I2S3 TX operations.
|
|
||||||
* @note This option is only available on platforms with enhanced DMA.
|
|
||||||
*/
|
|
||||||
#if !defined(STM32_I2S_I2S3_TX_DMA_STREAM) || defined(__DOXYGEN__)
|
|
||||||
#define STM32_I2S_I2S3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#else /* !STM32_ADVANCED_DMA */
|
|
||||||
|
|
||||||
/* Fixed streams for platforms using the old DMA peripheral, the values are
|
|
||||||
valid for both STM32F1xx and STM32L1xx.*/
|
|
||||||
#define STM32_I2S_I2S2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
|
||||||
#define STM32_I2S_I2S2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
|
|
||||||
#define STM32_I2S_I2S3_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
|
|
||||||
#define STM32_I2S_I2S3_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
|
|
||||||
|
|
||||||
#endif /* !STM32_ADVANCED_DMA */
|
|
||||||
/** @} */
|
/** @} */
|
||||||
|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
/* Derived constants and error checks. */
|
/* Derived constants and error checks. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
|
||||||
#if STM32_I2S_USE_I2S2 && !STM32_HAS_SPI2
|
#if STM32_I2S_USE_SPI2 && !STM32_HAS_SPI2
|
||||||
#error "SPI2 not present in the selected device"
|
#error "SPI2 not present in the selected device"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if STM32_I2S_USE_I2S3 && !STM32_HAS_SPI3
|
#if STM32_I2S_USE_SPI3 && !STM32_HAS_SPI3
|
||||||
#error "SPI3 not present in the selected device"
|
#error "SPI3 not present in the selected device"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if !STM32_I2S_USE_I2S2 && !STM32_I2S_USE_I2S3
|
#if !STM32_I2S_USE_SPI2 && !STM32_I2S_USE_SPI3
|
||||||
#error "I2S driver activated but no I2S peripheral assigned"
|
#error "I2S driver activated but no SPI peripheral assigned"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if STM32_I2S_USE_I2S2 && \
|
|
||||||
!STM32_DMA_IS_VALID_ID(STM32_I2S_I2S2_RX_DMA_STREAM, STM32_SPI2_RX_DMA_MSK)
|
#if STM32_I2S_USE_SPI2 && \
|
||||||
#error "invalid DMA stream associated to I2S2 RX"
|
!CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_I2S_SPI2_IRQ_PRIORITY)
|
||||||
|
#error "Invalid IRQ priority assigned to SPI2"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if STM32_I2S_USE_I2S2 && \
|
#if STM32_I2S_USE_SPI3 && \
|
||||||
!STM32_DMA_IS_VALID_ID(STM32_I2S_I2S2_TX_DMA_STREAM, STM32_SPI2_TX_DMA_MSK)
|
!CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_I2S_SPI3_IRQ_PRIORITY)
|
||||||
#error "invalid DMA stream associated to I2S2 TX"
|
#error "Invalid IRQ priority assigned to SPI3"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if STM32_I2S_USE_I2S3 && \
|
|
||||||
!STM32_DMA_IS_VALID_ID(STM32_I2S_I2S3_RX_DMA_STREAM, STM32_SPI3_RX_DMA_MSK)
|
#if STM32_I2S_USE_SPI2 && \
|
||||||
#error "invalid DMA stream associated to I2S3 RX"
|
!STM32_DMA_IS_VALID_PRIORITY(STM32_I2S_SPI2_DMA_PRIORITY)
|
||||||
|
#error "Invalid DMA priority assigned to SPI2"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if STM32_I2S_USE_I2S3 && \
|
#if STM32_I2S_USE_SPI3 && \
|
||||||
!STM32_DMA_IS_VALID_ID(STM32_I2S_I2S3_TX_DMA_STREAM, STM32_SPI3_TX_DMA_MSK)
|
!STM32_DMA_IS_VALID_PRIORITY(STM32_I2S_SPI3_DMA_PRIORITY)
|
||||||
#error "invalid DMA stream associated to I2S3 TX"
|
#error "Invalid DMA priority assigned to SPI3"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
/* The following checks are only required when there is a DMA able to
|
||||||
|
reassign streams to different channels.*/
|
||||||
|
#if STM32_ADVANCED_DMA
|
||||||
|
/* Check on the presence of the DMA streams settings in mcuconf.h.*/
|
||||||
|
#if STM32_I2S_USE_SPI2 && (!defined(STM32_I2S_SPI2_RX_DMA_STREAM) || \
|
||||||
|
!defined(STM32_I2S_SPI2_TX_DMA_STREAM))
|
||||||
|
#error "SPI2 DMA streams not defined"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_I2S_USE_SPI3 && (!defined(STM32_I2S_SPI3_RX_DMA_STREAM) || \
|
||||||
|
!defined(STM32_I2S_SPI3_TX_DMA_STREAM))
|
||||||
|
#error "SPI3 DMA streams not defined"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Check on the validity of the assigned DMA channels.*/
|
||||||
|
#if STM32_I2S_USE_SPI2 && \
|
||||||
|
!STM32_DMA_IS_VALID_ID(STM32_I2S_SPI2_RX_DMA_STREAM, STM32_SPI2_RX_DMA_MSK)
|
||||||
|
#error "invalid DMA stream associated to SPI2 RX"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_I2S_USE_SPI2 && \
|
||||||
|
!STM32_DMA_IS_VALID_ID(STM32_I2S_SPI2_TX_DMA_STREAM, STM32_SPI2_TX_DMA_MSK)
|
||||||
|
#error "invalid DMA stream associated to SPI2 TX"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_I2S_USE_SPI3 && \
|
||||||
|
!STM32_DMA_IS_VALID_ID(STM32_I2S_SPI3_RX_DMA_STREAM, STM32_SPI3_RX_DMA_MSK)
|
||||||
|
#error "invalid DMA stream associated to SPI3 RX"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_I2S_USE_SPI3 && \
|
||||||
|
!STM32_DMA_IS_VALID_ID(STM32_I2S_SPI3_TX_DMA_STREAM, STM32_SPI3_TX_DMA_MSK)
|
||||||
|
#error "invalid DMA stream associated to SPI3 TX"
|
||||||
|
#endif
|
||||||
|
#endif /* STM32_ADVANCED_DMA */
|
||||||
|
|
||||||
#if !defined(STM32_DMA_REQUIRED)
|
#if !defined(STM32_DMA_REQUIRED)
|
||||||
#define STM32_DMA_REQUIRED
|
#define STM32_DMA_REQUIRED
|
||||||
#endif
|
#endif
|
||||||
|
@ -196,10 +190,10 @@ typedef struct I2SDriver I2SDriver;
|
||||||
* @brief I2S notification callback type.
|
* @brief I2S notification callback type.
|
||||||
*
|
*
|
||||||
* @param[in] i2sp pointer to the @p I2SDriver object
|
* @param[in] i2sp pointer to the @p I2SDriver object
|
||||||
* @param[in] buffer pointer to the buffer
|
* @param[in] offset offset in buffers of the data to read/write
|
||||||
* @param[in] n number of sample positions starting from @p buffer
|
* @param[in] n number of samples to read/write
|
||||||
*/
|
*/
|
||||||
typedef void (*i2scallback_t)(I2SDriver *i2sp, void *buffer, size_t n);
|
typedef void (*i2scallback_t)(I2SDriver *i2sp, size_t offset, size_t n);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Driver configuration structure.
|
* @brief Driver configuration structure.
|
||||||
|
@ -212,28 +206,22 @@ typedef struct {
|
||||||
i2smode_t mode;
|
i2smode_t mode;
|
||||||
/**
|
/**
|
||||||
* @brief Transmission buffer pointer.
|
* @brief Transmission buffer pointer.
|
||||||
|
* @note Can be @p NULL if TX is not required.
|
||||||
*/
|
*/
|
||||||
const void *tx_buffer;
|
const void *tx_buffer;
|
||||||
/**
|
|
||||||
* @brief Transmission buffer size in number of samples.
|
|
||||||
*/
|
|
||||||
size_t tx_size;
|
|
||||||
/**
|
|
||||||
* @brief Callback function associated to the transmission or @p NULL.
|
|
||||||
*/
|
|
||||||
i2scallback_t tx_cb;
|
|
||||||
/**
|
/**
|
||||||
* @brief Receive buffer pointer.
|
* @brief Receive buffer pointer.
|
||||||
|
* @note Can be @p NULL if RX is not required.
|
||||||
*/
|
*/
|
||||||
void *rx_buffer;
|
void *rx_buffer;
|
||||||
/**
|
/**
|
||||||
* @brief Receive buffer size in number of samples.
|
* @brief TX and RX buffers size in number of samples.
|
||||||
*/
|
*/
|
||||||
size_t rx_size;
|
size_t depth;
|
||||||
/**
|
/**
|
||||||
* @brief Callback function associated to the reception or @p NULL.
|
* @brief Callback function called during streaming.
|
||||||
*/
|
*/
|
||||||
i2scallback_t rx_cb;;
|
i2scallback_t end_cb;
|
||||||
/* End of the mandatory fields.*/
|
/* End of the mandatory fields.*/
|
||||||
/**
|
/**
|
||||||
* @brief Configuration of the I2SCFGR register.
|
* @brief Configuration of the I2SCFGR register.
|
||||||
|
@ -272,13 +260,21 @@ struct I2SDriver {
|
||||||
*/
|
*/
|
||||||
SPI_TypeDef *spi;
|
SPI_TypeDef *spi;
|
||||||
/**
|
/**
|
||||||
* @brief DMA stream.
|
* @brief Receive DMA stream.
|
||||||
*/
|
*/
|
||||||
const stm32_dma_stream_t *dma;
|
const stm32_dma_stream_t *dmarx;
|
||||||
/**
|
/**
|
||||||
* @brief DMA mode bit mask.
|
* @brief Transmit DMA stream.
|
||||||
*/
|
*/
|
||||||
uint32_t dmamode;
|
const stm32_dma_stream_t *dmatx;
|
||||||
|
/**
|
||||||
|
* @brief RX DMA mode bit mask.
|
||||||
|
*/
|
||||||
|
uint32_t rxdmamode;
|
||||||
|
/**
|
||||||
|
* @brief TX DMA mode bit mask.
|
||||||
|
*/
|
||||||
|
uint32_t txdmamode;
|
||||||
};
|
};
|
||||||
|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
@ -289,12 +285,12 @@ struct I2SDriver {
|
||||||
/* External declarations. */
|
/* External declarations. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
|
||||||
#if STM32_I2S_USE_I2S2 && !defined(__DOXYGEN__)
|
#if STM32_I2S_USE_SPI2 && !defined(__DOXYGEN__)
|
||||||
extern I2SDriver I2SD2;
|
extern I2SDriver I2SD2;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if STM32_I2S_USE_I2S3 && !defined(__DOXYGEN__)
|
#if STM32_I2S_USE_I2S3 && !defined(__DOXYGEN__)
|
||||||
extern I2SDriver I2SD3;
|
extern I2SDriver SPI3;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
|
@ -304,7 +300,6 @@ extern "C" {
|
||||||
void i2s_lld_start(I2SDriver *i2sp);
|
void i2s_lld_start(I2SDriver *i2sp);
|
||||||
void i2s_lld_stop(I2SDriver *i2sp);
|
void i2s_lld_stop(I2SDriver *i2sp);
|
||||||
void i2s_lld_start_exchange(I2SDriver *i2sp);
|
void i2s_lld_start_exchange(I2SDriver *i2sp);
|
||||||
void i2s_lld_start_exchange_continuous(I2SDriver *i2sp);
|
|
||||||
void i2s_lld_stop_exchange(I2SDriver *i2sp);
|
void i2s_lld_stop_exchange(I2SDriver *i2sp);
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
|
@ -42,7 +42,7 @@
|
||||||
/**
|
/**
|
||||||
* @brief SPI1 driver enable switch.
|
* @brief SPI1 driver enable switch.
|
||||||
* @details If set to @p TRUE the support for SPI1 is included.
|
* @details If set to @p TRUE the support for SPI1 is included.
|
||||||
* @note The default is @p TRUE.
|
* @note The default is @p FALSE.
|
||||||
*/
|
*/
|
||||||
#if !defined(STM32_SPI_USE_SPI1) || defined(__DOXYGEN__)
|
#if !defined(STM32_SPI_USE_SPI1) || defined(__DOXYGEN__)
|
||||||
#define STM32_SPI_USE_SPI1 FALSE
|
#define STM32_SPI_USE_SPI1 FALSE
|
||||||
|
@ -51,7 +51,7 @@
|
||||||
/**
|
/**
|
||||||
* @brief SPI2 driver enable switch.
|
* @brief SPI2 driver enable switch.
|
||||||
* @details If set to @p TRUE the support for SPI2 is included.
|
* @details If set to @p TRUE the support for SPI2 is included.
|
||||||
* @note The default is @p TRUE.
|
* @note The default is @p FALSE.
|
||||||
*/
|
*/
|
||||||
#if !defined(STM32_SPI_USE_SPI2) || defined(__DOXYGEN__)
|
#if !defined(STM32_SPI_USE_SPI2) || defined(__DOXYGEN__)
|
||||||
#define STM32_SPI_USE_SPI2 FALSE
|
#define STM32_SPI_USE_SPI2 FALSE
|
||||||
|
@ -60,7 +60,7 @@
|
||||||
/**
|
/**
|
||||||
* @brief SPI3 driver enable switch.
|
* @brief SPI3 driver enable switch.
|
||||||
* @details If set to @p TRUE the support for SPI3 is included.
|
* @details If set to @p TRUE the support for SPI3 is included.
|
||||||
* @note The default is @p TRUE.
|
* @note The default is @p FALSE.
|
||||||
*/
|
*/
|
||||||
#if !defined(STM32_SPI_USE_SPI3) || defined(__DOXYGEN__)
|
#if !defined(STM32_SPI_USE_SPI3) || defined(__DOXYGEN__)
|
||||||
#define STM32_SPI_USE_SPI3 FALSE
|
#define STM32_SPI_USE_SPI3 FALSE
|
||||||
|
@ -69,7 +69,7 @@
|
||||||
/**
|
/**
|
||||||
* @brief SPI4 driver enable switch.
|
* @brief SPI4 driver enable switch.
|
||||||
* @details If set to @p TRUE the support for SPI4 is included.
|
* @details If set to @p TRUE the support for SPI4 is included.
|
||||||
* @note The default is @p TRUE.
|
* @note The default is @p FALSE.
|
||||||
*/
|
*/
|
||||||
#if !defined(STM32_SPI_USE_SPI4) || defined(__DOXYGEN__)
|
#if !defined(STM32_SPI_USE_SPI4) || defined(__DOXYGEN__)
|
||||||
#define STM32_SPI_USE_SPI4 FALSE
|
#define STM32_SPI_USE_SPI4 FALSE
|
||||||
|
@ -78,7 +78,7 @@
|
||||||
/**
|
/**
|
||||||
* @brief SPI5 driver enable switch.
|
* @brief SPI5 driver enable switch.
|
||||||
* @details If set to @p TRUE the support for SPI5 is included.
|
* @details If set to @p TRUE the support for SPI5 is included.
|
||||||
* @note The default is @p TRUE.
|
* @note The default is @p FALSE.
|
||||||
*/
|
*/
|
||||||
#if !defined(STM32_SPI_USE_SPI5) || defined(__DOXYGEN__)
|
#if !defined(STM32_SPI_USE_SPI5) || defined(__DOXYGEN__)
|
||||||
#define STM32_SPI_USE_SPI5 FALSE
|
#define STM32_SPI_USE_SPI5 FALSE
|
||||||
|
@ -87,7 +87,7 @@
|
||||||
/**
|
/**
|
||||||
* @brief SPI6 driver enable switch.
|
* @brief SPI6 driver enable switch.
|
||||||
* @details If set to @p TRUE the support for SPI6 is included.
|
* @details If set to @p TRUE the support for SPI6 is included.
|
||||||
* @note The default is @p TRUE.
|
* @note The default is @p FALSE.
|
||||||
*/
|
*/
|
||||||
#if !defined(STM32_SPI_USE_SPI6) || defined(__DOXYGEN__)
|
#if !defined(STM32_SPI_USE_SPI6) || defined(__DOXYGEN__)
|
||||||
#define STM32_SPI_USE_SPI6 FALSE
|
#define STM32_SPI_USE_SPI6 FALSE
|
||||||
|
|
|
@ -42,7 +42,7 @@
|
||||||
/**
|
/**
|
||||||
* @brief SPI1 driver enable switch.
|
* @brief SPI1 driver enable switch.
|
||||||
* @details If set to @p TRUE the support for SPI1 is included.
|
* @details If set to @p TRUE the support for SPI1 is included.
|
||||||
* @note The default is @p TRUE.
|
* @note The default is @p FALSE.
|
||||||
*/
|
*/
|
||||||
#if !defined(STM32_SPI_USE_SPI1) || defined(__DOXYGEN__)
|
#if !defined(STM32_SPI_USE_SPI1) || defined(__DOXYGEN__)
|
||||||
#define STM32_SPI_USE_SPI1 FALSE
|
#define STM32_SPI_USE_SPI1 FALSE
|
||||||
|
@ -51,7 +51,7 @@
|
||||||
/**
|
/**
|
||||||
* @brief SPI2 driver enable switch.
|
* @brief SPI2 driver enable switch.
|
||||||
* @details If set to @p TRUE the support for SPI2 is included.
|
* @details If set to @p TRUE the support for SPI2 is included.
|
||||||
* @note The default is @p TRUE.
|
* @note The default is @p FALSE.
|
||||||
*/
|
*/
|
||||||
#if !defined(STM32_SPI_USE_SPI2) || defined(__DOXYGEN__)
|
#if !defined(STM32_SPI_USE_SPI2) || defined(__DOXYGEN__)
|
||||||
#define STM32_SPI_USE_SPI2 FALSE
|
#define STM32_SPI_USE_SPI2 FALSE
|
||||||
|
@ -60,7 +60,7 @@
|
||||||
/**
|
/**
|
||||||
* @brief SPI3 driver enable switch.
|
* @brief SPI3 driver enable switch.
|
||||||
* @details If set to @p TRUE the support for SPI3 is included.
|
* @details If set to @p TRUE the support for SPI3 is included.
|
||||||
* @note The default is @p TRUE.
|
* @note The default is @p FALSE.
|
||||||
*/
|
*/
|
||||||
#if !defined(STM32_SPI_USE_SPI3) || defined(__DOXYGEN__)
|
#if !defined(STM32_SPI_USE_SPI3) || defined(__DOXYGEN__)
|
||||||
#define STM32_SPI_USE_SPI3 FALSE
|
#define STM32_SPI_USE_SPI3 FALSE
|
||||||
|
@ -123,6 +123,7 @@
|
||||||
#if !defined(STM32_SPI_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
|
#if !defined(STM32_SPI_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
|
||||||
#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
|
#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
|
||||||
#endif
|
#endif
|
||||||
|
/** @} */
|
||||||
|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
/* Derived constants and error checks. */
|
/* Derived constants and error checks. */
|
||||||
|
|
|
@ -12,6 +12,7 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \
|
||||||
${CHIBIOS}/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.c \
|
${CHIBIOS}/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.c \
|
||||||
${CHIBIOS}/os/hal/ports/STM32/LLD/OTGv1/usb_lld.c \
|
${CHIBIOS}/os/hal/ports/STM32/LLD/OTGv1/usb_lld.c \
|
||||||
${CHIBIOS}/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c \
|
${CHIBIOS}/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c \
|
||||||
|
${CHIBIOS}/os/hal/ports/STM32/LLD/SPIv1/i2s_lld.c \
|
||||||
${CHIBIOS}/os/hal/ports/STM32/LLD/SPIv1/spi_lld.c \
|
${CHIBIOS}/os/hal/ports/STM32/LLD/SPIv1/spi_lld.c \
|
||||||
${CHIBIOS}/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c \
|
${CHIBIOS}/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c \
|
||||||
${CHIBIOS}/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c \
|
${CHIBIOS}/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c \
|
||||||
|
|
|
@ -83,6 +83,9 @@ void halInit(void) {
|
||||||
#if HAL_USE_I2C || defined(__DOXYGEN__)
|
#if HAL_USE_I2C || defined(__DOXYGEN__)
|
||||||
i2cInit();
|
i2cInit();
|
||||||
#endif
|
#endif
|
||||||
|
#if HAL_USE_I2S || defined(__DOXYGEN__)
|
||||||
|
i2sInit();
|
||||||
|
#endif
|
||||||
#if HAL_USE_ICU || defined(__DOXYGEN__)
|
#if HAL_USE_ICU || defined(__DOXYGEN__)
|
||||||
icuInit();
|
icuInit();
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -0,0 +1,159 @@
|
||||||
|
/*
|
||||||
|
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||||
|
2011,2012,2013 Giovanni Di Sirio.
|
||||||
|
|
||||||
|
This file is part of ChibiOS/RT.
|
||||||
|
|
||||||
|
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||||
|
it under the terms of the GNU General Public License as published by
|
||||||
|
the Free Software Foundation; either version 3 of the License, or
|
||||||
|
(at your option) any later version.
|
||||||
|
|
||||||
|
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||||
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
GNU General Public License for more details.
|
||||||
|
|
||||||
|
You should have received a copy of the GNU General Public License
|
||||||
|
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @file i2s.c
|
||||||
|
* @brief I2S Driver code.
|
||||||
|
*
|
||||||
|
* @addtogroup I2S
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "hal.h"
|
||||||
|
|
||||||
|
#if HAL_USE_I2S || defined(__DOXYGEN__)
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Driver local definitions. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Driver exported variables. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Driver local variables and types. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Driver local functions. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Driver exported functions. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief I2S Driver initialization.
|
||||||
|
* @note This function is implicitly invoked by @p halInit(), there is
|
||||||
|
* no need to explicitly initialize the driver.
|
||||||
|
*
|
||||||
|
* @init
|
||||||
|
*/
|
||||||
|
void i2sInit(void) {
|
||||||
|
|
||||||
|
i2s_lld_init();
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Initializes the standard part of a @p I2SDriver structure.
|
||||||
|
*
|
||||||
|
* @param[out] i2sp pointer to the @p I2SDriver object
|
||||||
|
*
|
||||||
|
* @init
|
||||||
|
*/
|
||||||
|
void i2sObjectInit(I2SDriver *i2sp) {
|
||||||
|
|
||||||
|
i2sp->state = I2S_STOP;
|
||||||
|
i2sp->config = NULL;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Configures and activates the I2S peripheral.
|
||||||
|
*
|
||||||
|
* @param[in] i2sp pointer to the @p I2SDriver object
|
||||||
|
* @param[in] config pointer to the @p I2SConfig object
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
void i2sStart(I2SDriver *i2sp, const I2SConfig *config) {
|
||||||
|
|
||||||
|
osalDbgCheck((i2sp != NULL) && (config != NULL));
|
||||||
|
|
||||||
|
osalSysLock();
|
||||||
|
osalDbgAssert((i2sp->state == I2S_STOP) || (i2sp->state == I2S_READY),
|
||||||
|
"invalid state");
|
||||||
|
i2sp->config = config;
|
||||||
|
i2s_lld_start(i2sp);
|
||||||
|
i2sp->state = I2S_READY;
|
||||||
|
osalSysUnlock();
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Deactivates the I2S peripheral.
|
||||||
|
*
|
||||||
|
* @param[in] i2sp pointer to the @p I2SDriver object
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
void i2sStop(I2SDriver *i2sp) {
|
||||||
|
|
||||||
|
osalDbgCheck(i2sp != NULL);
|
||||||
|
|
||||||
|
osalSysLock();
|
||||||
|
osalDbgAssert((i2sp->state == I2S_STOP) || (i2sp->state == I2S_READY),
|
||||||
|
"invalid state");
|
||||||
|
i2s_lld_stop(i2sp);
|
||||||
|
i2sp->state = I2S_STOP;
|
||||||
|
osalSysUnlock();
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Starts a I2S data exchange.
|
||||||
|
*
|
||||||
|
* @param[in] i2sp pointer to the @p I2SDriver object
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
void i2sStartExchange(I2SDriver *i2sp) {
|
||||||
|
|
||||||
|
osalDbgCheck(i2sp != NULL);
|
||||||
|
|
||||||
|
osalSysLock();
|
||||||
|
osalDbgAssert(i2sp->state == I2S_READY, "not ready");
|
||||||
|
i2sStartExchangeI(i2sp);
|
||||||
|
osalSysUnlock();
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Stops the ongoing data exchange.
|
||||||
|
* @details The ongoing data exchange, if any, is stopped, if the driver
|
||||||
|
* was not active the function does nothing.
|
||||||
|
*
|
||||||
|
* @param[in] i2sp pointer to the @p I2SDriver object
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
void i2sStopExchange(I2SDriver *i2sp) {
|
||||||
|
|
||||||
|
osalDbgCheck((i2sp != NULL));
|
||||||
|
|
||||||
|
osalSysLock();
|
||||||
|
osalDbgAssert((i2sp->state == I2S_READY) ||
|
||||||
|
(i2sp->state == I2S_ACTIVE) ||
|
||||||
|
(i2sp->state == I2S_COMPLETE),
|
||||||
|
"invalid state");
|
||||||
|
i2sStopExchangeI(i2sp);
|
||||||
|
osalSysUnlock();
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* HAL_USE_I2S */
|
||||||
|
|
||||||
|
/** @} */
|
|
@ -0,0 +1,52 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||||
|
<?fileVersion 4.0.0?>
|
||||||
|
|
||||||
|
<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
|
||||||
|
<storageModule moduleId="org.eclipse.cdt.core.settings">
|
||||||
|
<cconfiguration id="0.691815652">
|
||||||
|
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.691815652" moduleId="org.eclipse.cdt.core.settings" name="Default">
|
||||||
|
<externalSettings/>
|
||||||
|
<extensions>
|
||||||
|
<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||||
|
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||||
|
<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||||
|
<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||||
|
<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||||
|
<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||||
|
</extensions>
|
||||||
|
</storageModule>
|
||||||
|
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||||
|
<configuration artifactName="${ProjName}" buildProperties="" description="" id="0.691815652" name="Default" parent="org.eclipse.cdt.build.core.prefbase.cfg">
|
||||||
|
<folderInfo id="0.691815652." name="/" resourcePath="">
|
||||||
|
<toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.884342386" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
|
||||||
|
<targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.884342386.339777752" name=""/>
|
||||||
|
<builder id="org.eclipse.cdt.build.core.settings.default.builder.1729138099" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
|
||||||
|
<tool id="org.eclipse.cdt.build.core.settings.holder.libs.146870087" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
|
||||||
|
<tool id="org.eclipse.cdt.build.core.settings.holder.605490810" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||||
|
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.2132469247" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||||
|
</tool>
|
||||||
|
<tool id="org.eclipse.cdt.build.core.settings.holder.936236661" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||||
|
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1782745250" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||||
|
</tool>
|
||||||
|
<tool id="org.eclipse.cdt.build.core.settings.holder.670706928" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||||
|
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.417510158" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||||
|
</tool>
|
||||||
|
</toolChain>
|
||||||
|
</folderInfo>
|
||||||
|
</configuration>
|
||||||
|
</storageModule>
|
||||||
|
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||||
|
</cconfiguration>
|
||||||
|
</storageModule>
|
||||||
|
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||||
|
<project id="STM32F4xx-SPI.null.219011718" name="STM32F4xx-SPI"/>
|
||||||
|
</storageModule>
|
||||||
|
<storageModule moduleId="scannerConfiguration">
|
||||||
|
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||||
|
<scannerConfigBuildInfo instanceId="0.691815652">
|
||||||
|
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
|
||||||
|
</scannerConfigBuildInfo>
|
||||||
|
</storageModule>
|
||||||
|
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||||
|
<storageModule moduleId="refreshScope"/>
|
||||||
|
</cproject>
|
|
@ -0,0 +1,38 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8"?>
|
||||||
|
<projectDescription>
|
||||||
|
<name>STM32F4xx-I2S</name>
|
||||||
|
<comment></comment>
|
||||||
|
<projects>
|
||||||
|
</projects>
|
||||||
|
<buildSpec>
|
||||||
|
<buildCommand>
|
||||||
|
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||||
|
<triggers>clean,full,incremental,</triggers>
|
||||||
|
<arguments>
|
||||||
|
</arguments>
|
||||||
|
</buildCommand>
|
||||||
|
<buildCommand>
|
||||||
|
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||||
|
<triggers>full,incremental,</triggers>
|
||||||
|
<arguments>
|
||||||
|
</arguments>
|
||||||
|
</buildCommand>
|
||||||
|
</buildSpec>
|
||||||
|
<natures>
|
||||||
|
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||||
|
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||||
|
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||||
|
</natures>
|
||||||
|
<linkedResources>
|
||||||
|
<link>
|
||||||
|
<name>board</name>
|
||||||
|
<type>2</type>
|
||||||
|
<locationURI>CHIBIOS/os/hal/boards/ST_STM32F4_DISCOVERY</locationURI>
|
||||||
|
</link>
|
||||||
|
<link>
|
||||||
|
<name>os</name>
|
||||||
|
<type>2</type>
|
||||||
|
<locationURI>CHIBIOS/os</locationURI>
|
||||||
|
</link>
|
||||||
|
</linkedResources>
|
||||||
|
</projectDescription>
|
|
@ -0,0 +1,198 @@
|
||||||
|
##############################################################################
|
||||||
|
# Build global options
|
||||||
|
# NOTE: Can be overridden externally.
|
||||||
|
#
|
||||||
|
|
||||||
|
# Compiler options here.
|
||||||
|
ifeq ($(USE_OPT),)
|
||||||
|
USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
|
||||||
|
endif
|
||||||
|
|
||||||
|
# C specific options here (added to USE_OPT).
|
||||||
|
ifeq ($(USE_COPT),)
|
||||||
|
USE_COPT =
|
||||||
|
endif
|
||||||
|
|
||||||
|
# C++ specific options here (added to USE_OPT).
|
||||||
|
ifeq ($(USE_CPPOPT),)
|
||||||
|
USE_CPPOPT = -fno-rtti
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Enable this if you want the linker to remove unused code and data
|
||||||
|
ifeq ($(USE_LINK_GC),)
|
||||||
|
USE_LINK_GC = yes
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Enable this if you want link time optimizations (LTO)
|
||||||
|
ifeq ($(USE_LTO),)
|
||||||
|
USE_LTO = yes
|
||||||
|
endif
|
||||||
|
|
||||||
|
# If enabled, this option allows to compile the application in THUMB mode.
|
||||||
|
ifeq ($(USE_THUMB),)
|
||||||
|
USE_THUMB = yes
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Enable this if you want to see the full log while compiling.
|
||||||
|
ifeq ($(USE_VERBOSE_COMPILE),)
|
||||||
|
USE_VERBOSE_COMPILE = no
|
||||||
|
endif
|
||||||
|
|
||||||
|
#
|
||||||
|
# Build global options
|
||||||
|
##############################################################################
|
||||||
|
|
||||||
|
##############################################################################
|
||||||
|
# Architecture or project specific options
|
||||||
|
#
|
||||||
|
|
||||||
|
# Stack size to be allocated to the Cortex-M process stack. This stack is
|
||||||
|
# the stack used by the main() thread.
|
||||||
|
ifeq ($(USE_PROCESS_STACKSIZE),)
|
||||||
|
USE_PROCESS_STACKSIZE = 0x400
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Stack size to the allocated to the Cortex-M main/exceptions stack. This
|
||||||
|
# stack is used for processing interrupts and exceptions.
|
||||||
|
ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
|
||||||
|
USE_EXCEPTIONS_STACKSIZE = 0x400
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Enables the use of FPU on Cortex-M4 (no, softfp, hard).
|
||||||
|
ifeq ($(USE_FPU),)
|
||||||
|
USE_FPU = no
|
||||||
|
endif
|
||||||
|
|
||||||
|
#
|
||||||
|
# Architecture or project specific options
|
||||||
|
##############################################################################
|
||||||
|
|
||||||
|
##############################################################################
|
||||||
|
# Project, sources and paths
|
||||||
|
#
|
||||||
|
|
||||||
|
# Define project name here
|
||||||
|
PROJECT = ch
|
||||||
|
|
||||||
|
# Imported source files and paths
|
||||||
|
CHIBIOS = ../../..
|
||||||
|
include $(CHIBIOS)/os/hal/hal.mk
|
||||||
|
include $(CHIBIOS)/os/hal/boards/ST_STM32F4_DISCOVERY/board.mk
|
||||||
|
include $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk
|
||||||
|
include $(CHIBIOS)/os/hal/osal/rt/osal.mk
|
||||||
|
include $(CHIBIOS)/os/rt/rt.mk
|
||||||
|
include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_stm32f4xx.mk
|
||||||
|
#include $(CHIBIOS)/test/rt/test.mk
|
||||||
|
|
||||||
|
# Define linker script file here
|
||||||
|
LDSCRIPT= $(PORTLD)/STM32F407xG.ld
|
||||||
|
|
||||||
|
# C sources that can be compiled in ARM or THUMB mode depending on the global
|
||||||
|
# setting.
|
||||||
|
CSRC = $(PORTSRC) \
|
||||||
|
$(KERNSRC) \
|
||||||
|
$(TESTSRC) \
|
||||||
|
$(HALSRC) \
|
||||||
|
$(OSALSRC) \
|
||||||
|
$(PLATFORMSRC) \
|
||||||
|
$(BOARDSRC) \
|
||||||
|
main.c
|
||||||
|
|
||||||
|
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
|
||||||
|
# setting.
|
||||||
|
CPPSRC =
|
||||||
|
|
||||||
|
# C sources to be compiled in ARM mode regardless of the global setting.
|
||||||
|
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||||
|
# option that results in lower performance and larger code size.
|
||||||
|
ACSRC =
|
||||||
|
|
||||||
|
# C++ sources to be compiled in ARM mode regardless of the global setting.
|
||||||
|
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||||
|
# option that results in lower performance and larger code size.
|
||||||
|
ACPPSRC =
|
||||||
|
|
||||||
|
# C sources to be compiled in THUMB mode regardless of the global setting.
|
||||||
|
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||||
|
# option that results in lower performance and larger code size.
|
||||||
|
TCSRC =
|
||||||
|
|
||||||
|
# C sources to be compiled in THUMB mode regardless of the global setting.
|
||||||
|
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||||
|
# option that results in lower performance and larger code size.
|
||||||
|
TCPPSRC =
|
||||||
|
|
||||||
|
# List ASM source files here
|
||||||
|
ASMSRC = $(PORTASM)
|
||||||
|
|
||||||
|
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
|
||||||
|
$(HALINC) $(OSALINC) $(PLATFORMINC) $(BOARDINC) \
|
||||||
|
$(CHIBIOS)/os/various
|
||||||
|
|
||||||
|
#
|
||||||
|
# Project, sources and paths
|
||||||
|
##############################################################################
|
||||||
|
|
||||||
|
##############################################################################
|
||||||
|
# Compiler settings
|
||||||
|
#
|
||||||
|
|
||||||
|
MCU = cortex-m4
|
||||||
|
|
||||||
|
#TRGT = arm-elf-
|
||||||
|
TRGT = arm-none-eabi-
|
||||||
|
CC = $(TRGT)gcc
|
||||||
|
CPPC = $(TRGT)g++
|
||||||
|
# Enable loading with g++ only if you need C++ runtime support.
|
||||||
|
# NOTE: You can use C++ even without C++ support if you are careful. C++
|
||||||
|
# runtime support makes code size explode.
|
||||||
|
LD = $(TRGT)gcc
|
||||||
|
#LD = $(TRGT)g++
|
||||||
|
CP = $(TRGT)objcopy
|
||||||
|
AS = $(TRGT)gcc -x assembler-with-cpp
|
||||||
|
OD = $(TRGT)objdump
|
||||||
|
SZ = $(TRGT)size
|
||||||
|
HEX = $(CP) -O ihex
|
||||||
|
BIN = $(CP) -O binary
|
||||||
|
|
||||||
|
# ARM-specific options here
|
||||||
|
AOPT =
|
||||||
|
|
||||||
|
# THUMB-specific options here
|
||||||
|
TOPT = -mthumb -DTHUMB
|
||||||
|
|
||||||
|
# Define C warning options here
|
||||||
|
CWARN = -Wall -Wextra -Wstrict-prototypes
|
||||||
|
|
||||||
|
# Define C++ warning options here
|
||||||
|
CPPWARN = -Wall -Wextra
|
||||||
|
|
||||||
|
#
|
||||||
|
# Compiler settings
|
||||||
|
##############################################################################
|
||||||
|
|
||||||
|
##############################################################################
|
||||||
|
# Start of user section
|
||||||
|
#
|
||||||
|
|
||||||
|
# List all user C define here, like -D_DEBUG=1
|
||||||
|
UDEFS =
|
||||||
|
|
||||||
|
# Define ASM defines here
|
||||||
|
UADEFS =
|
||||||
|
|
||||||
|
# List all user directories here
|
||||||
|
UINCDIR =
|
||||||
|
|
||||||
|
# List the user directory to look for the libraries here
|
||||||
|
ULIBDIR =
|
||||||
|
|
||||||
|
# List all user libraries here
|
||||||
|
ULIBS =
|
||||||
|
|
||||||
|
#
|
||||||
|
# End of user defines
|
||||||
|
##############################################################################
|
||||||
|
|
||||||
|
RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC
|
||||||
|
include $(RULESPATH)/rules.mk
|
|
@ -0,0 +1,498 @@
|
||||||
|
/*
|
||||||
|
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||||
|
|
||||||
|
Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
|
you may not use this file except in compliance with the License.
|
||||||
|
You may obtain a copy of the License at
|
||||||
|
|
||||||
|
http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
|
||||||
|
Unless required by applicable law or agreed to in writing, software
|
||||||
|
distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
See the License for the specific language governing permissions and
|
||||||
|
limitations under the License.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @file templates/chconf.h
|
||||||
|
* @brief Configuration file template.
|
||||||
|
* @details A copy of this file must be placed in each project directory, it
|
||||||
|
* contains the application specific kernel settings.
|
||||||
|
*
|
||||||
|
* @addtogroup config
|
||||||
|
* @details Kernel related settings and hooks.
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _CHCONF_H_
|
||||||
|
#define _CHCONF_H_
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/**
|
||||||
|
* @name System timers settings
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief System time counter resolution.
|
||||||
|
* @note Allowed values are 16 or 32 bits.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_ST_RESOLUTION 32
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief System tick frequency.
|
||||||
|
* @details Frequency of the system timer that drives the system ticks. This
|
||||||
|
* setting also defines the system tick time unit.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_ST_FREQUENCY 10000
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Time delta constant for the tick-less mode.
|
||||||
|
* @note If this value is zero then the system uses the classic
|
||||||
|
* periodic tick. This value represents the minimum number
|
||||||
|
* of ticks that is safe to specify in a timeout directive.
|
||||||
|
* The value one is not valid, timeouts are rounded up to
|
||||||
|
* this value.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_ST_TIMEDELTA 2
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/**
|
||||||
|
* @name Kernel parameters and options
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Round robin interval.
|
||||||
|
* @details This constant is the number of system ticks allowed for the
|
||||||
|
* threads before preemption occurs. Setting this value to zero
|
||||||
|
* disables the preemption for threads with equal priority and the
|
||||||
|
* round robin becomes cooperative. Note that higher priority
|
||||||
|
* threads can still preempt, the kernel is always preemptive.
|
||||||
|
* @note Disabling the round robin preemption makes the kernel more compact
|
||||||
|
* and generally faster.
|
||||||
|
* @note The round robin preemption is not supported in tickless mode and
|
||||||
|
* must be set to zero in that case.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_TIME_QUANTUM 0
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Managed RAM size.
|
||||||
|
* @details Size of the RAM area to be managed by the OS. If set to zero
|
||||||
|
* then the whole available RAM is used. The core memory is made
|
||||||
|
* available to the heap allocator and/or can be used directly through
|
||||||
|
* the simplified core memory allocator.
|
||||||
|
*
|
||||||
|
* @note In order to let the OS manage the whole RAM the linker script must
|
||||||
|
* provide the @p __heap_base__ and @p __heap_end__ symbols.
|
||||||
|
* @note Requires @p CH_CFG_USE_MEMCORE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_MEMCORE_SIZE 0
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Idle thread automatic spawn suppression.
|
||||||
|
* @details When this option is activated the function @p chSysInit()
|
||||||
|
* does not spawn the idle thread. The application @p main()
|
||||||
|
* function becomes the idle thread and must implement an
|
||||||
|
* infinite loop. */
|
||||||
|
#define CH_CFG_NO_IDLE_THREAD FALSE
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/**
|
||||||
|
* @name Performance options
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief OS optimization.
|
||||||
|
* @details If enabled then time efficient rather than space efficient code
|
||||||
|
* is used when two possible implementations exist.
|
||||||
|
*
|
||||||
|
* @note This is not related to the compiler optimization options.
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_OPTIMIZE_SPEED TRUE
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/**
|
||||||
|
* @name Subsystem options
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Time Measurement APIs.
|
||||||
|
* @details If enabled then the time measurement APIs are included in
|
||||||
|
* the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_TM TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Threads registry APIs.
|
||||||
|
* @details If enabled then the registry APIs are included in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_REGISTRY TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Threads synchronization APIs.
|
||||||
|
* @details If enabled then the @p chThdWait() function is included in
|
||||||
|
* the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_WAITEXIT TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Semaphores APIs.
|
||||||
|
* @details If enabled then the Semaphores APIs are included in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_SEMAPHORES TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Semaphores queuing mode.
|
||||||
|
* @details If enabled then the threads are enqueued on semaphores by
|
||||||
|
* priority rather than in FIFO order.
|
||||||
|
*
|
||||||
|
* @note The default is @p FALSE. Enable this if you have special
|
||||||
|
* requirements.
|
||||||
|
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Mutexes APIs.
|
||||||
|
* @details If enabled then the mutexes APIs are included in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_MUTEXES TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables recursive behavior on mutexes.
|
||||||
|
* @note Recursive mutexes are heavier and have an increased
|
||||||
|
* memory footprint.
|
||||||
|
*
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Conditional Variables APIs.
|
||||||
|
* @details If enabled then the conditional variables APIs are included
|
||||||
|
* in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_CONDVARS TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Conditional Variables APIs with timeout.
|
||||||
|
* @details If enabled then the conditional variables APIs with timeout
|
||||||
|
* specification are included in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
* @note Requires @p CH_CFG_USE_CONDVARS.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Events Flags APIs.
|
||||||
|
* @details If enabled then the event flags APIs are included in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_EVENTS TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Events Flags APIs with timeout.
|
||||||
|
* @details If enabled then the events APIs with timeout specification
|
||||||
|
* are included in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
* @note Requires @p CH_CFG_USE_EVENTS.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Synchronous Messages APIs.
|
||||||
|
* @details If enabled then the synchronous messages APIs are included
|
||||||
|
* in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_MESSAGES TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Synchronous Messages queuing mode.
|
||||||
|
* @details If enabled then messages are served by priority rather than in
|
||||||
|
* FIFO order.
|
||||||
|
*
|
||||||
|
* @note The default is @p FALSE. Enable this if you have special
|
||||||
|
* requirements.
|
||||||
|
* @note Requires @p CH_CFG_USE_MESSAGES.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Mailboxes APIs.
|
||||||
|
* @details If enabled then the asynchronous messages (mailboxes) APIs are
|
||||||
|
* included in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_MAILBOXES TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief I/O Queues APIs.
|
||||||
|
* @details If enabled then the I/O queues APIs are included in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_QUEUES TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Core Memory Manager APIs.
|
||||||
|
* @details If enabled then the core memory manager APIs are included
|
||||||
|
* in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_MEMCORE TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Heap Allocator APIs.
|
||||||
|
* @details If enabled then the memory heap allocator APIs are included
|
||||||
|
* in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
* @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
|
||||||
|
* @p CH_CFG_USE_SEMAPHORES.
|
||||||
|
* @note Mutexes are recommended.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_HEAP TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Memory Pools Allocator APIs.
|
||||||
|
* @details If enabled then the memory pools allocator APIs are included
|
||||||
|
* in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_MEMPOOLS TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Dynamic Threads APIs.
|
||||||
|
* @details If enabled then the dynamic threads creation APIs are included
|
||||||
|
* in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
* @note Requires @p CH_CFG_USE_WAITEXIT.
|
||||||
|
* @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_DYNAMIC TRUE
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/**
|
||||||
|
* @name Debug options
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Debug option, kernel statistics.
|
||||||
|
*
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#define CH_DBG_STATISTICS TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Debug option, system state check.
|
||||||
|
* @details If enabled the correct call protocol for system APIs is checked
|
||||||
|
* at runtime.
|
||||||
|
*
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#define CH_DBG_SYSTEM_STATE_CHECK TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Debug option, parameters checks.
|
||||||
|
* @details If enabled then the checks on the API functions input
|
||||||
|
* parameters are activated.
|
||||||
|
*
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#define CH_DBG_ENABLE_CHECKS TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Debug option, consistency checks.
|
||||||
|
* @details If enabled then all the assertions in the kernel code are
|
||||||
|
* activated. This includes consistency checks inside the kernel,
|
||||||
|
* runtime anomalies and port-defined checks.
|
||||||
|
*
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#define CH_DBG_ENABLE_ASSERTS TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Debug option, trace buffer.
|
||||||
|
* @details If enabled then the context switch circular trace buffer is
|
||||||
|
* activated.
|
||||||
|
*
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#define CH_DBG_ENABLE_TRACE TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Debug option, stack checks.
|
||||||
|
* @details If enabled then a runtime stack check is performed.
|
||||||
|
*
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
* @note The stack check is performed in a architecture/port dependent way.
|
||||||
|
* It may not be implemented or some ports.
|
||||||
|
* @note The default failure mode is to halt the system with the global
|
||||||
|
* @p panic_msg variable set to @p NULL.
|
||||||
|
*/
|
||||||
|
#define CH_DBG_ENABLE_STACK_CHECK TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Debug option, stacks initialization.
|
||||||
|
* @details If enabled then the threads working area is filled with a byte
|
||||||
|
* value when a thread is created. This can be useful for the
|
||||||
|
* runtime measurement of the used stack.
|
||||||
|
*
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#define CH_DBG_FILL_THREADS TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Debug option, threads profiling.
|
||||||
|
* @details If enabled then a field is added to the @p thread_t structure that
|
||||||
|
* counts the system ticks occurred while executing the thread.
|
||||||
|
*
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
* @note This debug option is not currently compatible with the
|
||||||
|
* tickless mode.
|
||||||
|
*/
|
||||||
|
#define CH_DBG_THREADS_PROFILING FALSE
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/**
|
||||||
|
* @name Kernel hooks
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Threads descriptor structure extension.
|
||||||
|
* @details User fields added to the end of the @p thread_t structure.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_THREAD_EXTRA_FIELDS \
|
||||||
|
/* Add threads custom fields here.*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Threads initialization hook.
|
||||||
|
* @details User initialization code added to the @p chThdInit() API.
|
||||||
|
*
|
||||||
|
* @note It is invoked from within @p chThdInit() and implicitly from all
|
||||||
|
* the threads creation APIs.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_THREAD_INIT_HOOK(tp) { \
|
||||||
|
/* Add threads initialization code here.*/ \
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Threads finalization hook.
|
||||||
|
* @details User finalization code added to the @p chThdExit() API.
|
||||||
|
*
|
||||||
|
* @note It is inserted into lock zone.
|
||||||
|
* @note It is also invoked when the threads simply return in order to
|
||||||
|
* terminate.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
|
||||||
|
/* Add threads finalization code here.*/ \
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Context switch hook.
|
||||||
|
* @details This hook is invoked just before switching between threads.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
|
||||||
|
/* System halt code here.*/ \
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Idle thread enter hook.
|
||||||
|
* @note This hook is invoked within a critical zone, no OS functions
|
||||||
|
* should be invoked from here.
|
||||||
|
* @note This macro can be used to activate a power saving mode.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_IDLE_ENTER_HOOK() { \
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Idle thread leave hook.
|
||||||
|
* @note This hook is invoked within a critical zone, no OS functions
|
||||||
|
* should be invoked from here.
|
||||||
|
* @note This macro can be used to deactivate a power saving mode.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_IDLE_LEAVE_HOOK() { \
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Idle Loop hook.
|
||||||
|
* @details This hook is continuously invoked by the idle thread loop.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_IDLE_LOOP_HOOK() { \
|
||||||
|
/* Idle loop code here.*/ \
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief System tick event hook.
|
||||||
|
* @details This hook is invoked in the system tick handler immediately
|
||||||
|
* after processing the virtual timers queue.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_SYSTEM_TICK_HOOK() { \
|
||||||
|
/* System tick event code here.*/ \
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief System halt hook.
|
||||||
|
* @details This hook is invoked in case to a system halting error before
|
||||||
|
* the system is halted.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
|
||||||
|
/* System halt code here.*/ \
|
||||||
|
}
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Port-specific settings (override port settings defaulted in chcore.h). */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
#endif /* _CHCONF_H_ */
|
||||||
|
|
||||||
|
/** @} */
|
|
@ -0,0 +1,312 @@
|
||||||
|
/*
|
||||||
|
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||||
|
|
||||||
|
Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
|
you may not use this file except in compliance with the License.
|
||||||
|
You may obtain a copy of the License at
|
||||||
|
|
||||||
|
http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
|
||||||
|
Unless required by applicable law or agreed to in writing, software
|
||||||
|
distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
See the License for the specific language governing permissions and
|
||||||
|
limitations under the License.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @file templates/halconf.h
|
||||||
|
* @brief HAL configuration header.
|
||||||
|
* @details HAL configuration file, this file allows to enable or disable the
|
||||||
|
* various device drivers from your application. You may also use
|
||||||
|
* this file in order to override the device drivers default settings.
|
||||||
|
*
|
||||||
|
* @addtogroup HAL_CONF
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _HALCONF_H_
|
||||||
|
#define _HALCONF_H_
|
||||||
|
|
||||||
|
#include "mcuconf.h"
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the PAL subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_PAL TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the ADC subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_ADC FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the CAN subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_CAN FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the EXT subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_EXT FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the GPT subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_GPT FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the I2C subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_I2C FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the I2S subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_I2S TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the ICU subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_ICU FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the MAC subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_MAC FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the MMC_SPI subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_MMC_SPI FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the PWM subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_PWM FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the RTC subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_RTC FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the SDC subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_SDC FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the SERIAL subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_SERIAL FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the SERIAL over USB subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_SERIAL_USB FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the SPI subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_SPI FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the UART subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_UART FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the USB subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_USB FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* ADC driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables synchronous APIs.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
|
||||||
|
#define ADC_USE_WAIT TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||||
|
#define ADC_USE_MUTUAL_EXCLUSION TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* CAN driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Sleep mode related APIs inclusion switch.
|
||||||
|
*/
|
||||||
|
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
|
||||||
|
#define CAN_USE_SLEEP_MODE TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* I2C driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the mutual exclusion APIs on the I2C bus.
|
||||||
|
*/
|
||||||
|
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||||
|
#define I2C_USE_MUTUAL_EXCLUSION TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* MAC driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables an event sources for incoming packets.
|
||||||
|
*/
|
||||||
|
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
|
||||||
|
#define MAC_USE_ZERO_COPY FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables an event sources for incoming packets.
|
||||||
|
*/
|
||||||
|
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
|
||||||
|
#define MAC_USE_EVENTS TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* MMC_SPI driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Delays insertions.
|
||||||
|
* @details If enabled this options inserts delays into the MMC waiting
|
||||||
|
* routines releasing some extra CPU time for the threads with
|
||||||
|
* lower priority, this may slow down the driver a bit however.
|
||||||
|
* This option is recommended also if the SPI driver does not
|
||||||
|
* use a DMA channel and heavily loads the CPU.
|
||||||
|
*/
|
||||||
|
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||||
|
#define MMC_NICE_WAITING TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* SDC driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Number of initialization attempts before rejecting the card.
|
||||||
|
* @note Attempts are performed at 10mS intervals.
|
||||||
|
*/
|
||||||
|
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
|
||||||
|
#define SDC_INIT_RETRY 100
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Include support for MMC cards.
|
||||||
|
* @note MMC support is not yet implemented so this option must be kept
|
||||||
|
* at @p FALSE.
|
||||||
|
*/
|
||||||
|
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
|
||||||
|
#define SDC_MMC_SUPPORT FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Delays insertions.
|
||||||
|
* @details If enabled this options inserts delays into the MMC waiting
|
||||||
|
* routines releasing some extra CPU time for the threads with
|
||||||
|
* lower priority, this may slow down the driver a bit however.
|
||||||
|
*/
|
||||||
|
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||||
|
#define SDC_NICE_WAITING TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* SERIAL driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Default bit rate.
|
||||||
|
* @details Configuration parameter, this is the baud rate selected for the
|
||||||
|
* default configuration.
|
||||||
|
*/
|
||||||
|
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
|
||||||
|
#define SERIAL_DEFAULT_BITRATE 38400
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Serial buffers size.
|
||||||
|
* @details Configuration parameter, you can change the depth of the queue
|
||||||
|
* buffers depending on the requirements of your application.
|
||||||
|
* @note The default is 64 bytes for both the transmission and receive
|
||||||
|
* buffers.
|
||||||
|
*/
|
||||||
|
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||||
|
#define SERIAL_BUFFERS_SIZE 16
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* SPI driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables synchronous APIs.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
|
||||||
|
#define SPI_USE_WAIT TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||||
|
#define SPI_USE_MUTUAL_EXCLUSION TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* _HALCONF_H_ */
|
||||||
|
|
||||||
|
/** @} */
|
|
@ -0,0 +1,42 @@
|
||||||
|
/*
|
||||||
|
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||||
|
|
||||||
|
Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
|
you may not use this file except in compliance with the License.
|
||||||
|
You may obtain a copy of the License at
|
||||||
|
|
||||||
|
http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
|
||||||
|
Unless required by applicable law or agreed to in writing, software
|
||||||
|
distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
See the License for the specific language governing permissions and
|
||||||
|
limitations under the License.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "ch.h"
|
||||||
|
#include "hal.h"
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Application entry point.
|
||||||
|
*/
|
||||||
|
int main(void) {
|
||||||
|
|
||||||
|
/*
|
||||||
|
* System initializations.
|
||||||
|
* - HAL initialization, this also initializes the configured device drivers
|
||||||
|
* and performs the board-specific initializations.
|
||||||
|
* - Kernel initialization, the main() function becomes a thread and the
|
||||||
|
* RTOS is active.
|
||||||
|
*/
|
||||||
|
halInit();
|
||||||
|
chSysInit();
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Normal main() thread activity, in this demo it does nothing.
|
||||||
|
*/
|
||||||
|
while (TRUE) {
|
||||||
|
chThdSleepMilliseconds(500);
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
|
}
|
|
@ -0,0 +1,319 @@
|
||||||
|
/*
|
||||||
|
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||||
|
|
||||||
|
Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
|
you may not use this file except in compliance with the License.
|
||||||
|
You may obtain a copy of the License at
|
||||||
|
|
||||||
|
http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
|
||||||
|
Unless required by applicable law or agreed to in writing, software
|
||||||
|
distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
See the License for the specific language governing permissions and
|
||||||
|
limitations under the License.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* STM32F4xx drivers configuration.
|
||||||
|
* The following settings override the default settings present in
|
||||||
|
* the various device driver implementation headers.
|
||||||
|
* Note that the settings for each driver only have effect if the whole
|
||||||
|
* driver is enabled in halconf.h.
|
||||||
|
*
|
||||||
|
* IRQ priorities:
|
||||||
|
* 15...0 Lowest...Highest.
|
||||||
|
*
|
||||||
|
* DMA priorities:
|
||||||
|
* 0...3 Lowest...Highest.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define STM32F4xx_MCUCONF
|
||||||
|
|
||||||
|
/*
|
||||||
|
* HAL driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_NO_INIT FALSE
|
||||||
|
#define STM32_HSI_ENABLED TRUE
|
||||||
|
#define STM32_LSI_ENABLED TRUE
|
||||||
|
#define STM32_HSE_ENABLED TRUE
|
||||||
|
#define STM32_LSE_ENABLED FALSE
|
||||||
|
#define STM32_CLOCK48_REQUIRED TRUE
|
||||||
|
#define STM32_SW STM32_SW_PLL
|
||||||
|
#define STM32_PLLSRC STM32_PLLSRC_HSE
|
||||||
|
#define STM32_PLLM_VALUE 8
|
||||||
|
#define STM32_PLLN_VALUE 336
|
||||||
|
#define STM32_PLLP_VALUE 2
|
||||||
|
#define STM32_PLLQ_VALUE 7
|
||||||
|
#define STM32_HPRE STM32_HPRE_DIV1
|
||||||
|
#define STM32_PPRE1 STM32_PPRE1_DIV4
|
||||||
|
#define STM32_PPRE2 STM32_PPRE2_DIV2
|
||||||
|
#define STM32_RTCSEL STM32_RTCSEL_LSI
|
||||||
|
#define STM32_RTCPRE_VALUE 8
|
||||||
|
#define STM32_MCO1SEL STM32_MCO1SEL_HSI
|
||||||
|
#define STM32_MCO1PRE STM32_MCO1PRE_DIV1
|
||||||
|
#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK
|
||||||
|
#define STM32_MCO2PRE STM32_MCO2PRE_DIV5
|
||||||
|
#define STM32_I2SSRC STM32_I2SSRC_CKIN
|
||||||
|
#define STM32_PLLI2SN_VALUE 192
|
||||||
|
#define STM32_PLLI2SR_VALUE 5
|
||||||
|
#define STM32_PVD_ENABLE FALSE
|
||||||
|
#define STM32_PLS STM32_PLS_LEV0
|
||||||
|
#define STM32_BKPRAM_ENABLE FALSE
|
||||||
|
|
||||||
|
/*
|
||||||
|
* ADC driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
|
||||||
|
#define STM32_ADC_USE_ADC1 FALSE
|
||||||
|
#define STM32_ADC_USE_ADC2 FALSE
|
||||||
|
#define STM32_ADC_USE_ADC3 FALSE
|
||||||
|
#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
|
||||||
|
#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
|
||||||
|
#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
|
||||||
|
#define STM32_ADC_ADC1_DMA_PRIORITY 2
|
||||||
|
#define STM32_ADC_ADC2_DMA_PRIORITY 2
|
||||||
|
#define STM32_ADC_ADC3_DMA_PRIORITY 2
|
||||||
|
#define STM32_ADC_IRQ_PRIORITY 6
|
||||||
|
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6
|
||||||
|
#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6
|
||||||
|
#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6
|
||||||
|
|
||||||
|
/*
|
||||||
|
* CAN driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_CAN_USE_CAN1 FALSE
|
||||||
|
#define STM32_CAN_USE_CAN2 FALSE
|
||||||
|
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
|
||||||
|
#define STM32_CAN_CAN2_IRQ_PRIORITY 11
|
||||||
|
|
||||||
|
/*
|
||||||
|
* EXT driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI17_IRQ_PRIORITY 15
|
||||||
|
#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI20_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI21_IRQ_PRIORITY 15
|
||||||
|
#define STM32_EXT_EXTI22_IRQ_PRIORITY 15
|
||||||
|
|
||||||
|
/*
|
||||||
|
* GPT driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_GPT_USE_TIM1 FALSE
|
||||||
|
#define STM32_GPT_USE_TIM2 FALSE
|
||||||
|
#define STM32_GPT_USE_TIM3 FALSE
|
||||||
|
#define STM32_GPT_USE_TIM4 FALSE
|
||||||
|
#define STM32_GPT_USE_TIM5 FALSE
|
||||||
|
#define STM32_GPT_USE_TIM6 FALSE
|
||||||
|
#define STM32_GPT_USE_TIM7 FALSE
|
||||||
|
#define STM32_GPT_USE_TIM8 FALSE
|
||||||
|
#define STM32_GPT_USE_TIM9 FALSE
|
||||||
|
#define STM32_GPT_USE_TIM11 FALSE
|
||||||
|
#define STM32_GPT_USE_TIM12 FALSE
|
||||||
|
#define STM32_GPT_USE_TIM14 FALSE
|
||||||
|
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
|
||||||
|
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
|
||||||
|
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
|
||||||
|
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
|
||||||
|
#define STM32_GPT_TIM5_IRQ_PRIORITY 7
|
||||||
|
#define STM32_GPT_TIM6_IRQ_PRIORITY 7
|
||||||
|
#define STM32_GPT_TIM7_IRQ_PRIORITY 7
|
||||||
|
#define STM32_GPT_TIM8_IRQ_PRIORITY 7
|
||||||
|
#define STM32_GPT_TIM9_IRQ_PRIORITY 7
|
||||||
|
#define STM32_GPT_TIM11_IRQ_PRIORITY 7
|
||||||
|
#define STM32_GPT_TIM12_IRQ_PRIORITY 7
|
||||||
|
#define STM32_GPT_TIM14_IRQ_PRIORITY 7
|
||||||
|
|
||||||
|
/*
|
||||||
|
* I2C driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_I2C_USE_I2C1 FALSE
|
||||||
|
#define STM32_I2C_USE_I2C2 FALSE
|
||||||
|
#define STM32_I2C_USE_I2C3 FALSE
|
||||||
|
#define STM32_I2C_BUSY_TIMEOUT 50
|
||||||
|
#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
|
||||||
|
#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
|
||||||
|
#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||||
|
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
|
||||||
|
#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||||
|
#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||||
|
#define STM32_I2C_I2C1_IRQ_PRIORITY 5
|
||||||
|
#define STM32_I2C_I2C2_IRQ_PRIORITY 5
|
||||||
|
#define STM32_I2C_I2C3_IRQ_PRIORITY 5
|
||||||
|
#define STM32_I2C_I2C1_DMA_PRIORITY 3
|
||||||
|
#define STM32_I2C_I2C2_DMA_PRIORITY 3
|
||||||
|
#define STM32_I2C_I2C3_DMA_PRIORITY 3
|
||||||
|
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
|
||||||
|
|
||||||
|
/*
|
||||||
|
* I2S driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_I2S_USE_SPI2 TRUE
|
||||||
|
#define STM32_I2S_USE_SPI3 FALSE
|
||||||
|
#define STM32_I2S_SPI2_IRQ_PRIORITY 10
|
||||||
|
#define STM32_I2S_SPI3_IRQ_PRIORITY 10
|
||||||
|
#define STM32_I2S_SPI2_DMA_PRIORITY 1
|
||||||
|
#define STM32_I2S_SPI3_DMA_PRIORITY 1
|
||||||
|
#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||||
|
#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||||
|
#define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
|
||||||
|
#define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
|
||||||
|
#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure")
|
||||||
|
|
||||||
|
/*
|
||||||
|
* ICU driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_ICU_USE_TIM1 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM2 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM3 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM5 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM8 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM9 FALSE
|
||||||
|
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
|
/*
|
||||||
|
* MAC driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_MAC_TRANSMIT_BUFFERS 2
|
||||||
|
#define STM32_MAC_RECEIVE_BUFFERS 4
|
||||||
|
#define STM32_MAC_BUFFERS_SIZE 1522
|
||||||
|
#define STM32_MAC_PHY_TIMEOUT 100
|
||||||
|
#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE
|
||||||
|
#define STM32_MAC_ETH1_IRQ_PRIORITY 13
|
||||||
|
#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0
|
||||||
|
|
||||||
|
/*
|
||||||
|
* PWM driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_PWM_USE_ADVANCED FALSE
|
||||||
|
#define STM32_PWM_USE_TIM1 FALSE
|
||||||
|
#define STM32_PWM_USE_TIM2 FALSE
|
||||||
|
#define STM32_PWM_USE_TIM3 FALSE
|
||||||
|
#define STM32_PWM_USE_TIM4 FALSE
|
||||||
|
#define STM32_PWM_USE_TIM5 FALSE
|
||||||
|
#define STM32_PWM_USE_TIM8 FALSE
|
||||||
|
#define STM32_PWM_USE_TIM9 FALSE
|
||||||
|
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
|
||||||
|
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
||||||
|
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
||||||
|
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
||||||
|
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
|
||||||
|
#define STM32_PWM_TIM8_IRQ_PRIORITY 7
|
||||||
|
#define STM32_PWM_TIM9_IRQ_PRIORITY 7
|
||||||
|
|
||||||
|
/*
|
||||||
|
* SDC driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_SDC_SDIO_DMA_PRIORITY 3
|
||||||
|
#define STM32_SDC_SDIO_IRQ_PRIORITY 9
|
||||||
|
#define STM32_SDC_WRITE_TIMEOUT_MS 250
|
||||||
|
#define STM32_SDC_READ_TIMEOUT_MS 25
|
||||||
|
#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
|
||||||
|
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
|
||||||
|
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
|
||||||
|
|
||||||
|
/*
|
||||||
|
* SERIAL driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_SERIAL_USE_USART1 FALSE
|
||||||
|
#define STM32_SERIAL_USE_USART2 FALSE
|
||||||
|
#define STM32_SERIAL_USE_USART3 FALSE
|
||||||
|
#define STM32_SERIAL_USE_UART4 FALSE
|
||||||
|
#define STM32_SERIAL_USE_UART5 FALSE
|
||||||
|
#define STM32_SERIAL_USE_USART6 FALSE
|
||||||
|
#define STM32_SERIAL_USART1_PRIORITY 12
|
||||||
|
#define STM32_SERIAL_USART2_PRIORITY 12
|
||||||
|
#define STM32_SERIAL_USART3_PRIORITY 12
|
||||||
|
#define STM32_SERIAL_UART4_PRIORITY 12
|
||||||
|
#define STM32_SERIAL_UART5_PRIORITY 12
|
||||||
|
#define STM32_SERIAL_USART6_PRIORITY 12
|
||||||
|
|
||||||
|
/*
|
||||||
|
* SPI driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_SPI_USE_SPI1 FALSE
|
||||||
|
#define STM32_SPI_USE_SPI2 FALSE
|
||||||
|
#define STM32_SPI_USE_SPI3 FALSE
|
||||||
|
#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
|
||||||
|
#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
|
||||||
|
#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||||
|
#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||||
|
#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
|
||||||
|
#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
|
||||||
|
#define STM32_SPI_SPI1_DMA_PRIORITY 1
|
||||||
|
#define STM32_SPI_SPI2_DMA_PRIORITY 1
|
||||||
|
#define STM32_SPI_SPI3_DMA_PRIORITY 1
|
||||||
|
#define STM32_SPI_SPI1_IRQ_PRIORITY 10
|
||||||
|
#define STM32_SPI_SPI2_IRQ_PRIORITY 10
|
||||||
|
#define STM32_SPI_SPI3_IRQ_PRIORITY 10
|
||||||
|
#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
|
||||||
|
|
||||||
|
/*
|
||||||
|
* ST driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_ST_IRQ_PRIORITY 8
|
||||||
|
#define STM32_ST_USE_TIMER 2
|
||||||
|
|
||||||
|
/*
|
||||||
|
* UART driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_UART_USE_USART1 FALSE
|
||||||
|
#define STM32_UART_USE_USART2 FALSE
|
||||||
|
#define STM32_UART_USE_USART3 FALSE
|
||||||
|
#define STM32_UART_USE_UART4 FALSE
|
||||||
|
#define STM32_UART_USE_UART5 FALSE
|
||||||
|
#define STM32_UART_USE_USART6 FALSE
|
||||||
|
#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
|
||||||
|
#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
|
||||||
|
#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
|
||||||
|
#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
|
||||||
|
#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
|
||||||
|
#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||||
|
#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||||
|
#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||||
|
#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
|
||||||
|
#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
|
||||||
|
#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
|
||||||
|
#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
|
||||||
|
#define STM32_UART_USART1_IRQ_PRIORITY 12
|
||||||
|
#define STM32_UART_USART2_IRQ_PRIORITY 12
|
||||||
|
#define STM32_UART_USART3_IRQ_PRIORITY 12
|
||||||
|
#define STM32_UART_UART4_IRQ_PRIORITY 12
|
||||||
|
#define STM32_UART_UART5_IRQ_PRIORITY 12
|
||||||
|
#define STM32_UART_USART6_IRQ_PRIORITY 12
|
||||||
|
#define STM32_UART_USART1_DMA_PRIORITY 0
|
||||||
|
#define STM32_UART_USART2_DMA_PRIORITY 0
|
||||||
|
#define STM32_UART_USART3_DMA_PRIORITY 0
|
||||||
|
#define STM32_UART_UART4_DMA_PRIORITY 0
|
||||||
|
#define STM32_UART_UART5_DMA_PRIORITY 0
|
||||||
|
#define STM32_UART_USART6_DMA_PRIORITY 0
|
||||||
|
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
|
||||||
|
|
||||||
|
/*
|
||||||
|
* USB driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_USB_USE_OTG1 FALSE
|
||||||
|
#define STM32_USB_USE_OTG2 FALSE
|
||||||
|
#define STM32_USB_OTG1_IRQ_PRIORITY 14
|
||||||
|
#define STM32_USB_OTG2_IRQ_PRIORITY 14
|
||||||
|
#define STM32_USB_OTG1_RX_FIFO_SIZE 512
|
||||||
|
#define STM32_USB_OTG2_RX_FIFO_SIZE 1024
|
||||||
|
#define STM32_USB_OTG_THREAD_PRIO LOWPRIO
|
||||||
|
#define STM32_USB_OTG_THREAD_STACK_SIZE 128
|
||||||
|
#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
|
|
@ -0,0 +1,30 @@
|
||||||
|
*****************************************************************************
|
||||||
|
** ChibiOS/RT HAL - I2S driver demo for STM32F4xx. **
|
||||||
|
*****************************************************************************
|
||||||
|
|
||||||
|
** TARGET **
|
||||||
|
|
||||||
|
The demo runs on an ST STM32F4-Discovery board.
|
||||||
|
|
||||||
|
** The Demo **
|
||||||
|
|
||||||
|
The application demonstrates the use of the STM32F4xx I2S driver.
|
||||||
|
|
||||||
|
** Board Setup **
|
||||||
|
|
||||||
|
None.
|
||||||
|
|
||||||
|
** Build Procedure **
|
||||||
|
|
||||||
|
The demo has been tested using the free Codesourcery GCC-based toolchain
|
||||||
|
and YAGARTO.
|
||||||
|
Just modify the TRGT line in the makefile in order to use different GCC ports.
|
||||||
|
|
||||||
|
** Notes **
|
||||||
|
|
||||||
|
Some files used by the demo are not part of ChibiOS/RT but are copyright of
|
||||||
|
ST Microelectronics and are licensed under a different license.
|
||||||
|
Also note that not all the files present in the ST library are distributed
|
||||||
|
with ChibiOS/RT, you can find the whole library on the ST web site:
|
||||||
|
|
||||||
|
http://www.st.com
|
Loading…
Reference in New Issue