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STM8L platform support (not tested yet). 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2347 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
gdisirio 2010-11-11 18:51:10 +00:00
parent 009e8d28c3
commit 27654c1bb6
16 changed files with 4792 additions and 137 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
boards/ST_STM8S_DISCOVERY/board.c
View File

@ -26,22 +26,6 @@
#define TIM2_CLOCK (SYSCLK / 16)
#define TIM2_ARR ((TIM2_CLOCK / CH_FREQUENCY) - 1)
/*
* TIM2 interrupt handler.
*/
CH_IRQ_HANDLER(13) {
CH_IRQ_PROLOGUE();
chSysLockFromIsr();
chSysTimerHandlerI();
chSysUnlockFromIsr();
TIM2->SR1 = 0;
CH_IRQ_EPILOGUE();
}
/*
* Board initialization code.
*/

141
boards/ST_STM8S_DISCOVERY/board.h
View File

@ -21,95 +21,148 @@
#define _BOARD_H_
/*
* Setup for STMicroelectronics STM8S-Discovery board.
* Setup for STMicroelectronics STM8L-Discovery board.
*/
/*
* Board identifiers.
*/
#define BOARD_ST_STM8S_DISCOVERY
#define BOARD_NAME "ST STM8S-Discovery"
#define BOARD_ST_STM8L_DISCOVERY
#define BOARD_NAME "ST STM8L-Discovery"
/*
* Board frequencies.
* Board frequencies and bypass modes.
*
* The bypass must be set to TRUE if the chip is driven by an external
* oscillator rather than a crystal. Frequency must be set to zero if
* the clock source is not used at all.
* The following constants are used by the HAL low level driver for
* correct clock initialization.
*/
#define HSECLK 16000000
#define HSECLK 0
#define HSEBYPASS FALSE
#define LSECLK 32768
#define LSEBYPASS FALSE
/*
* MCU model used on the board.
*/
#define STM8S105
#define STM8L152C6
#define STM8L15X_MD
/*
* Pin definitions.
*/
#define PA_OSCIN 1
#define PA_OSCOUT 2
#define PA_OSC_IN 2
#define PA_OSC_OUT 3
#define PA_LCD_COM0 4
#define PA_LCD_COM1 5
#define PA_LCD_COM2 6
#define PA_LCD_SEG0 7
#define PC_TS_KEY 1
#define PC_TS_LOADREF 2
#define PC_TS_SHIELD 3
#define PB_LCD_SEG10 0
#define PB_LCD_SEG11 1
#define PB_LCD_SEG12 2
#define PB_LCD_SEG13 3
#define PB_LCD_SEG14 4
#define PB_LCD_SEG15 5
#define PB_LCD_SEG16 6
#define PB_LCD_SEG17 7
#define PD_LD10 0
#define PD_SWIM 1
#define PD_TX 5
#define PD_RX 6
#define PC_UNUSED 0
#define PC_BUTTON 1
#define PC_LCD_SEG22 2
#define PC_LCD_SEG23 3
#define PC_IDD_CNT_EN 4
#define PC_LED4 7
#define PD_LCD_SEG7 0
#define PD_LCD_COM3 1
#define PD_LCD_SEG8 2
#define PD_LCD_SEG9 3
#define PD_LCD_SEG18 4
#define PD_LCD_SEG19 5
#define PD_LCD_SEG20 6
#define PD_LCD_SEG21 7
#define PE_LCD_SEG1 0
#define PE_LCD_SEG2 1
#define PE_LCD_SEG3 2
#define PE_LCD_SEG4 3
#define PE_LCD_SEG5 4
#define PE_LCD_SEG6 5
#define PE_IDD_WAKEUP 6
#define PE_LED3 7
#define PF0_IDD_MEASUREMENT 0
/*
* Port A initial setup.
*/
#define VAL_GPIOAODR 0
#define VAL_GPIOADDR 0 /* All inputs. */
#define VAL_GPIOACR1 0xFF /* All pull-up or push-pull. */
#define VAL_GPIOACR2 0
#define VAL_GPIOAODR 0
#define VAL_GPIOADDR 0 /* All inputs. */
#define VAL_GPIOACR1 0xFF /* All pull-up. */
#define VAL_GPIOACR2 0
/*
* Port B initial setup.
*/
#define VAL_GPIOBODR 0
#define VAL_GPIOBDDR 0 /* All inputs. */
#define VAL_GPIOBCR1 0xFF /* All push-pull. */
#define VAL_GPIOBCR2 0
#define VAL_GPIOBODR 0
#define VAL_GPIOBDDR 0 /* All inputs. */
#define VAL_GPIOBCR1 0xFF /* All pull-up. */
#define VAL_GPIOBCR2 0
/*
* Port C initial setup.
*/
#define VAL_GPIOCODR 0
#define VAL_GPIOCDDR 0 /* All inputs. */
#define VAL_GPIOCCR1 0xFF /* All pull-up. */
#define VAL_GPIOCCR2 0
#define VAL_GPIOCODR (1 < PC_LED4)
#define VAL_GPIOCDDR (1 < PC_LED4)
#define VAL_GPIOCCR1 0xFF /* All pull-up/open drain. */
#define VAL_GPIOCCR2 0
/*
* Port D initial setup.
*/
#define VAL_GPIODODR (1 << PD_LD10) | (1 << PD_TX)
#define VAL_GPIODDDR (1 << PD_LD10) | (1 << PD_TX)
#define VAL_GPIODCR1 0xFF /* All pull-up. */
#define VAL_GPIODCR2 0
#define VAL_GPIODODR 0
#define VAL_GPIODDDR 0 /* All inputs. */
#define VAL_GPIODCR1 0xFF /* All pull-up. */
#define VAL_GPIODCR2 0
/*
* Port E initial setup.
*/
#define VAL_GPIOEODR 0
#define VAL_GPIOEDDR 0 /* All inputs. */
#define VAL_GPIOECR1 0xFF /* All pull-up. */
#define VAL_GPIOECR2 0
#define VAL_GPIOEODR (1 < PE_LED3)
#define VAL_GPIOEDDR (1 < PE_LED3)
#define VAL_GPIOECR1 0xFF /* All pull-up/open drain. */
#define VAL_GPIOECR2 0
/*
* Port F initial setup.
*/
#define VAL_GPIOFODR 0
#define VAL_GPIOFDDR 0 /* All inputs. */
#define VAL_GPIOFCR1 0xFF /* All pull-up. */
#define VAL_GPIOFCR2 0
#define VAL_GPIOFODR 0
#define VAL_GPIOFDDR 0 /* All inputs. */
#define VAL_GPIOFCR1 0xFF /* All pull-up. */
#define VAL_GPIOFCR2 0
/*
* Port G initial setup.
* Port G initial setup (not present but still initialized).
*/
#define VAL_GPIOGODR 0
#define VAL_GPIOGDDR 0 /* All inputs. */
#define VAL_GPIOGCR1 0xFF /* All pull-up or push-pull. */
#define VAL_GPIOGCR2 0
#define VAL_GPIOGODR 0
#define VAL_GPIOGDDR 0 /* All inputs. */
#define VAL_GPIOGCR1 0xFF /* All pull-up. */
#define VAL_GPIOGCR2 0
/*
* TIM2 interrupt handler segment.
*/
#define _TIM2_UPDATE_ISR() { \
if ((TIM2->SR1 & TIM_SR1_UIF) != 0) { \
chSysLockFromIsr(); \
chSysTimerHandlerI(); \
chSysUnlockFromIsr(); \
TIM2->SR1 = 0; \
} \
}
#ifdef __cplusplus
extern "C" {

1791
demos/STM8L-STM8L152-DISCOVERY-STVD/cosmic/cosmic.stp
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File diff suppressed because it is too large Load Diff

255
demos/STM8L-STM8L152-DISCOVERY-STVD/cosmic/vectors.c
View File

@ -20,6 +20,11 @@
#include "ch.h"
#include "hal.h"
/* This inclusion allows user ISR to be added to the HAL.*/
#if defined(_USER_ISR_)
#include "user_isr.h"
#endif
/**
* @brief Exception handler type.
*/
@ -29,12 +34,37 @@ typedef void @far @interrupt (*interrupt_handler_t)(void);
* Various external symbols.
*/
void _stext(void);
@far @interrupt void vector_trap(void);
@far @interrupt void vector0(void);
@far @interrupt void vector1(void);
@far @interrupt void vector2(void);
@far @interrupt void vector3(void);
@far @interrupt void vector4(void);
@far @interrupt void vector5(void);
@far @interrupt void vector6(void);
@far @interrupt void vector7(void);
@far @interrupt void vector8(void);
@far @interrupt void vector9(void);
@far @interrupt void vector10(void);
@far @interrupt void vector11(void);
@far @interrupt void vector12(void);
@far @interrupt void vector13(void);
@far @interrupt void vector14(void);
@far @interrupt void vector15(void);
@far @interrupt void vector16(void);
@far @interrupt void vector17(void);
@far @interrupt void vector18(void);
@far @interrupt void vector19(void);
@far @interrupt void vector20(void);
@far @interrupt void vector21(void);
@far @interrupt void vector22(void);
@far @interrupt void vector23(void);
@far @interrupt void vector24(void);
@far @interrupt void vector25(void);
@far @interrupt void vector26(void);
@far @interrupt void vector27(void);
@far @interrupt void vector28(void);
@far @interrupt void vector29(void);
/**
* @brief Exception vector type.
@ -45,12 +75,14 @@ typedef struct {
} exception_vector_t;
/**
* @brief Undefined interrupt handler.
* @note It should never be invoked.
* @brief Unhandled exception handler.
* @default This function is the default handler for all unused entries
* in the vector table.
*/
@far @interrupt static void vector (void)
@far @interrupt void _unhandled_exception (void)
{
return;
while (TRUE)
;
}
/**
@ -58,39 +90,190 @@ typedef struct {
*/
exception_vector_t const _vectab[] = {
{0x82, (interrupt_handler_t)_stext}, /* reset */
{0x82, vector}, /* trap */
{0x82, vector}, /* vector0 */
{0x82, vector}, /* vector1 */
{0x82, vector}, /* vector2 */
{0x82, vector}, /* vector3 */
{0x82, vector}, /* vector4 */
{0x82, vector}, /* vector5 */
{0x82, vector}, /* vector6 */
{0x82, vector}, /* vector7 */
{0x82, vector}, /* vector8 */
{0x82, vector}, /* vector9 */
#if HAL_USE_SPI && STM8_SPI_USE_SPI
#if defined(_TRAP_ISR)
{0x82, vector_trap},
#else
{0x82, _unhandled_exception}, /* trap */
#endif
#if defined(_TLI_ISR)
{0x82, vector0},
#else
{0x82, _unhandled_exception}, /* vector0 */
#endif
#if defined(_FLASH_ISR)
{0x82, vector1},
#else
{0x82, _unhandled_exception}, /* vector1 */
#endif
#if defined(_DMA10_ISR) || defined(_DMA11_ISR)
{0x82, vector2},
#else
{0x82, _unhandled_exception}, /* vector2 */
#endif
#if defined(_DMA12_ISR) || defined(_DMA13_ISR)
{0x82, vector3},
#else
{0x82, _unhandled_exception}, /* vector3 */
#endif
#if defined(_RTC_ISR) || defined(_LSE_CSS_ISR)
{0x82, vector4},
#else
{0x82, _unhandled_exception}, /* vector4 */
#endif
#if defined(_EXTIE_ISR) || defined(_EXTIF_ISR) || defined(_PVD_ISR)
{0x82, vector5},
#else
{0x82, _unhandled_exception}, /* vector5 */
#endif
#if defined(_EXTIB_ISR) || defined(_EXTIG_ISR)
{0x82, vector6},
#else
{0x82, _unhandled_exception}, /* vector6 */
#endif
#if defined(_EXTID_ISR) || defined(_EXTIH_ISR)
{0x82, vector7},
#else
{0x82, _unhandled_exception}, /* vector7 */
#endif
#if defined(_EXTI0_ISR)
{0x82, vector8},
#else
{0x82, _unhandled_exception}, /* vector8 */
#endif
#if defined(_EXTI1_ISR)
{0x82, vector9},
#else
{0x82, _unhandled_exception}, /* vector9 */
#endif
#if defined(_EXTI2_ISR)
{0x82, vector10},
#else
{0x82, vector}, /* vector10 */
{0x82, _unhandled_exception}, /* vector10 */
#endif
#if defined(_EXTI3_ISR)
{0x82, vector11},
#else
{0x82, _unhandled_exception}, /* vector11 */
#endif
#if defined(_EXTI4_ISR)
{0x82, vector12},
#else
{0x82, _unhandled_exception}, /* vector12 */
#endif
#if defined(_EXTI5_ISR)
{0x82, vector13},
#else
{0x82, _unhandled_exception}, /* vector13 */
#endif
#if defined(_EXTI6_ISR)
{0x82, vector14},
#else
{0x82, _unhandled_exception}, /* vector14 */
#endif
#if defined(_EXTI7_ISR)
{0x82, vector15},
#else
{0x82, _unhandled_exception}, /* vector15 */
#endif
#if defined(_LCD_ISR) || defined(_AES_ISR)
{0x82, vector16},
#else
{0x82, _unhandled_exception}, /* vector16 */
#endif
#if defined(_CLK_ISR) || defined(_TIM1_BREAK_ISR) || defined(_DAC_ISR)
{0x82, vector17},
#else
{0x82, _unhandled_exception}, /* vector17 */
#endif
#if defined(_COMP1_ISR) || defined(_COMP2_ISR) || defined(_ADC1_ISR)
{0x82, vector18},
#else
{0x82, _unhandled_exception}, /* vector18 */
#endif
#if defined(_TIM2_OVERFLOW_ISR) || defined(_USART2_TRANSMIT_ISR)
{0x82, vector19},
#else
{0x82, _unhandled_exception}, /* vector19 */
#endif
#if defined(_TIM2_COMPARE_ISR) || defined(_USART2_RECEIVE_ISR)
{0x82, vector20},
#else
{0x82, _unhandled_exception}, /* vector20 */
#endif
#if defined(_TIM3_UPDATE_ISR) || defined(_USART3_TRANSMIT_ISR)
{0x82, vector21},
#else
{0x82, _unhandled_exception}, /* vector21 */
#endif
#if defined(_TIM3_COMPARE_ISR) || defined(_USART3_RECEIVE_ISR)
{0x82, vector22},
#else
{0x82, _unhandled_exception}, /* vector22 */
#endif
#if defined(_TIM1_UPDATE_ISR)
{0x82, vector23},
#else
{0x82, _unhandled_exception}, /* vector23 */
#endif
#if defined(_TIM1_COMPARE_ISR)
{0x82, vector24},
#else
{0x82, _unhandled_exception}, /* vector24 */
#endif
#if defined(_TIM4_UPDATE_ISR)
{0x82, vector25},
#else
{0x82, _unhandled_exception}, /* vector25 */
#endif
#if defined(_SPI1_ISR)
{0x82, vector26},
#else
{0x82, _unhandled_exception}, /* vector26 */
#endif
#if defined(_TIM5_UPDATE_ISR) || defined(_USART1_TRANSMIT_ISR)
{0x82, vector27},
#else
{0x82, _unhandled_exception}, /* vector27 */
#endif
#if defined(_TIM5_COMPARE_ISR) || defined(_USART1_RECEIVE_ISR)
{0x82, vector28},
#else
{0x82, _unhandled_exception}, /* vector28 */
#endif
#if defined(_SPI2_ISR) || defined(_I2C1_ISR)
{0x82, vector29},
#else
{0x82, _unhandled_exception}, /* vector29 */
#endif
{0x82, vector}, /* vector11 */
{0x82, vector}, /* vector12 */
{0x82, vector}, /* vector13 */
{0x82, vector}, /* vector14 */
{0x82, vector}, /* vector15 */
{0x82, vector}, /* vector16 */
{0x82, vector}, /* vector17 */
{0x82, vector}, /* vector18 */
{0x82, vector}, /* vector19 */
{0x82, vector20}, /* vector20 */
{0x82, vector}, /* vector21 */
{0x82, vector}, /* vector22 */
{0x82, vector}, /* vector23 */
{0x82, vector}, /* vector24 */
{0x82, vector}, /* vector25 */
{0x82, vector}, /* vector26 */
{0x82, vector}, /* vector27 */
{0x82, vector}, /* vector28 */
{0x82, vector}, /* vector29 */
};

4
demos/STM8L-STM8L152-DISCOVERY-STVD/demo/halconf.h
View File

@ -41,7 +41,7 @@
* @brief Enables the PAL subsystem.
*/
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
#define HAL_USE_PAL FALSE
#define HAL_USE_PAL TRUE
#endif
/**
@ -90,7 +90,7 @@
* @brief Enables the SERIAL subsystem.
*/
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL FALSE
#define HAL_USE_SERIAL TRUE
#endif
/**

16
demos/STM8L-STM8L152-DISCOVERY-STVD/demo/main.c
View File

@ -29,9 +29,13 @@ static msg_t Thread1(void *arg) {
(void)arg;
while (TRUE) {
// palClearPad(GPIOD, PD_LD10);
palClearPad(GPIOC, PC_LED4);
chThdSleepMilliseconds(500);
// palSetPad(GPIOD, PD_LD10);
palSetPad(GPIOC, PC_LED4);
chThdSleepMilliseconds(500);
palClearPad(GPIOE, PE_LED3);
chThdSleepMilliseconds(500);
palSetPad(GPIOE, PE_LED3);
chThdSleepMilliseconds(500);
}
return 0;
@ -55,7 +59,7 @@ void main(void) {
/*
* Activates the serial driver 1 using the driver default configuration.
*/
// sdStart(&SD2, NULL);
sdStart(&SD1, NULL);
/*
* Creates the blinker thread.
@ -66,10 +70,8 @@ void main(void) {
* Normal main() thread activity.
*/
while (TRUE) {
// if (palReadPad(GPIOG, 0) == PAL_LOW)
// TestThread(&SD2);
// if (palReadPad(GPIOG, 1) == PAL_LOW)
// sdWriteTimeout(&SD2, "Hello World!\r\n", 14, TIME_INFINITE);
if (palReadPad(GPIOC, PC_BUTTON) == PAL_LOW)
TestThread(&SD1);
chThdSleepMilliseconds(1000);
}
}

2
demos/STM8L-STM8L152-DISCOVERY-STVD/demo/mcuconf.h
View File

@ -43,4 +43,4 @@
*/
#define STM8L_SERIAL_USE_USART1 TRUE
#define STM8L_SERIAL_USE_USART2 FALSE
#define STM8K_SERIAL_USE_USART3 FALSE
#define STM8L_SERIAL_USE_USART3 FALSE

1659
demos/STM8L-STM8L152-DISCOVERY-STVD/raisonance/raisonance.stp
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File diff suppressed because it is too large Load Diff

4
os/hal/platforms/STM8L/hal_lld.c
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@ -39,7 +39,7 @@
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
*//*
*/
ROMCONST PALConfig pal_default_config =
{
{
@ -55,7 +55,7 @@ ROMCONST PALConfig pal_default_config =
{VAL_GPIOIODR, 0, VAL_GPIOIDDR, VAL_GPIOICR1, VAL_GPIOICR2},
#endif
}
};*/
};
/*===========================================================================*/
/* Driver local functions. */

1
os/hal/platforms/STM8L/hal_lld.h
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@ -16,7 +16,6 @@
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file STM8L/hal_lld.h
* @brief STM8L HAL subsystem low level driver source.

110
os/hal/platforms/STM8L/pal_lld.c Normal file
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@ -0,0 +1,110 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file STM8L/pal_lld.c
* @brief STM8L GPIO low level driver code.
*
* @addtogroup PAL
* @{
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Pads mode setup.
* @details This function programs a pads group belonging to the same port
* with the specified mode.
* @note This function is not meant to be invoked directly by the
* application code.
* @note @p PAL_MODE_UNCONNECTED is implemented as push pull output at 2MHz.
*
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
*
* @notapi
*/
void _pal_lld_setgroupmode(ioportid_t port,
ioportmask_t mask,
uint_fast8_t mode) {
switch (mode & PAL_MODE_MASK) {
case PAL_MODE_RESET:
case PAL_MODE_INPUT_PULLUP:
port->DDR &= ~mask;
port->CR1 |= mask;
port->CR2 &= ~mask;
break;
case PAL_MODE_INPUT:
case PAL_MODE_INPUT_ANALOG:
port->DDR &= ~mask;
port->CR1 &= ~mask;
port->CR2 &= ~mask;
break;
case PAL_MODE_UNCONNECTED:
case PAL_MODE_OUTPUT_PUSHPULL_SLOW:
port->DDR |= mask;
port->CR1 |= mask;
port->CR2 &= ~mask;
break;
case PAL_MODE_OUTPUT_PUSHPULL:
port->DDR |= mask;
port->CR1 |= mask;
port->CR2 |= mask;
break;
case PAL_MODE_OUTPUT_OPENDRAIN_SLOW:
port->DDR |= mask;
port->CR1 &= ~mask;
port->CR2 &= ~mask;
break;
case PAL_MODE_OUTPUT_OPENDRAIN:
port->DDR |= mask;
port->CR1 &= ~mask;
port->CR2 |= mask;
break;
}
}
#endif /* HAL_USE_PAL */
/** @} */

231
os/hal/platforms/STM8L/pal_lld.h Normal file
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@ -0,0 +1,231 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file STM8L/pal_lld.h
* @brief STM8L GPIO low level driver header.
*
* @addtogroup PAL
* @{
*/
#ifndef _PAL_LLD_H_
#define _PAL_LLD_H_
#if HAL_USE_PAL || defined(__DOXYGEN__)
/*===========================================================================*/
/* Unsupported modes and specific modes */
/*===========================================================================*/
#undef PAL_MODE_INPUT_PULLDOWN
/**
* @brief STM8L specific alternate push-pull slow output mode.
*/
#define PAL_MODE_OUTPUT_PUSHPULL_SLOW 16
/**
* @brief STM8L specific alternate open-drain slow output mode.
*/
#define PAL_MODE_OUTPUT_OPENDRAIN_SLOW 17
/*===========================================================================*/
/* I/O Ports Types and constants. */
/*===========================================================================*/
/**
* @brief Generic I/O ports static initializer.
* @details An instance of this structure must be passed to @p palInit() at
* system startup time in order to initialized the digital I/O
* subsystem. This represents only the initial setup, specific pads
* or whole ports can be reprogrammed at later time.
*/
typedef struct {
#if defined(STM8L15X_MD) || defined(__DOXYGEN__)
GPIO_TypeDef P[7];
#elif defined(STM8L15X_MDP) || defined(STM8L15X_HD)
GPIO_TypeDef P[9];
#endif
} PALConfig;
/**
* @brief Width, in bits, of an I/O port.
*/
#define PAL_IOPORTS_WIDTH 8
/**
* @brief Whole port mask.
* @brief This macro specifies all the valid bits into a port.
*/
#define PAL_WHOLE_PORT ((ioportmask_t)0xFF)
/**
* @brief Digital I/O port sized unsigned type.
*/
typedef uint8_t ioportmask_t;
/**
* @brief Port Identifier.
*/
typedef GPIO_TypeDef *ioportid_t;
/*===========================================================================*/
/* I/O Ports Identifiers. */
/*===========================================================================*/
/**
* @brief GPIO ports as a whole.
*/
#define IOPORTS ((PALConfig *)0x5000)
/**
* @brief GPIO port A identifier.
*/
#define IOPORT1 GPIOA
/**
* @brief GPIO port B identifier.
*/
#define IOPORT2 GPIOB
/**
* @brief GPIO port C identifier.
*/
#define IOPORT3 GPIOC
/**
* @brief GPIO port D identifier.
*/
#define IOPORT4 GPIOD
/**
* @brief GPIO port E identifier.
*/
#define IOPORT5 GPIOE
/**
* @brief GPIO port F identifier.
*/
#define IOPORT6 GPIOF
/**
* @brief GPIO port G identifier.
*/
#define IOPORT7 GPIOG
#if defined(STM8L15X_MDP) || defined(STM8L15X_HD)
/**
* @brief GPIO port H identifier.
*/
#define IOPORT8 GPIOH
/**
* @brief GPIO port I identifier.
*/
#define IOPORT9 GPIOI
#endif /* defined(STM8L15X_MDP) || defined(STM8L15X_HD) */
/*===========================================================================*/
/* Implementation, some of the following macros could be implemented as */
/* functions, if so please put them in pal_lld.c. */
/*===========================================================================*/
/**
* @brief Low level PAL subsystem initialization.
*
* @param[in] config architecture-dependent ports configuration
*
* @notapi
*/
#define pal_lld_init(config) *IOPORTS = *(config)
/**
* @brief Reads the physical I/O port states.
* @note This function is not meant to be invoked directly by the
* application code.
*
* @param[in] port port identifier
* @return The port bits.
*
* @notapi
*/
#define pal_lld_readport(port) ((port)->IDR)
/**
* @brief Reads the output latch.
* @details The purpose of this function is to read back the latched output
* value.
* @note This function is not meant to be invoked directly by the
* application code.
*
* @param[in] port port identifier
* @return The latched logical states.
*
* @notapi
*/
#define pal_lld_readlatch(port) ((port)->ODR)
/**
* @brief Writes a bits mask on a I/O port.
* @note This function is not meant to be invoked directly by the
* application code.
*
* @param[in] port port identifier
* @param[in] bits bits to be written on the specified port
*
* @notapi
*/
#define pal_lld_writeport(port, bits) ((port)->ODR = (bits))
/**
* @brief Pads group mode setup.
* @details This function programs a pads group belonging to the same port
* with the specified mode.
* @note This function is not meant to be invoked directly by the
* application code.
* @note Programming an unknown or unsupported mode is silently ignored.
*
* @param[in] port port identifier
* @param[in] mask group mask
* @param[in] mode group mode
*
* @notapi
*/
#define pal_lld_setgroupmode(port, mask, mode) \
_pal_lld_setgroupmode(port, mask, mode)
extern ROMCONST PALConfig pal_default_config;
#ifdef __cplusplus
extern "C" {
#endif
void _pal_lld_setgroupmode(ioportid_t port,
ioportmask_t mask,
uint_fast8_t mode);
#ifdef __cplusplus
}
#endif
#endif /* HAL_USE_PAL */
#endif /* _PAL_LLD_H_ */
/** @} */

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file STM8L/serial_lld.c
* @brief STM8L low level serial driver code.
*
* @addtogroup SERIAL
* @{
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_SERIAL || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/**
* @brief USART1 serial driver identifier.
*/
#if STM8L_SERIAL_USE_USART1 || defined(__DOXYGEN__)
SerialDriver SD1;
#endif
/**
* @brief USART2 serial driver identifier.
*/
#if STM8L_SERIAL_USE_USART2 || defined(__DOXYGEN__)
SerialDriver SD2;
#endif
/**
* @brief USART3 serial driver identifier.
*/
#if STM8L_SERIAL_USE_USART3 || defined(__DOXYGEN__)
SerialDriver SD3;
#endif
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
/**
* @brief Driver default configuration.
*/
static ROMCONST SerialConfig default_config = {
BBR(SERIAL_DEFAULT_BITRATE),
SD_MODE_PARITY_NONE | SD_MODE_STOP_1
};
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/**
* @brief USART initialization.
*
* @param[in] config architecture-dependent serial driver configuration
* @param[in] sdp pointer to a @p SerialDriver object
*/
static void usart_init(SerialDriver *sdp, const SerialConfig *config) {
USART_TypeDef *u = sdp->usart;
u->BRR2 = (uint8_t)(((uint8_t)(config->sc_brr >> 8) & (uint8_t)0xF0) |
((uint8_t)config->sc_brr & (uint8_t)0x0F));
u->BRR1 = (uint8_t)(config->sc_brr >> 4);
u->CR1 = (uint8_t)(config->sc_mode & SD_MODE_PARITY);
u->CR2 = USART_CR2_RIEN | USART_CR2_TEN | USART_CR2_REN;
u->CR3 = (uint8_t)(config->sc_mode & SD_MODE_STOP);
u->CR4 = 0;
u->CR5 = 0;
u->PSCR = 1;
(void)u->SR;
(void)u->DR;
}
/**
* @brief USART de-initialization.
*
* @param[in] sdp pointer to a @p SerialDriver object
*/
static void usart_deinit(SerialDriver *sdp) {
USART_TypeDef *u = sdp->usart;
u->CR1 = USART_CR1_USARTD;
u->CR2 = 0;
u->CR3 = 0;
u->CR4 = 0;
u->CR5 = 0;
u->PSCR = 0;
}
#if STM8L_SERIAL_USE_USART1 || defined(__DOXYGEN__)
static void notify1(void) {
USART1->CR2 |= USART_CR2_TIEN;
}
#endif /* STM8L_SERIAL_USE_USART1 */
#if STM8L_SERIAL_USE_USART2 || defined(__DOXYGEN__)
static void notify2(void) {
USART2->CR2 |= USART_CR2_TIEN;
}
#endif /* STM8L_SERIAL_USE_USART1 */
#if STM8L_SERIAL_USE_USART3 || defined(__DOXYGEN__)
static void notify3(void) {
USART3->CR2 |= USART_CR2_TIEN;
}
#endif /* STM8L_SERIAL_USE_USART3 */
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
/* See in serial_lld.h.*/
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Error handling routine.
*
* @param[in] sdp pointer to a @p SerialDriver object
* @param[in] sr USART SR register value
*
* @notapi
*/
void sd_lld_set_error(SerialDriver *sdp, uint8_t sr) {
sdflags_t sts = 0;
if (sr & USART_SR_OR)
sts |= SD_OVERRUN_ERROR;
if (sr & USART_SR_NF)
sts |= SD_NOISE_ERROR;
if (sr & USART_SR_FE)
sts |= SD_FRAMING_ERROR;
if (sr & USART_SR_PE)
sts |= SD_PARITY_ERROR;
chSysLockFromIsr();
sdAddFlagsI(sdp, sts);
chSysUnlockFromIsr();
}
/**
* @brief Low level serial driver initialization.
*
* @notapi
*/
void sd_lld_init(void) {
#if STM8L_SERIAL_USE_USART1
sdObjectInit(&SD1, NULL, notify1);
CLK->PCKENR1 |= CLK_PCKENR1_USART1; /* PCKEN12, clock source. */
USART1->CR1 = USART_CR1_USARTD; /* USARTD (low power). */
SD1.usart = USART1;
#endif
#if STM8L_SERIAL_USE_USART2
sdObjectInit(&SD2, NULL, notify2);
CLK->PCKENR1 |= CLK_PCKENR1_USART2; /* PCKEN13, clock source. */
USART2->CR1 = USART2_CR1_USARTD; /* USARTD (low power). */
SD1.usart = USART2;
#endif
#if STM8L_SERIAL_USE_USART3
sdObjectInit(&SD3, NULL, notify3);
CLK->PCKENR1 |= CLK_PCKENR1_USART3; /* PCKEN13, clock source. */
USART3->CR1 = USART3_CR1_USARTD; /* USARTD (low power). */
SD1.usart = USART3;
#endif
}
/**
* @brief Low level serial driver configuration and (re)start.
*
* @param[in] sdp pointer to a @p SerialDriver object
* @param[in] config the architecture-dependent serial driver configuration.
* If this parameter is set to @p NULL then a default
* configuration is used.
*
* @notapi
*/
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
if (config == NULL)
config = &default_config;
usart_init(sdp, config);
}
/**
* @brief Low level serial driver stop.
* @details De-initializes the USART, stops the associated clock, resets the
* interrupt vector.
*
* @param[in] sdp pointer to a @p SerialDriver object
*
* @notapi
*/
void sd_lld_stop(SerialDriver *sdp) {
usart_deinit(sdp);
}
#endif /* HAL_USE_SERIAL */
/** @} */

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@ -0,0 +1,266 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file STM8L/serial_lld.h
* @brief STM8L low level serial driver header.
*
* @addtogroup SERIAL
* @{
*/
#ifndef _SERIAL_LLD_H_
#define _SERIAL_LLD_H_
#if HAL_USE_SERIAL || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
#define SD_MODE_PARITY 0x07 /**< @brief Parity field mask. */
#define SD_MODE_PARITY_NONE 0x00 /**< @brief No parity. */
#define SD_MODE_PARITY_EVEN 0x05 /**< @brief Even parity. */
#define SD_MODE_PARITY_ODD 0x07 /**< @brief Odd parity. */
#define SD_MODE_STOP 0x30 /**< @brief Stop bits mask. */
#define SD_MODE_STOP_1 0x00 /**< @brief One stop bit. */
#define SD_MODE_STOP_2 0x20 /**< @brief Two stop bits. */
#define SD_MODE_STOP_1P5 0x30 /**< @brief 1.5 stop bits. */
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @brief USART1 driver enable switch.
* @details If set to @p TRUE the support for USART1 is included.
* @note The default is @p TRUE.
*/
#if !defined(STM8L_SERIAL_USE_USART1) || defined(__DOXYGEN__)
#define STM8L_SERIAL_USE_USART1 TRUE
#endif
/**
* @brief USART2 driver enable switch.
* @details If set to @p TRUE the support for USART3 is included.
* @note The default is @p TRUE.
*/
#if !defined(STM8L_SERIAL_USE_USART2) || defined(__DOXYGEN__)
#define STM8L_SERIAL_USE_USART2 TRUE
#endif
/**
* @brief USART3 driver enable switch.
* @details If set to @p TRUE the support for USART3 is included.
* @note The default is @p TRUE.
*/
#if !defined(STM8L_SERIAL_USE_USART3) || defined(__DOXYGEN__)
#define STM8L_SERIAL_USE_USART3 TRUE
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
#if defined(STM8L15X_MD) && \
(STM8L_SERIAL_USE_USART2 || STM8L_SERIAL_USE_USART3)
#error "STM8L15X_MD devices do not have USART2 and USART3"
#endif
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/**
* @brief Serial Driver condition flags type.
*/
typedef uint8_t sdflags_t;
/**
* @brief Generic Serial Driver configuration structure.
* @details An instance of this structure must be passed to @p sdStart()
* in order to configure and start a serial driver operations.
* @note This structure content is architecture dependent, each driver
* implementation defines its own version and the custom static
* initializers.
*/
typedef struct {
/**
* @brief Bit rate register.
*/
uint16_t sc_brr;
/**
* @brief Mode flags.
*/
uint8_t sc_mode;
} SerialConfig;
/**
* @brief @p SerialDriver specific data.
*/
#define _serial_driver_data \
_base_asynchronous_channel_data \
/* Driver state.*/ \
sdstate_t state; \
/* Input queue.*/ \
InputQueue iqueue; \
/* Output queue.*/ \
OutputQueue oqueue; \
/* Status Change @p EventSource.*/ \
EventSource sevent; \
/* I/O driver status flags.*/ \
sdflags_t flags; \
/* Input circular buffer.*/ \
uint8_t ib[SERIAL_BUFFERS_SIZE]; \
/* Output circular buffer.*/ \
uint8_t ob[SERIAL_BUFFERS_SIZE]; \
/* End of the mandatory fields.*/ \
USART_TypeDef *usart;
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/**
* @brief Macro for baud rate computation.
* @note Make sure the final baud rate is within tolerance.
*/
#define BBR(b) (SYSCLK / (b))
#if STM8L_SERIAL_USE_USART1 || defined(__DOXYGEN__)
/**
* @brief USART1 RX interrupt handler segment.
*/
#define _USART1_RECEIVE_ISR() { \
uint8_t sr = USART1->SR; \
if (sr & (USART_SR_RXNE | USART_SR_OR | USART_SR_NF | \
USART_SR_FE | USART_SR_PE)) { \
if (sr & (USART_SR_OR | USART_SR_NF | USART_SR_FE | USART_SR_PE)) \
sd_lld_set_error(&SD1, sr); \
chSysLockFromIsr(); \
sdIncomingDataI(&SD1, USART1->DR); \
chSysUnlockFromIsr(); \
} \
}
#define _USART1_TRANSMIT_ISR() { \
if (USART1->SR & USART_SR_TXE) { \
msg_t b; \
chSysLockFromIsr(); \
b = sdRequestDataI(&SD1); \
chSysUnlockFromIsr(); \
if (b < Q_OK) \
USART1->CR2 &= (uint8_t)~USART_CR2_TIEN; \
else \
USART1->DR = (uint8_t)b; \
} \
}
#endif /* STM8L_SERIAL_USE_USART1 */
#if STM8L_SERIAL_USE_USART2 || defined(__DOXYGEN__)
/**
* @brief USART1 RX interrupt handler segment.
*/
#define _USART2_RECEIVE_ISR() { \
uint8_t sr = USART2->SR; \
if (sr & (USART_SR_RXNE | USART_SR_OR | USART_SR_NF | \
USART_SR_FE | USART_SR_PE)) { \
if (sr & (USART_SR_OR | USART_SR_NF | USART_SR_FE | USART_SR_PE)) \
sd_lld_set_error(&SD2, sr); \
chSysLockFromIsr(); \
sdIncomingDataI(&SD2, USART2->DR); \
chSysUnlockFromIsr(); \
} \
}
#define _USART2_TRANSMIT_ISR() { \
if (USART2->SR & USART_SR_TXE) { \
msg_t b; \
chSysLockFromIsr(); \
b = sdRequestDataI(&SD2); \
chSysUnlockFromIsr(); \
if (b < Q_OK) \
USART2->CR2 &= (uint8_t)~USART_CR2_TIEN; \
else \
USART2->DR = (uint8_t)b; \
} \
}
#endif /* STM8L_SERIAL_USE_USART2 */
#if STM8L_SERIAL_USE_USART3 || defined(__DOXYGEN__)
/**
* @brief USART1 RX interrupt handler segment.
*/
#define _USART3_RECEIVE_ISR() { \
uint8_t sr = USART3->SR; \
if (sr & (USART_SR_RXNE | USART_SR_OR | USART_SR_NF | \
USART_SR_FE | USART_SR_PE)) { \
if (sr & (USART_SR_OR | USART_SR_NF | USART_SR_FE | USART_SR_PE)) \
sd_lld_set_error(&SD3, sr); \
chSysLockFromIsr(); \
sdIncomingDataI(&SD3, USART3->DR); \
chSysUnlockFromIsr(); \
} \
}
#define _USART3_TRANSMIT_ISR() { \
if (USART3->SR & USART_SR_TXE) { \
msg_t b; \
chSysLockFromIsr(); \
b = sdRequestDataI(&SD3); \
chSysUnlockFromIsr(); \
if (b < Q_OK) \
USART3->CR2 &= (uint8_t)~USART_CR2_TIEN; \
else \
USART3->DR = (uint8_t)b; \
} \
}
#endif /* STM8L_SERIAL_USE_USART3 */
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#if STM8L_SERIAL_USE_USART1 && !defined(__DOXYGEN__)
extern SerialDriver SD1;
#endif
#if STM8L_SERIAL_USE_USART2 && !defined(__DOXYGEN__)
extern SerialDriver SD2;
#endif
#if STM8L_SERIAL_USE_USART3 && !defined(__DOXYGEN__)
extern SerialDriver SD3;
#endif
#ifdef __cplusplus
extern "C" {
#endif
void sd_lld_init(void);
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config);
void sd_lld_stop(SerialDriver *sdp);
void sd_lld_set_error(SerialDriver *sdp, uint8_t sr);
#ifdef __cplusplus
}
#endif
#endif /* HAL_USE_SERIAL */
#endif /* _SERIAL_LLD_H_ */
/** @} */

188
os/hal/platforms/STM8L/shared_isr.c Normal file
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@ -0,0 +1,188 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file STM8L/shared_isr.c
* @brief STM8L shared interrupt code source.
* @details The STM8L shares some interrupt handlers among several sources.
* This module includes all the interrupt handlers that are
* used by more than one peripheral.
*
* @addtogroup HAL
* @{
*/
#include "ch.h"
#include "hal.h"
/* This inclusion allows user ISR to be added to the HAL.*/
#if defined(_USER_ISR_)
#include "user_isr.h"
#endif
#if defined(_TIM2_UPDATE_ISR) || defined(_USART2_TRANSMIT_ISR) || \
defined(__DOXYGEN__)
/**
* @brief IRQ 19 service routine.
* @details This handler is shared between the following sources:
* - TIM2 update/overflow/trigger/break.
* - USART2 transmit.
*
* @isr
*/
CH_IRQ_HANDLER(19) {
CH_IRQ_PROLOGUE();
#if defined(_TIM2_UPDATE_ISR)
_TIM2_UPDATE_ISR();
#endif
#if defined(_USART2_TRANSMIT_ISR)
_USART2_TRANSMIT_ISR();
#endif
CH_IRQ_EPILOGUE();
}
#endif /* defined(_TIM2_UPDATE_ISR) || defined(_USART2_TRANSMIT_ISR) */
#if defined(_TIM2_COMPARE_ISR) || defined(_USART2_RECEIVE_ISR) || \
defined(__DOXYGEN__)
/**
* @brief IRQ 20 service routine.
* @details This handler is shared between the following sources:
* - TIM2 compare/capture
* - USART2 receive.
* .
*
* @isr
*/
CH_IRQ_HANDLER(20) {
CH_IRQ_PROLOGUE();
#if defined(_TIM2_COMPARE_ISR)
_TIM2_COMPARE_ISR();
#endif
#if defined(_USART2_RECEIVE_ISR)
_USART2_RECEIVE_ISR();
#endif
CH_IRQ_EPILOGUE();
}
#endif /* defined(_TIM2_COMPARE_ISR) || defined(_USART2_RECEIVE_ISR) */
#if defined(_TIM3_UPDATE_ISR) || defined(_USART3_TRANSMIT_ISR) || \
defined(__DOXYGEN__)
/**
* @brief IRQ 21 service routine.
* @details This handler is shared between the following sources:
* - TIM3 update/overflow/trigger/break.
* - USART3 transmit.
* .
*
* @isr
*/
CH_IRQ_HANDLER(21) {
CH_IRQ_PROLOGUE();
#if defined(_TIM3_UPDATE_ISR)
_TIM3_UPDATE_ISR();
#endif
#if defined(_USART3_TRANSMIT_ISR)
_USART3_TRANSMIT_ISR();
#endif
CH_IRQ_EPILOGUE();
}
#endif /* defined(_TIM3_UPDATE_ISR) || defined(_USART3_TRANSMIT_ISR) */
#if defined(_TIM3_COMPARE_ISR) || defined(_USART3_RECEIVE_ISR) || \
defined(__DOXYGEN__)
/**
* @brief IRQ 22 service routine.
* @details This handler is shared between the following sources:
* - TIM3 compare/capture
* - USART3 receive.
* .
*
* @isr
*/
CH_IRQ_HANDLER(22) {
CH_IRQ_PROLOGUE();
#if defined(_TIM3_COMPARE_ISR)
_TIM3_COMPARE_ISR();
#endif
#if defined(_USART3_RECEIVE_ISR)
_USART3_RECEIVE_ISR();
#endif
CH_IRQ_EPILOGUE();
}
#endif /* defined(_TIM3_COMPARE_ISR) || defined(_USART3_RECEIVE_ISR) */
#if defined(_TIM5_UPDATE_ISR) || defined(_USART1_TRANSMIT_ISR) || \
defined(__DOXYGEN__)
/**
* @brief IRQ 27 service routine.
* @details This handler is shared between the following sources:
* - TIM5 update/overflow/trigger/break.
* - USART1 transmit.
* .
*
* @isr
*/
CH_IRQ_HANDLER(27) {
CH_IRQ_PROLOGUE();
#if defined(_TIM5_UPDATE_ISR)
_TIM5_UPDATE_ISR();
#endif
#if defined(_USART1_TRANSMIT_ISR)
_USART1_TRANSMIT_ISR();
#endif
CH_IRQ_EPILOGUE();
}
#endif /* defined(_TIM5_UPDATE_ISR) || defined(_USART1_TRANSMIT_ISR) */
#if defined(_TIM5_COMPARE_ISR) || defined(_USART1_RECEIVE_ISR) || \
defined(__DOXYGEN__)
/**
* @brief IRQ 28 service routine.
* @details This handler is shared between the following sources:
* - TIM5 compare/capture
* - USART1 receive.
* .
*
* @isr
*/
CH_IRQ_HANDLER(28) {
CH_IRQ_PROLOGUE();
#if defined(_TIM5_COMPARE_ISR)
_TIM5_COMPARE_ISR();
#endif
#if defined(_USART1_RECEIVE_ISR)
_USART1_RECEIVE_ISR();
#endif
CH_IRQ_EPILOGUE();
}
#endif /* defined(_TIM5_COMPARE_ISR) || defined(_USART1_RECEIVE_ISR) */
/** @} */

15
todo.txt
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@ -43,12 +43,15 @@ N Evaluate if to add a synchronous API to the UART driver, eventually do so.
* Remove preprocessor directives from the assembler files and restore the
RIDE7 build files in the STM32 demo.
- Evaluate moving dynamic APIs into a separate source file.
- STM8L official HAL support, it will have to be separated from the STM8S/STM8A
HAL because it is very different, actually it looks much more like a
mini STM32, most STM32 drivers will only require few changes it also has
a very similar DMA (waiting for the new STM8L-Discovery kit).
- Add the STM32VL to the official STM32 HAL support (waiting for the new
STM32-Discovery kit).
X STM8L official HAL support, it will have to be separated from the STM8S/STM8A
HAL because it is very different.
X Shared ISR management.
- Shared DMA management.
X STM8L-Discovery demo.
- Realign the STM8 port to the new STM8L one as options, naming conventions
and general solutions.
X Add the STM32F100 (Value Line) to the official STM32 HAL support.
- STM32VL-Discovery demo.
X Except for the above, bug fixing only until the 2.2.0 release.
Within 2.3.x (hopefully)