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Documentation improvements, fixed a small error in the STM32 serial driver. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2234 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
gdisirio 2010-10-04 17:16:18 +00:00
parent 7f61cb948c
commit 2891f7d645
87 changed files with 1431 additions and 457 deletions
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20
os/hal/hal.dox
View File

@ -113,6 +113,8 @@
* in order to support specific features but, of course, the use of such
* interfaces would not be portable. Such interfaces shall be marked with
* the architecture name inside the function names.
* @pre In order to use the ADC driver the @p CH_HAL_USE_PAL option
* must be enabled in @p halconf.h.
*
* @section pal_1 Implementation Rules
* In implementing an @ref PAL_LLD there are some rules/behaviors that
@ -169,6 +171,8 @@
* events.<br>
* The module also contains functions that make the implementation of the
* interrupt service routines much easier.
* @pre In order to use the ADC driver the @p CH_HAL_USE_SERIAL option
* must be enabled in @p halconf.h.
*
* @ingroup IO
*/
@ -187,6 +191,8 @@
* @defgroup I2C I2C Driver
* @brief Generic I2C Driver.
* @details This module implements a generic I2C driver.
* @pre In order to use the ADC driver the @p CH_HAL_USE_I2C option
* must be enabled in @p halconf.h.
*
* @section i2c_1 Driver State Machine
* The driver implements a state machine internally, not all the driver
@ -218,6 +224,8 @@
* @defgroup SPI SPI Driver
* @brief Generic SPI Driver.
* @details This module implements a generic SPI driver.
* @pre In order to use the ADC driver the @p CH_HAL_USE_SPI option
* must be enabled in @p halconf.h.
*
* @section spi_1 Driver State Machine
* The driver implements a state machine internally, not all the driver
@ -293,6 +301,8 @@
* @defgroup ADC ADC Driver
* @brief Generic ADC Driver.
* @details This module implements a generic ADC driver.
* @pre In order to use the ADC driver the @p CH_HAL_USE_ADC option
* must be enabled in @p halconf.h.
*
* @section adc_1 Driver State Machine
* The driver implements a state machine internally, not all the driver
@ -375,6 +385,8 @@
* @defgroup CAN CAN Driver
* @brief Generic CAN Driver.
* @details This module implements a generic ADC driver.
* @pre In order to use the ADC driver the @p CH_HAL_USE_CAN option
* must be enabled in @p halconf.h.
*
* @section can_1 Driver State Machine
* The driver implements a state machine internally, not all the driver
@ -445,6 +457,8 @@
* @defgroup PWM PWM Driver
* @brief Generic PWM Driver.
* @details This module implements a generic PWM driver.
* @pre In order to use the ADC driver the @p CH_HAL_USE_PWM option
* must be enabled in @p halconf.h.
*
* @section pwm_1 Driver State Machine
* The driver implements a state machine internally, not all the driver
@ -485,6 +499,8 @@
* @brief Generic MAC driver.
* @details This module implements a generic interface for MAC (Media
* Access Control) drivers, as example Ethernet controllers.
* @pre In order to use the ADC driver the @p CH_HAL_USE_MAC option
* must be enabled in @p halconf.h.
*
* @ingroup IO
*/
@ -504,6 +520,8 @@
* @brief Generic MMC driver.
* @details This module implements a portable MMC driver that uses a SPI
* driver as physical layer.
* @pre In order to use the ADC driver the @p CH_HAL_USE_MMC_SPI option
* must be enabled in @p halconf.h.
*
* @section mmc_spi_1 Driver State Machine
* The driver implements a state machine internally, not all the driver
@ -623,6 +641,8 @@
* .
* If your application requires a synchronoyus buffered driver then the
* @ref SERIAL should be used instead.
* @pre In order to use the ADC driver the @p CH_HAL_USE_UART option
* must be enabled in @p halconf.h.
*
* @section uart_1 Driver State Machine
* The driver implements a state machine internally, not all the driver

2
os/hal/include/can.h
View File

@ -100,6 +100,8 @@ typedef enum {
*
* @param[in] canp pointer to the @p CANDriver object
* @param[in] mask flags to be added to the status mask
*
* @iclass
*/
#define canAddFlagsI(canp, mask) ((canp)->cd_status |= (mask))

6
os/hal/include/mac.h
View File

@ -60,6 +60,8 @@
*
* @param[in] macp pointer to the @p MACDriver object
* @return The pointer to the @p EventSource structure.
*
* @api
*/
#if CH_USE_EVENTS || defined(__DOXYGEN__)
#define macGetReceiveEventSource(macp) (&(macp)->md_rdevent)
@ -75,6 +77,8 @@
* stream, this value can be less than the amount
* specified in the parameter @p size if the maximum frame
* size is reached.
*
* @api
*/
#define macWriteTransmitDescriptor(tdp, buf, size) \
mac_lld_write_transmit_descriptor(tdp, buf, size)
@ -88,6 +92,8 @@
* @return The number of bytes read from the descriptor's stream, this
* value can be less than the amount specified in the
* parameter @p size if there are no more bytes to read.
*
* @api
*/
#define macReadReceiveDescriptor(rdp, buf, size) \
mac_lld_read_receive_descriptor(rdp, buf, size)

12
os/hal/include/mmc_spi.h
View File

@ -181,11 +181,23 @@ typedef struct {
/**
* @brief Returns the driver state.
*
* @param[in] mmcp pointer to the @p MMCDriver object
* @return The driver state.
*
* @api
*/
#define mmcGetDriverState(mmcp) ((mmcp)->mmc_state)
/**
* @brief Returns the write protect status.
*
* @param[in] mmcp pointer to the @p MMCDriver object
* @return The card state.
* @retval FALSE card not inserted.
* @retval TRUE card inserted.
*
* @api
*/
#define mmcIsWriteProtected(mmcp) ((mmcp)->mmc_is_protected())

29
os/hal/include/pal.h
View File

@ -189,6 +189,8 @@ typedef struct {
* @param[in] config pointer to an architecture specific configuration
* structure. This structure is defined in the low level driver
* header.
*
* @init
*/
#define palInit(config) pal_lld_init(config)
@ -199,6 +201,8 @@ typedef struct {
*
* @param[in] port port identifier
* @return The port logical states.
*
* @api
*/
#if !defined(pal_lld_readport) || defined(__DOXYGEN__)
#define palReadPort(port) ((void)(port), 0)
@ -215,6 +219,8 @@ typedef struct {
*
* @param[in] port port identifier
* @return The latched logical states.
*
* @api
*/
#if !defined(pal_lld_readlatch) || defined(__DOXYGEN__)
#define palReadLatch(port) ((void)(port), 0)
@ -229,6 +235,8 @@ typedef struct {
*
* @param[in] port port identifier
* @param[in] bits bits to be written on the specified port
*
* @api
*/
#if !defined(pal_lld_writeport) || defined(__DOXYGEN__)
#define palWritePort(port, bits) ((void)(port), (void)(bits))
@ -248,6 +256,8 @@ typedef struct {
*
* @param[in] port port identifier
* @param[in] bits bits to be ORed on the specified port
*
* @api
*/
#if !defined(pal_lld_setport) || defined(__DOXYGEN__)
#define palSetPort(port, bits) { \
@ -270,6 +280,7 @@ typedef struct {
* @param[in] port port identifier
* @param[in] bits bits to be cleared on the specified port
*
* @api
*/
#if !defined(pal_lld_clearport) || defined(__DOXYGEN__)
#define palClearPort(port, bits) { \
@ -291,6 +302,8 @@ typedef struct {
*
* @param[in] port port identifier
* @param[in] bits bits to be XORed on the specified port
*
* @api
*/
#if !defined(pal_lld_toggleport) || defined(__DOXYGEN__)
#define palTogglePort(port, bits) { \
@ -308,6 +321,8 @@ typedef struct {
* data
* @param[in] offset group bit offset within the port
* @return The group logical states.
*
* @api
*/
#if !defined(pal_lld_readgroup) || defined(__DOXYGEN__)
#define palReadGroup(port, mask, offset) \
@ -325,6 +340,8 @@ typedef struct {
* @param[in] offset group bit offset within the port
* @param[in] bits bits to be written. Values exceeding the group
* width are masked.
*
* @api
*/
#if !defined(pal_lld_writegroup) || defined(__DOXYGEN__)
#define palWriteGroup(port, mask, offset, bits) { \
@ -347,6 +364,7 @@ typedef struct {
* @param[in] mask group mask
* @param[in] mode group mode
*
* @api
*/
#if !defined(pal_lld_setgroupmode) || defined(__DOXYGEN__)
#define palSetGroupMode(port, mask, mode)
@ -367,6 +385,7 @@ typedef struct {
* @retval PAL_LOW low logical state.
* @retval PAL_HIGH high logical state.
*
* @api
*/
#if !defined(pal_lld_readpad) || defined(__DOXYGEN__)
#define palReadPad(port, pad) ((palReadPort(port) >> (pad)) & 1)
@ -390,6 +409,8 @@ typedef struct {
* @param[in] pad pad number within the port
* @param[in] bit logical value, the value must be @p PAL_LOW or
* @p PAL_HIGH
*
* @api
*/
#if !defined(pal_lld_writepad) || defined(__DOXYGEN__)
#define palWritePad(port, pad, bit) { \
@ -413,6 +434,8 @@ typedef struct {
*
* @param[in] port port identifier
* @param[in] pad pad number within the port
*
* @api
*/
#if !defined(pal_lld_setpad) || defined(__DOXYGEN__)
#define palSetPad(port, pad) palSetPort(port, PAL_PORT_BIT(pad))
@ -433,6 +456,8 @@ typedef struct {
*
* @param[in] port port identifier
* @param[in] pad pad number within the port
*
* @api
*/
#if !defined(pal_lld_clearpad) || defined(__DOXYGEN__)
#define palClearPad(port, pad) palClearPort(port, PAL_PORT_BIT(pad))
@ -453,6 +478,8 @@ typedef struct {
*
* @param[in] port port identifier
* @param[in] pad pad number within the port
*
* @api
*/
#if !defined(pal_lld_togglepad) || defined(__DOXYGEN__)
#define palTogglePad(port, pad) palTogglePort(port, PAL_PORT_BIT(pad))
@ -472,6 +499,8 @@ typedef struct {
* @param[in] port port identifier
* @param[in] pad pad number within the port
* @param[in] mode pad mode
*
* @api
*/
#if !defined(pal_lld_setpadmode) || defined(__DOXYGEN__)
#define palSetPadMode(port, pad, mode) \

4
os/hal/include/pwm.h
View File

@ -86,6 +86,8 @@ typedef void (*pwmcallback_t)(void);
* @param[in] pwmp pointer to a @p PWMDriver object
* @param[in] channel PWM channel identifier
* @param[in] width PWM pulse width as clock pulses number
*
* @iclass
*/
#define pwmEnableChannelI(pwmp, channel, width) { \
pwm_lld_enable_channel(pwmp, channel, width); \
@ -99,6 +101,8 @@ typedef void (*pwmcallback_t)(void);
*
* @param[in] pwmp pointer to a @p PWMDriver object
* @param[in] channel PWM channel identifier
*
* @iclass
*/
#define pwmDisableChannelI(pwmp, channel) { \
pwm_lld_disable_channel(pwmp, channel); \

56
os/hal/include/serial.h
View File

@ -135,71 +135,85 @@ struct SerialDriver {
/**
* @brief Direct output check on a @p SerialDriver.
* @details This function bypasses the indirect access to the channel and
* @note This function bypasses the indirect access to the channel and
* checks directly the output queue. This is faster but cannot
* be used to check different channels implementations.
*
* @see chIOPutWouldBlock()
*
* @api
*/
#define sdPutWouldBlock(sdp) chOQIsFull(&(sdp)->oqueue)
/**
* @brief Direct input check on a @p SerialDriver.
* @details This function bypasses the indirect access to the channel and
* @note This function bypasses the indirect access to the channel and
* checks directly the input queue. This is faster but cannot
* be used to check different channels implementations.
*
* @see chIOGetWouldBlock()
*
* @api
*/
#define sdGetWouldBlock(sdp) chIQIsEmpty(&(sdp)->iqueue)
/**
* @brief Direct write to a @p SerialDriver.
* @details This function bypasses the indirect access to the channel and
* @note This function bypasses the indirect access to the channel and
* writes directly on the output queue. This is faster but cannot
* be used to write to different channels implementations.
*
* @see chIOPut()
*
* @api
*/
#define sdPut(sdp, b) chOQPut(&(sdp)->oqueue, b)
/**
* @brief Direct write to a @p SerialDriver with timeout specification.
* @details This function bypasses the indirect access to the channel and
* @note This function bypasses the indirect access to the channel and
* writes directly on the output queue. This is faster but cannot
* be used to write to different channels implementations.
*
* @see chIOPutTimeout()
*
* @api
*/
#define sdPutTimeout(sdp, b, t) chOQPutTimeout(&(sdp)->iqueue, b, t)
/**
* @brief Direct read from a @p SerialDriver.
* @details This function bypasses the indirect access to the channel and
* @note This function bypasses the indirect access to the channel and
* reads directly from the input queue. This is faster but cannot
* be used to read from different channels implementations.
*
* @see chIOGet()
*
* @api
*/
#define sdGet(sdp) chIQGet(&(sdp)->iqueue)
/**
* @brief Direct read from a @p SerialDriver with timeout specification.
* @details This function bypasses the indirect access to the channel and
* @note This function bypasses the indirect access to the channel and
* reads directly from the input queue. This is faster but cannot
* be used to read from different channels implementations.
*
* @see chIOGetTimeout()
*
* @api
*/
#define sdGetTimeout(sdp, t) chIQGetTimeout(&(sdp)->iqueue, t)
/**
* @brief Direct blocking write to a @p SerialDriver.
* @details This function bypasses the indirect access to the channel and
* @note This function bypasses the indirect access to the channel and
* writes directly to the output queue. This is faster but cannot
* be used to write from different channels implementations.
*
* @see chIOWriteTimeout()
*
* @api
*/
#define sdWrite(sdp, b, n) \
chOQWriteTimeout(&(sdp)->oqueue, b, n, TIME_INFINITE)
@ -207,33 +221,39 @@ struct SerialDriver {
/**
* @brief Direct blocking write to a @p SerialDriver with timeout
* specification.
* @details This function bypasses the indirect access to the channel and
* @note This function bypasses the indirect access to the channel and
* writes directly to the output queue. This is faster but cannot
* be used to write from different channels implementations.
* be used to write to different channels implementations.
*
* @see chIOWriteTimeout()
*
* @api
*/
#define sdWriteTimeout(sdp, b, n, t) \
chOQWriteTimeout(&(sdp)->oqueue, b, n, t)
/**
* @brief Direct non-blocking write to a @p SerialDriver.
* @details This function bypasses the indirect access to the channel and
* @note This function bypasses the indirect access to the channel and
* writes directly to the output queue. This is faster but cannot
* be used to write from different channels implementations.
* be used to write to different channels implementations.
*
* @see chIOWriteTimeout()
*
* @api
*/
#define sdAsynchronousWrite(sdp, b, n) \
chOQWriteTimeout(&(sdp)->oqueue, b, n, TIME_IMMEDIATE)
/**
* @brief Direct blocking read from a @p SerialDriver.
* @details This function bypasses the indirect access to the channel and
* @note This function bypasses the indirect access to the channel and
* reads directly from the input queue. This is faster but cannot
* be used to read from different channels implementations.
*
* @see chIOReadTimeout()
*
* @api
*/
#define sdRead(sdp, b, n) \
chIQReadTimeout(&(sdp)->iqueue, b, n, TIME_INFINITE)
@ -241,22 +261,26 @@ struct SerialDriver {
/**
* @brief Direct blocking read from a @p SerialDriver with timeout
* specification.
* @details This function bypasses the indirect access to the channel and
* @note This function bypasses the indirect access to the channel and
* reads directly from the input queue. This is faster but cannot
* be used to read from different channels implementations.
*
* @see chIOReadTimeout()
*
* @api
*/
#define sdReadTimeout(sdp, b, n, t) \
chIQReadTimeout(&(sdp)->iqueue, b, n, t)
/**
* @brief Direct non-blocking read from a @p SerialDriver.
* @details This function bypasses the indirect access to the channel and
* @note This function bypasses the indirect access to the channel and
* reads directly from the input queue. This is faster but cannot
* be used to read from different channels implementations.
*
* @see chIOReadTimeout()
*
* @api
*/
#define sdAsynchronousRead(sdp, b, n) \
chIQReadTimeout(&(sdp)->iqueue, b, n, TIME_IMMEDIATE)
@ -265,10 +289,12 @@ struct SerialDriver {
* @brief Returns the status change event source.
* @details The status change event source is broadcasted when the channel
* status is updated, the status flags can then be fetched and
* cheared by using @p sdGetAndClearFlags().
* cleared by using @p sdGetAndClearFlags().
*
* @param[in] ip pointer to a @p SerialDriver object
* @return A pointer to an @p EventSource object.
*
* @api
*/
#define sdGetStatusChangeEventSource(ip) (&((ip)->vmt->sevent))

35
os/hal/platforms/AT91SAM7/at91sam7_mii.c
View File

@ -18,8 +18,9 @@
*/
/**
* @file AT91SAM7/at91sam7_mii.c
* @brief AT91SAM7 low level MII driver code.
* @file AT91SAM7/at91sam7_mii.c
* @brief AT91SAM7 low level MII driver code.
*
* @addtogroup AT91SAM7_MII
* @{
*/
@ -51,16 +52,20 @@
/*===========================================================================*/
/**
* @brief Low level MII driver initialization.
* @brief Low level MII driver initialization.
*
* @notapi
*/
void miiInit(void) {
}
/**
* @brief Resets a PHY device.
* @brief Resets a PHY device.
*
* @param[in] macp pointer to the @p MACDriver object
* @param[in] macp pointer to the @p MACDriver object
*
* @notapi
*/
void miiReset(MACDriver *macp) {
@ -94,11 +99,13 @@ void miiReset(MACDriver *macp) {
}
/**
* @brief Reads a PHY register through the MII interface.
* @brief Reads a PHY register through the MII interface.
*
* @param[in] macp pointer to the @p MACDriver object
* @param addr the register address
* @return The register value.
* @param[in] macp pointer to the @p MACDriver object
* @param[in] addr the register address
* @return The register value.
*
* @notapi
*/
phyreg_t miiGet(MACDriver *macp, phyaddr_t addr) {
@ -114,11 +121,13 @@ phyreg_t miiGet(MACDriver *macp, phyaddr_t addr) {
}
/**
* @brief Writes a PHY register through the MII interface.
* @brief Writes a PHY register through the MII interface.
*
* @param[in] macp pointer to the @p MACDriver object
* @param addr the register address
* @param value the new register value
* @param[in] macp pointer to the @p MACDriver object
* @param[in] addr the register address
* @param[in] value the new register value
*
* @notapi
*/
void miiPut(MACDriver *macp, phyaddr_t addr, phyreg_t value) {

13
os/hal/platforms/AT91SAM7/at91sam7_mii.h
View File

@ -18,8 +18,9 @@
*/
/**
* @file AT91SAM7/at91sam7_mii.h
* @brief AT91SAM7 low level MII driver header.
* @file AT91SAM7/at91sam7_mii.h
* @brief AT91SAM7 low level MII driver header.
*
* @addtogroup AT91SAM7_MII
* @{
*/
@ -41,7 +42,7 @@
/*===========================================================================*/
/**
* @brief PHY manufacturer and model.
* @brief PHY manufacturer and model.
*/
#if !defined(PHY_HARDWARE) || defined(__DOXYGEN__)
#define PHY_HARDWARE PHY_MICREL_KS8721
@ -52,7 +53,7 @@
/*===========================================================================*/
/**
* @brief Pins latched by the PHY at reset.
* @brief Pins latched by the PHY at reset.
*/
#if PHY_HARDWARE == PHY_MICREL_KS8721
#define PHY_ADDRESS 1
@ -78,12 +79,12 @@
/*===========================================================================*/
/**
* @brief Type of a PHY register value.
* @brief Type of a PHY register value.
*/
typedef uint16_t phyreg_t;
/**
* @brief Type of a PHY register address.
* @brief Type of a PHY register address.
*/
typedef uint8_t phyaddr_t;

18
os/hal/platforms/AT91SAM7/hal_lld.c
View File

@ -18,8 +18,9 @@
*/
/**
* @file AT91SAM7/hal_lld.c
* @brief AT91SAM7 HAL subsystem low level driver source.
* @file AT91SAM7/hal_lld.c
* @brief AT91SAM7 HAL subsystem low level driver source.
*
* @addtogroup AT91SAM7_HAL
* @{
*/
@ -36,7 +37,7 @@
/*===========================================================================*/
/**
* @brief PAL setup.
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
*/
const PALConfig pal_default_config =
@ -72,7 +73,9 @@ static CH_IRQ_HANDLER(spurious_handler) {
/*===========================================================================*/
/**
* @brief Low level HAL driver initialization.
* @brief Low level HAL driver initialization.
*
* @notapi
*/
void hal_lld_init(void) {
unsigned i;
@ -93,8 +96,11 @@ void hal_lld_init(void) {
}
/**
* @brief AT91SAM7 clocks and PLL initialization.
* @note All the involved constants come from the file @p board.h.
* @brief AT91SAM7 clocks and PLL initialization.
* @note All the involved constants come from the file @p board.h.
* @note This function must be invoked only after the system reset.
*
* @special
*/
void at91sam7_clock_init(void) {

9
os/hal/platforms/AT91SAM7/hal_lld.h
View File

@ -18,8 +18,9 @@
*/
/**
* @file AT91SAM7/hal_lld.h
* @brief AT91SAM7 HAL subsystem low level driver header.
* @file AT91SAM7/hal_lld.h
* @brief AT91SAM7 HAL subsystem low level driver header.
*
* @addtogroup AT91SAM7_HAL
* @{
*/
@ -44,14 +45,14 @@
/*===========================================================================*/
/**
* @brief Default action for the spurious handler, nothing.
* @brief Default action for the spurious handler, nothing.
*/
#if !defined(AT91SAM7_SPURIOUS_HANDLER_HOOK) || defined(__DOXYGEN__)
#define AT91SAM7_SPURIOUS_HANDLER_HOOK()
#endif
/**
* @brief Default divider for the USB clock - half the PLL clock.
* @brief Default divider for the USB clock - half the PLL clock.
*/
#if !defined(AT91SAM7_USBDIV) || defined(__DOXYGEN__)
#define AT91SAM7_USBDIV AT91C_CKGR_USBDIV_1

125
os/hal/platforms/AT91SAM7/mac_lld.c
View File

@ -18,8 +18,9 @@
*/
/**
* @file AT91SAM7/mac_lld.c
* @brief AT91SAM7 low level MAC driver code.
* @file AT91SAM7/mac_lld.c
* @brief AT91SAM7 low level MAC driver code.
*
* @addtogroup AT91SAM7_MAC
* @{
*/
@ -53,7 +54,7 @@
/*===========================================================================*/
/**
* @brief Ethernet driver 1.
* @brief Ethernet driver 1.
*/
MACDriver ETH1;
@ -83,7 +84,7 @@ static uint8_t tb[EMAC_TRANSMIT_DESCRIPTORS * EMAC_TRANSMIT_BUFFERS_SIZE]
/*===========================================================================*/
/**
* @brief IRQ handler.
* @brief IRQ handler.
*/
/** @cond never*/
__attribute__((noinline))
@ -120,8 +121,9 @@ static void serve_interrupt(void) {
}
/**
* @brief Cleans an incomplete frame.
* @param from the start position of the incomplete frame
* @brief Cleans an incomplete frame.
*
* @param[in] from the start position of the incomplete frame
*/
static void cleanup(EMACDescriptor *from) {
@ -137,7 +139,9 @@ static void cleanup(EMACDescriptor *from) {
/*===========================================================================*/
/**
* @brief EMAC IRQ veneer handler.
* @brief EMAC IRQ handler.
*
* @isr
*/
CH_IRQ_HANDLER(irq_handler) {
@ -153,7 +157,9 @@ CH_IRQ_HANDLER(irq_handler) {
/*===========================================================================*/
/**
* @brief Low level MAC initialization.
* @brief Low level MAC initialization.
*
* @notapi
*/
void mac_lld_init(void) {
unsigned i;
@ -228,13 +234,15 @@ void mac_lld_init(void) {
}
/**
* @brief Low level MAC address setup.
* @brief Low level MAC address setup.
*
* @param[in] macp pointer to the @p MACDriver object
* @param[in] p pointer to a six bytes buffer containing the MAC address. If
* this parameter is set to @p NULL then a system default MAC is
* used. The MAC address must be aligned with the most significant
* byte first.
* @param[in] macp pointer to the @p MACDriver object
* @param[in] p pointer to a six bytes buffer containing the MAC
* address. If this parameter is set to @p NULL then
* a system default MAC is used. The MAC address must
* be aligned with the most significant byte first.
*
* @notapi
*/
void mac_lld_set_address(MACDriver *macp, const uint8_t *p) {
@ -245,15 +253,17 @@ void mac_lld_set_address(MACDriver *macp, const uint8_t *p) {
}
/**
* @brief Returns a transmission descriptor.
* @brief Returns a transmission descriptor.
* @details One of the available transmission descriptors is locked and
* returned.
*
* @param[in] macp pointer to the @p MACDriver object
* @param[out] tdp pointer to a @p MACTransmitDescriptor structure
* @return The operation status.
* @retval RDY_OK the descriptor was obtained.
* @retval RDY_TIMEOUT descriptor not available.
* @param[in] macp pointer to the @p MACDriver object
* @param[out] tdp pointer to a @p MACTransmitDescriptor structure
* @return The operation status.
* @retval RDY_OK the descriptor has been obtained.
* @retval RDY_TIMEOUT descriptor not available.
*
* @notapi
*/
msg_t max_lld_get_transmit_descriptor(MACDriver *macp,
MACTransmitDescriptor *tdp) {
@ -288,14 +298,18 @@ msg_t max_lld_get_transmit_descriptor(MACDriver *macp,
}
/**
* @brief Writes to a transmit descriptor's stream.
* @brief Writes to a transmit descriptor's stream.
*
* @param[in] tdp pointer to a @p MACTransmitDescriptor structure
* @param[in] buf pointer to the buffer cointaining the data to be written
* @param[in] size number of bytes to be written
* @return The number of bytes written into the descriptor's stream, this
* value can be less than the amount specified in the parameter
* @p size if the maximum frame size is reached.
* @param[in] tdp pointer to a @p MACTransmitDescriptor structure
* @param[in] buf pointer to the buffer cointaining the data to be
* written
* @param[in] size number of bytes to be written
* @return The number of bytes written into the descriptor's
* stream, this value can be less than the amount
* specified in the parameter @p size if the maximum
* frame size is reached.
*
* @notapi
*/
size_t mac_lld_write_transmit_descriptor(MACTransmitDescriptor *tdp,
uint8_t *buf,
@ -313,10 +327,12 @@ size_t mac_lld_write_transmit_descriptor(MACTransmitDescriptor *tdp,
}
/**
* @brief Releases a transmit descriptor and starts the transmission of the
* enqueued data as a single frame.
* @brief Releases a transmit descriptor and starts the transmission of the
* enqueued data as a single frame.
*
* @param[in] tdp the pointer to the @p MACTransmitDescriptor structure
* @param[in] tdp the pointer to the @p MACTransmitDescriptor structure
*
* @notapi
*/
void mac_lld_release_transmit_descriptor(MACTransmitDescriptor *tdp) {
@ -329,13 +345,15 @@ void mac_lld_release_transmit_descriptor(MACTransmitDescriptor *tdp) {
}
/**
* @brief Returns a receive descriptor.
* @brief Returns a receive descriptor.
*
* @param[in] macp pointer to the @p MACDriver object
* @param[out] rdp pointer to a @p MACReceiveDescriptor structure
* @return The operation status.
* @retval RDY_OK the descriptor was obtained.
* @retval RDY_TIMEOUT descriptor not available.
* @param[in] macp pointer to the @p MACDriver object
* @param[out] rdp pointer to a @p MACReceiveDescriptor structure
* @return The operation status.
* @retval RDY_OK the descriptor has been obtained.
* @retval RDY_TIMEOUT descriptor not available.
*
* @notapi
*/
msg_t max_lld_get_receive_descriptor(MACDriver *macp,
MACReceiveDescriptor *rdp) {
@ -402,14 +420,17 @@ restart:
}
/**
* @brief Reads from a receive descriptor's stream.
* @brief Reads from a receive descriptor's stream.
*
* @param[in] rdp pointer to a @p MACReceiveDescriptor structure
* @param[in] buf pointer to the buffer that will receive the read data
* @param[in] size number of bytes to be read
* @return The number of bytes read from the descriptor's stream, this
* value can be less than the amount specified in the parameter
* @p size if there are no more bytes to read.
* @param[in] rdp pointer to a @p MACReceiveDescriptor structure
* @param[in] buf pointer to the buffer that will receive the read data
* @param[in] size number of bytes to be read
* @return The number of bytes read from the descriptor's
* stream, this value can be less than the amount
* specified in the parameter @p size if there are
* no more bytes to read.
*
* @notapi
*/
size_t mac_lld_read_receive_descriptor(MACReceiveDescriptor *rdp,
uint8_t *buf,
@ -434,11 +455,13 @@ size_t mac_lld_read_receive_descriptor(MACReceiveDescriptor *rdp,
}
/**
* @brief Releases a receive descriptor.
* @brief Releases a receive descriptor.
* @details The descriptor and its buffer are made available for more incoming
* frames.
*
* @param[in] rdp the pointer to the @p MACReceiveDescriptor structure
* @param[in] rdp the pointer to the @p MACReceiveDescriptor structure
*
* @notapi
*/
void mac_lld_release_receive_descriptor(MACReceiveDescriptor *rdp) {
bool_t done;
@ -464,12 +487,14 @@ void mac_lld_release_receive_descriptor(MACReceiveDescriptor *rdp) {
}
/**
* @brief Updates and returns the link status.
* @brief Updates and returns the link status.
*
* @param[in] macp pointer to the @p MACDriver object
* @return The link status.
* @retval TRUE if the link is active.
* @retval FALSE if the link is down.
* @param[in] macp pointer to the @p MACDriver object
* @return The link status.
* @retval TRUE if the link is active.
* @retval FALSE if the link is down.
*
* @notapi
*/
bool_t mac_lld_poll_link_status(MACDriver *macp) {
uint32_t ncfgr, bmsr, bmcr, lpa;

23
os/hal/platforms/AT91SAM7/mac_lld.h
View File

@ -18,8 +18,9 @@
*/
/**
* @file AT91SAM7/mac_lld.h
* @brief AT91SAM7 low level MAC driver header.
* @file AT91SAM7/mac_lld.h
* @brief AT91SAM7 low level MAC driver header.
*
* @addtogroup AT91SAM7_MAC
* @{
*/
@ -81,28 +82,28 @@
/*===========================================================================*/
/**
* @brief Number of available transmit buffers.
* @brief Number of available transmit buffers.
*/
#if !defined(MAC_TRANSMIT_BUFFERS) || defined(__DOXYGEN__)
#define MAC_TRANSMIT_BUFFERS 2
#endif
/**
* @brief Number of available receive buffers.
* @brief Number of available receive buffers.
*/
#if !defined(MAC_RECEIVE_BUFFERS) || defined(__DOXYGEN__)
#define MAC_RECEIVE_BUFFERS 2
#endif
/**
* @brief Maximum supported frame size.
* @brief Maximum supported frame size.
*/
#if !defined(MAC_BUFFERS_SIZE) || defined(__DOXYGEN__)
#define MAC_BUFFERS_SIZE 1518
#endif
/**
* @brief Interrupt priority level for the EMAC device.
* @brief Interrupt priority level for the EMAC device.
*/
#if !defined(EMAC_INTERRUPT_PRIORITY) || defined(__DOXYGEN__)
#define EMAC_INTERRUPT_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 3)
@ -117,8 +118,8 @@
/*===========================================================================*/
/**
* @brief Structure representing a buffer physical descriptor.
* @note It represents both descriptor types.
* @brief Structure representing a buffer physical descriptor.
* @note It represents both descriptor types.
*/
typedef struct {
uint32_t w1;
@ -126,7 +127,7 @@ typedef struct {
} EMACDescriptor;
/**
* @brief Structure representing a MAC driver.
* @brief Structure representing a MAC driver.
*/
typedef struct {
Semaphore md_tdsem; /**< Transmit semaphore. */
@ -138,7 +139,7 @@ typedef struct {
} MACDriver;
/**
* @brief Structure representing a transmit descriptor.
* @brief Structure representing a transmit descriptor.
*/
typedef struct {
size_t td_offset; /**< Current write offset. */
@ -149,7 +150,7 @@ typedef struct {
} MACTransmitDescriptor;
/**
* @brief Structure representing a receive descriptor.
* @brief Structure representing a receive descriptor.
*/
typedef struct {
size_t rd_offset; /**< Current read offset. */

32
os/hal/platforms/AT91SAM7/pal_lld.c
View File

@ -18,8 +18,9 @@
*/
/**
* @file AT91SAM7/pal_lld.c
* @brief AT91SAM7 PIO low level driver code.
* @file AT91SAM7/pal_lld.c
* @brief AT91SAM7 PIO low level driver code.
*
* @addtogroup AT91SAM7_PAL
* @{
*/
@ -50,10 +51,12 @@
/*===========================================================================*/
/**
* @brief AT91SAM7 I/O ports configuration.
* @brief AT91SAM7 I/O ports configuration.
* @details PIO registers initialization.
*
* @param[in] config the AT91SAM7 ports configuration
* @param[in] config the AT91SAM7 ports configuration
*
* @notapi
*/
void _pal_lld_init(const PALConfig *config) {
@ -99,20 +102,21 @@ void _pal_lld_init(const PALConfig *config) {
}
/**
* @brief Pads mode setup.
* @brief Pads mode setup.
* @details This function programs a pads group belonging to the same port
* with the specified mode.
* @note This function is not meant to be invoked directly from the
* application code.
* @note @p PAL_MODE_RESET is implemented as input with pull-up.
* @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with
* high state.
* @note @p PAL_MODE_OUTPUT_OPENDRAIN also enables the pull-up resistor.
*
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
*
* @note This function is not meant to be invoked directly by the application
* code.
* @note @p PAL_MODE_RESET is implemented as input with pull-up.
* @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with high
* state.
* @note @p PAL_MODE_OUTPUT_OPENDRAIN also enables the pull-up resistor.
* @notapi
*/
void _pal_lld_setgroupmode(ioportid_t port,
ioportmask_t mask,

111
os/hal/platforms/AT91SAM7/pal_lld.h
View File

@ -18,8 +18,9 @@
*/
/**
* @file AT91SAM7/pal_lld.h
* @brief AT91SAM7 PIO low level driver header.
* @file AT91SAM7/pal_lld.h
* @brief AT91SAM7 PIO low level driver header.
*
* @addtogroup AT91SAM7_PAL
* @{
*/
@ -40,7 +41,7 @@
/*===========================================================================*/
/**
* @brief PIO port setup info.
* @brief PIO port setup info.
*/
typedef struct {
/** Initial value for ODSR register (data).*/
@ -52,7 +53,7 @@ typedef struct {
} at91sam7_pio_setup_t;
/**
* @brief AT91SAM7 PIO static initializer.
* @brief AT91SAM7 PIO static initializer.
* @details An instance of this structure must be passed to @p palInit() at
* system startup time in order to initialize the digital I/O
* subsystem. This represents only the initial setup, specific pads
@ -69,17 +70,23 @@ typedef struct {
} PALConfig;
/**
* @brief Width, in bits, of an I/O port.
* @brief Width, in bits, of an I/O port.
*/
#define PAL_IOPORTS_WIDTH 32
/**
* @brief Digital I/O port sized unsigned type.
* @brief Whole port mask.
* @details This macro specifies all the valid bits into a port.
*/
#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFFFFFF)
/**
* @brief Digital I/O port sized unsigned type.
*/
typedef uint32_t ioportmask_t;
/**
* @brief Port Identifier.
* @brief Port Identifier.
* @details This type can be a scalar or some kind of pointer, do not make
* any assumption about it, use the provided macros when populating
* variables of this type.
@ -91,12 +98,12 @@ typedef AT91PS_PIO ioportid_t;
/*===========================================================================*/
/**
* @brief PIO port A identifier.
* @brief PIO port A identifier.
*/
#define IOPORT1 AT91C_BASE_PIOA
/**
* @brief PIO port B identifier.
* @brief PIO port B identifier.
*/
#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
(SAM7_PLATFORM == SAM7X512) || defined(__DOXYGEN__)
@ -109,96 +116,89 @@ typedef AT91PS_PIO ioportid_t;
/*===========================================================================*/
/**
* @brief Low level PAL subsystem initialization.
* @brief Low level PAL subsystem initialization.
*/
#define pal_lld_init(config) _pal_lld_init(config)
/**
* @brief Reads the physical I/O port states.
* @brief Reads the physical I/O port states.
* @details This function is implemented by reading the PIO_PDSR register, the
* implementation has no side effects.
*
* @param[in] port the port identifier
* @return The port bits.
* @param[in] port the port identifier
* @return The port bits.
*
* @note This function is not meant to be invoked directly by the application
* code.
* @notapi
*/
#define pal_lld_readport(port) ((port)->PIO_PDSR)
/**
* @brief Reads the output latch.
* @brief Reads the output latch.
* @details This function is implemented by reading the PIO_ODSR register, the
* implementation has no side effects.
*
* @param[in] port the port identifier
* @return The latched logical states.
* @param[in] port the port identifier
* @return The latched logical states.
*
* @note This function is not meant to be invoked directly by the application
* code.
* @notapi
*/
#define pal_lld_readlatch(port) ((port)->PIO_ODSR)
/**
* @brief Writes a bits mask on a I/O port.
* @brief Writes a bits mask on a I/O port.
* @details This function is implemented by writing the PIO_ODSR register, the
* implementation has no side effects.
*
* @param[in] port the port identifier
* @param[in] bits the bits to be written on the specified port
*
* @note This function is not meant to be invoked directly by the application
* code.
* @notapi
*/
#define pal_lld_writeport(port, bits) { \
(port)->PIO_ODSR = (bits); \
}
/**
* @brief Sets a bits mask on a I/O port.
* @brief Sets a bits mask on a I/O port.
* @details This function is implemented by writing the PIO_SODR register, the
* implementation has no side effects.
*
* @param[in] port the port identifier
* @param[in] bits the bits to be ORed on the specified port
* @param[in] port the port identifier
* @param[in] bits the bits to be ORed on the specified port
*
* @note This function is not meant to be invoked directly by the application
* code.
* @notapi
*/
#define pal_lld_setport(port, bits) { \
(port)->PIO_SODR = (bits); \
}
/**
* @brief Clears a bits mask on a I/O port.
* @brief Clears a bits mask on a I/O port.
* @details This function is implemented by writing the PIO_CODR register, the
* implementation has no side effects.
*
* @param[in] port the port identifier
* @param[in] bits the bits to be cleared on the specified port
* @param[in] port the port identifier
* @param[in] bits the bits to be cleared on the specified port
*
* @note This function is not meant to be invoked directly by the application
* code.
* @notapi
*/
#define pal_lld_clearport(port, bits) { \
(port)->PIO_CODR = (bits); \
}
/**
* @brief Writes a group of bits.
* @brief Writes a group of bits.
* @details This function is implemented by writing the PIO_OWER, PIO_ODSR and
* PIO_OWDR registers, the implementation is not atomic because the
* multiple accesses.
*
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] offset the group bit offset within the port
* @param[in] bits the bits to be written. Values exceeding the group width
* are masked.
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] offset the group bit offset within the port
* @param[in] bits the bits to be written. Values exceeding the group
* width are masked.
*
* @note This function is not meant to be invoked directly by the application
* code.
* @notapi
*/
#define pal_lld_writegroup(port, mask, offset, bits) { \
(port)->PIO_OWER = (mask) << (offset); \
@ -207,31 +207,30 @@ typedef AT91PS_PIO ioportid_t;
}
/**
* @brief Pads group mode setup.
* @brief Pads group mode setup.
* @details This function programs a pads group belonging to the same port
* with the specified mode.
* @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with
* high state.
*
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
*
* @note This function is not meant to be invoked directly by the application
* code.
* @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with high
* state.
* @notapi
*/
#define pal_lld_setgroupmode(port, mask, mode) \
_pal_lld_setgroupmode(port, mask, mode)
/**
* @brief Writes a logical state on an output pad.
* @brief Writes a logical state on an output pad.
*
* @param[in] port the port identifier
* @param[in] pad the pad number within the port
* @param[out] bit the logical value, the value must be @p 0 or @p 1
* @param[in] port the port identifier
* @param[in] pad the pad number within the port
* @param[in] bit logical value, the value must be @p PAL_LOW or
* @p PAL_HIGH
*
* @note This function is not meant to be invoked directly by the application
* code.
* @notapi
*/
#define pal_lld_writepad(port, pad, bit) pal_lld_writegroup(port, 1, pad, bit)

16
os/hal/platforms/AT91SAM7/serial_lld.c
View File

@ -219,6 +219,11 @@ static void notify3(void) {
/*===========================================================================*/
#if USE_SAM7_USART0 || defined(__DOXYGEN__)
/**
* @brief USART0 interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(USART0IrqHandler) {
CH_IRQ_PROLOGUE();
@ -229,6 +234,11 @@ CH_IRQ_HANDLER(USART0IrqHandler) {
#endif
#if USE_SAM7_USART1 || defined(__DOXYGEN__)
/**
* @brief USART1 interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(USART1IrqHandler) {
CH_IRQ_PROLOGUE();
@ -247,6 +257,8 @@ CH_IRQ_HANDLER(USART1IrqHandler) {
/**
* @brief Low level serial driver initialization.
*
* @notapi
*/
void sd_lld_init(void) {
@ -291,6 +303,8 @@ void sd_lld_init(void) {
* @param[in] config the architecture-dependent serial driver configuration.
* If this parameter is set to @p NULL then a default
* configuration is used.
*
* @notapi
*/
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
@ -325,6 +339,8 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
* interrupt vector.
*
* @param[in] sdp pointer to a @p SerialDriver object
*
* @notapi
*/
void sd_lld_stop(SerialDriver *sdp) {

49
os/hal/platforms/AT91SAM7/spi_lld.c
View File

@ -18,8 +18,9 @@
*/
/**
* @file AT91SAM7/spi_lld.c
* @brief AT91SAM7 low level SPI driver code.
* @file AT91SAM7/spi_lld.c
* @brief AT91SAM7 low level SPI driver code.
*
* @addtogroup AT91SAM7_SPI
* @{
*/
@ -47,7 +48,7 @@ SPIDriver SPID;
/*===========================================================================*/
/**
* @brief Synchronous SPI transfer.
* @brief Synchronous SPI transfer.
*
* @param[in] n number of bytes to be exchanged
*
@ -85,7 +86,9 @@ void rw8(size_t n, const uint8_t *txbuf, uint8_t *rxbuf) {
/*===========================================================================*/
/**
* @brief Low level SPI driver initialization.
* @brief Low level SPI driver initialization.
*
* @notapi
*/
void spi_lld_init(void) {
@ -95,9 +98,11 @@ void spi_lld_init(void) {
}
/**
* @brief Configures and activates the SPI peripheral.
* @brief Configures and activates the SPI peripheral.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @notapi
*/
void spi_lld_start(SPIDriver *spip) {
@ -120,9 +125,11 @@ void spi_lld_start(SPIDriver *spip) {
}
/**
* @brief Deactivates the SPI peripheral.
* @brief Deactivates the SPI peripheral.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @notapi
*/
void spi_lld_stop(SPIDriver *spip) {
@ -135,9 +142,11 @@ void spi_lld_stop(SPIDriver *spip) {
}
/**
* @brief Asserts the slave select signal and prepares for transfers.
* @brief Asserts the slave select signal and prepares for transfers.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @notapi
*/
void spi_lld_select(SPIDriver *spip) {
@ -145,10 +154,12 @@ void spi_lld_select(SPIDriver *spip) {
}
/**
* @brief Deasserts the slave select signal.
* @brief Deasserts the slave select signal.
* @details The previously selected peripheral is unselected.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @notapi
*/
void spi_lld_unselect(SPIDriver *spip) {
@ -156,13 +167,15 @@ void spi_lld_unselect(SPIDriver *spip) {
}
/**
* @brief Ignores data on the SPI bus.
* @brief Ignores data on the SPI bus.
* @details This function transmits a series of idle words on the SPI bus and
* ignores the received data. This function can be invoked even
* when a slave select signal has not been yet asserted.
*
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] n number of words to be ignored
*
* @notapi
*/
void spi_lld_ignore(SPIDriver *spip, size_t n) {
@ -171,16 +184,16 @@ void spi_lld_ignore(SPIDriver *spip, size_t n) {
}
/**
* @brief Exchanges data on the SPI bus.
* @brief Exchanges data on the SPI bus.
* @details This function performs a simultaneous transmit/receive operation.
* @note The buffers are organized as uint8_t arrays.
*
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] n number of words to be exchanged
* @param[in] txbuf the pointer to the transmit buffer
* @param[out] rxbuf the pointer to the receive buffer
*
* @note The buffers are organized as uint8_t arrays for data sizes below or
* equal to 8 bits else it is organized as uint16_t arrays.
* @notapi
*/
void spi_lld_exchange(SPIDriver *spip, size_t n,
const void *txbuf, void *rxbuf) {
@ -190,14 +203,14 @@ void spi_lld_exchange(SPIDriver *spip, size_t n,
}
/**
* @brief Sends data over the SPI bus.
* @brief Sends data over the SPI bus.
* @note The buffers are organized as uint8_t arrays.
*
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] n number of words to send
* @param[in] txbuf the pointer to the transmit buffer
*
* @note The buffers are organized as uint8_t arrays for data sizes below or
* equal to 8 bits else it is organized as uint16_t arrays.
* @notapi
*/
void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
@ -206,14 +219,14 @@ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
}
/**
* @brief Receives data from the SPI bus.
* @brief Receives data from the SPI bus.
* @note The buffers are organized as uint8_t arrays.
*
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] n number of words to receive
* @param[out] rxbuf the pointer to the receive buffer
*
* @note The buffers are organized as uint8_t arrays for data sizes below or
* equal to 8 bits else it is organized as uint16_t arrays.
* @notapi
*/
void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {

11
os/hal/platforms/AT91SAM7/spi_lld.h
View File

@ -18,8 +18,9 @@
*/
/**
* @file AT91SAM7/spi_lld.h
* @brief AT91SAM7 low level SPI driver header.
* @file AT91SAM7/spi_lld.h
* @brief AT91SAM7 low level SPI driver header.
*
* @addtogroup AT91SAM7_SPI
* @{
*/
@ -46,9 +47,9 @@
/*===========================================================================*/
/**
* @brief SPI driver enable switch.
* @brief SPI driver enable switch.
* @details If set to @p TRUE the support for SPI0 is included.
* @note The default is @p TRUE.
* @note The default is @p TRUE.
*/
#if !defined(USE_AT91SAM7_SPI) || defined(__DOXYGEN__)
#define USE_AT91SAM7_SPI TRUE
@ -63,7 +64,7 @@
/*===========================================================================*/
/**
* @brief Driver configuration structure.
* @brief Driver configuration structure.
*/
typedef struct {
/**

9
os/hal/platforms/AVR/hal_lld.c
View File

@ -18,8 +18,9 @@
*/
/**
* @file AVR/hal_lld.c
* @brief AVR HAL subsystem low level driver code.
* @file AVR/hal_lld.c
* @brief AVR HAL subsystem low level driver code.
*
* @addtogroup AVR_HAL
* @{
*/
@ -48,7 +49,9 @@
/*===========================================================================*/
/**
* @brief Low level HAL driver initialization.
* @brief Low level HAL driver initialization.
*
* @notapi
*/
void hal_lld_init(void) {

5
os/hal/platforms/AVR/hal_lld.h
View File

@ -18,8 +18,9 @@
*/
/**
* @file AVR/hal_lld.h
* @brief AVR HAL subsystem low level driver header.
* @file AVR/hal_lld.h
* @brief AVR HAL subsystem low level driver header.
*
* @addtogroup AVR_HAL
* @{
*/

26
os/hal/platforms/AVR/serial_lld.c
View File

@ -149,6 +149,11 @@ static void usart1_deinit(void) {
/*===========================================================================*/
#if USE_AVR_USART0 || defined(__DOXYGEN__)
/**
* @brief USART0 RX interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(USART0_RX_vect) {
uint8_t sra;
@ -164,6 +169,11 @@ CH_IRQ_HANDLER(USART0_RX_vect) {
CH_IRQ_EPILOGUE();
}
/**
* @brief USART0 TX interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(USART0_UDRE_vect) {
msg_t b;
@ -182,6 +192,11 @@ CH_IRQ_HANDLER(USART0_UDRE_vect) {
#endif /* USE_AVR_USART0 */
#if USE_AVR_USART1 || defined(__DOXYGEN__)
/**
* @brief USART1 RX interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(USART1_RX_vect) {
uint8_t sra;
@ -197,6 +212,11 @@ CH_IRQ_HANDLER(USART1_RX_vect) {
CH_IRQ_EPILOGUE();
}
/**
* @brief USART1 TX interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(USART1_UDRE_vect) {
msg_t b;
@ -220,6 +240,8 @@ CH_IRQ_HANDLER(USART1_UDRE_vect) {
/**
* @brief Low level serial driver initialization.
*
* @notapi
*/
void sd_lld_init(void) {
@ -238,6 +260,8 @@ void sd_lld_init(void) {
* @param[in] config the architecture-dependent serial driver configuration.
* If this parameter is set to @p NULL then a default
* configuration is used.
*
* @notapi
*/
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
@ -264,6 +288,8 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
* interrupt vector.
*
* @param[in] sdp pointer to a @p SerialDriver object
*
* @notapi
*/
void sd_lld_stop(SerialDriver *sdp) {

5
os/hal/platforms/LPC11xx/hal_lld.c
View File

@ -66,6 +66,8 @@ const PALConfig pal_default_config = {
/**
* @brief Low level HAL driver initialization.
*
* @notapi
*/
void hal_lld_init(void) {
@ -81,6 +83,9 @@ void hal_lld_init(void) {
/**
* @brief LPC11xx clocks and PLL initialization.
* @note All the involved constants come from the file @p board.h.
* @note This function must be invoked only after the system reset.
*
* @special
*/
void lpc111x_clock_init(void) {
unsigned i;

25
os/hal/platforms/LPC11xx/pal_lld.c
View File

@ -50,10 +50,12 @@
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief LPC11xx I/O ports configuration.
* @brief LPC11xx I/O ports configuration.
* @details GPIO unit registers initialization.
*
* @param[in] config the LPC11xx ports configuration
* @param[in] config the LPC11xx ports configuration
*
* @notapi
*/
void _pal_lld_init(const PALConfig *config) {
@ -68,20 +70,19 @@ void _pal_lld_init(const PALConfig *config) {
}
/**
* @brief Pads mode setup.
* @brief Pads mode setup.
* @details This function programs a pads group belonging to the same port
* with the specified mode.
* @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with
* high state.
* @note This function does not alter the @p PINSELx registers. Alternate
* functions setup must be handled by device-specific code.
*
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
*
* @note This function is not meant to be invoked directly by the application
* code.
* @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with high
* state.
* @note This function does not alter the @p PINSELx registers. Alternate
* functions setup must be handled by device-specific code.
* @notapi
*/
void _pal_lld_setgroupmode(ioportid_t port,
ioportmask_t mask,

28
os/hal/platforms/LPC11xx/pal_lld.h
View File

@ -44,7 +44,7 @@
/*===========================================================================*/
/**
* @brief GPIO port setup info.
* @brief GPIO port setup info.
*/
typedef struct {
/** Initial value for FIO_PIN register.*/
@ -134,6 +134,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
* @brief Low level PAL subsystem initialization.
*
* @param[in] config architecture-dependent ports configuration
*
* @notapi
*/
#define pal_lld_init(config) _pal_lld_init(config)
@ -144,6 +146,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
*
* @param[in] port port identifier
* @return The port bits.
*
* @notapi
*/
#define pal_lld_readport(port) ((port)->DATA)
@ -156,6 +160,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
*
* @param[in] port port identifier
* @return The latched logical states.
*
* @notapi
*/
#define pal_lld_readlatch(port) ((port)->DATA)
@ -166,6 +172,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
*
* @param[in] port port identifier
* @param[in] bits bits to be written on the specified port
*
* @notapi
*/
#define pal_lld_writeport(port, bits) ((port)->DATA = (bits))
@ -179,6 +187,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
*
* @param[in] port port identifier
* @param[in] bits bits to be ORed on the specified port
*
* @notapi
*/
#define pal_lld_setport(port, bits) ((port)->MASKED_ACCESS[bits] = 0xFFFFFFFF)
@ -192,6 +202,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
*
* @param[in] port port identifier
* @param[in] bits bits to be cleared on the specified port
*
* @notapi
*/
#define pal_lld_clearport(port, bits) ((port)->MASKED_ACCESS[bits] = 0)
@ -207,6 +219,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
* @param[in] mask group mask
* @param[in] offset group bit offset within the port
* @return The group logical states.
*
* @notapi
*/
#define pal_lld_readgroup(port, mask, offset) \
((port)->MASKED_ACCESS[(mask) << (offset)])
@ -224,6 +238,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
* @param[in] offset group bit offset within the port
* @param[in] bits bits to be written. Values exceeding the group width
* are masked.
*
* @notapi
*/
#define pal_lld_writegroup(port, mask, offset, bits) \
((port)->MASKED_ACCESS[(mask) << (offset)] = (bits))
@ -239,6 +255,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
* @param[in] port port identifier
* @param[in] mask group mask
* @param[in] mode group mode
*
* @notapi
*/
#define pal_lld_setgroupmode(port, mask, mode) \
_pal_lld_setgroupmode(port, mask, mode)
@ -253,8 +271,10 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
*
* @param[in] port port identifier
* @param[in] pad pad number within the port
* @param[out] bit logical value, the value must be @p PAL_LOW or
* @param[in] bit logical value, the value must be @p PAL_LOW or
* @p PAL_HIGH
*
* @notapi
*/
#define pal_lld_writepad(port, pad, bit) \
((port)->MASKED_ACCESS[(mask) << (pad)] = (bit) << (pad))
@ -269,6 +289,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
*
* @param[in] port port identifier
* @param[in] pad pad number within the port
*
* @notapi
*/
#define pal_lld_setpad(port, pad) \
((port)->MASKED_ACCESS[1 << (pad)] = 1 << (pad))
@ -283,6 +305,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
*
* @param[in] port port identifier
* @param[in] pad pad number within the port
*
* @notapi
*/
#define pal_lld_clearpad(port, pad) \
((port)->MASKED_ACCESS[1 << (pad)] = 0)

8
os/hal/platforms/LPC11xx/serial_lld.c
View File

@ -210,6 +210,8 @@ static void notify1(void) {
/**
* @brief UART0 IRQ handler.
*
* @isr
*/
#if USE_LPC11xx_UART0 || defined(__DOXYGEN__)
CH_IRQ_HANDLER(Vector94) {
@ -228,6 +230,8 @@ CH_IRQ_HANDLER(Vector94) {
/**
* @brief Low level serial driver initialization.
*
* @notapi
*/
void sd_lld_init(void) {
@ -246,6 +250,8 @@ void sd_lld_init(void) {
* @param[in] config the architecture-dependent serial driver configuration.
* If this parameter is set to @p NULL then a default
* configuration is used.
*
* @notapi
*/
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
@ -270,6 +276,8 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
* interrupt vector.
*
* @param[in] sdp pointer to a @p SerialDriver object
*
* @notapi
*/
void sd_lld_stop(SerialDriver *sdp) {

4
os/hal/platforms/LPC11xx/serial_lld.h
View File

@ -125,7 +125,7 @@
/*===========================================================================*/
/**
* @brief Serial Driver condition flags type.
* @brief Serial Driver condition flags type.
*/
typedef uint32_t sdflags_t;
@ -150,7 +150,7 @@ typedef struct {
} SerialConfig;
/**
* @brief @p SerialDriver specific data.
* @brief @p SerialDriver specific data.
*/
#define _serial_driver_data \
_base_asynchronous_channel_data \

7
os/hal/platforms/LPC13xx/hal_lld.c
View File

@ -42,7 +42,7 @@
/*===========================================================================*/
/**
* @brief PAL setup.
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
*/
const PALConfig pal_default_config = {
@ -66,6 +66,8 @@ const PALConfig pal_default_config = {
/**
* @brief Low level HAL driver initialization.
*
* @notapi
*/
void hal_lld_init(void) {
@ -81,6 +83,9 @@ void hal_lld_init(void) {
/**
* @brief LPC13xx clocks and PLL initialization.
* @note All the involved constants come from the file @p board.h.
* @note This function must be invoked only after the system reset.
*
* @special
*/
void LPC13xx_clock_init(void) {
unsigned i;

23
os/hal/platforms/LPC13xx/pal_lld.c
View File

@ -50,10 +50,12 @@
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief LPC13xx I/O ports configuration.
* @brief LPC13xx I/O ports configuration.
* @details GPIO unit registers initialization.
*
* @param[in] config the LPC13xx ports configuration
*
* @notapi
*/
void _pal_lld_init(const PALConfig *config) {
@ -68,20 +70,19 @@ void _pal_lld_init(const PALConfig *config) {
}
/**
* @brief Pads mode setup.
* @brief Pads mode setup.
* @details This function programs a pads group belonging to the same port
* with the specified mode.
* @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with
* high state.
* @note This function does not alter the @p PINSELx registers. Alternate
* functions setup must be handled by device-specific code.
*
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
*
* @note This function is not meant to be invoked directly by the application
* code.
* @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with high
* state.
* @note This function does not alter the @p PINSELx registers. Alternate
* functions setup must be handled by device-specific code.
* @notapi
*/
void _pal_lld_setgroupmode(ioportid_t port,
ioportmask_t mask,

28
os/hal/platforms/LPC13xx/pal_lld.h
View File

@ -44,7 +44,7 @@
/*===========================================================================*/
/**
* @brief GPIO port setup info.
* @brief GPIO port setup info.
*/
typedef struct {
/** Initial value for FIO_PIN register.*/
@ -134,6 +134,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
* @brief Low level PAL subsystem initialization.
*
* @param[in] config architecture-dependent ports configuration
*
* @notapi
*/
#define pal_lld_init(config) _pal_lld_init(config)
@ -144,6 +146,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
*
* @param[in] port port identifier
* @return The port bits.
*
* @notapi
*/
#define pal_lld_readport(port) ((port)->DATA)
@ -156,6 +160,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
*
* @param[in] port port identifier
* @return The latched logical states.
*
* @notapi
*/
#define pal_lld_readlatch(port) ((port)->DATA)
@ -166,6 +172,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
*
* @param[in] port port identifier
* @param[in] bits bits to be written on the specified port
*
* @notapi
*/
#define pal_lld_writeport(port, bits) ((port)->DATA = (bits))
@ -179,6 +187,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
*
* @param[in] port port identifier
* @param[in] bits bits to be ORed on the specified port
*
* @notapi
*/
#define pal_lld_setport(port, bits) ((port)->MASKED_ACCESS[bits] = 0xFFFFFFFF)
@ -192,6 +202,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
*
* @param[in] port port identifier
* @param[in] bits bits to be cleared on the specified port
*
* @notapi
*/
#define pal_lld_clearport(port, bits) ((port)->MASKED_ACCESS[bits] = 0)
@ -207,6 +219,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
* @param[in] mask group mask
* @param[in] offset group bit offset within the port
* @return The group logical states.
*
* @notapi
*/
#define pal_lld_readgroup(port, mask, offset) \
((port)->MASKED_ACCESS[(mask) << (offset)])
@ -224,6 +238,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
* @param[in] offset group bit offset within the port
* @param[in] bits bits to be written. Values exceeding the group width
* are masked.
*
* @notapi
*/
#define pal_lld_writegroup(port, mask, offset, bits) \
((port)->MASKED_ACCESS[(mask) << (offset)] = (bits))
@ -239,6 +255,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
* @param[in] port port identifier
* @param[in] mask group mask
* @param[in] mode group mode
*
* @notapi
*/
#define pal_lld_setgroupmode(port, mask, mode) \
_pal_lld_setgroupmode(port, mask, mode)
@ -253,8 +271,10 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
*
* @param[in] port port identifier
* @param[in] pad pad number within the port
* @param[out] bit logical value, the value must be @p PAL_LOW or
* @param[in] bit logical value, the value must be @p PAL_LOW or
* @p PAL_HIGH
*
* @notapi
*/
#define pal_lld_writepad(port, pad, bit) \
((port)->MASKED_ACCESS[(mask) << (pad)] = (bit) << (pad))
@ -269,6 +289,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
*
* @param[in] port port identifier
* @param[in] pad pad number within the port
*
* @notapi
*/
#define pal_lld_setpad(port, pad) \
((port)->MASKED_ACCESS[1 << (pad)] = 1 << (pad))
@ -283,6 +305,8 @@ typedef LPC_GPIO_TypeDef *ioportid_t;
*
* @param[in] port port identifier
* @param[in] pad pad number within the port
*
* @notapi
*/
#define pal_lld_clearpad(port, pad) \
((port)->MASKED_ACCESS[1 << (pad)] = 0)

8
os/hal/platforms/LPC13xx/serial_lld.c
View File

@ -210,6 +210,8 @@ static void notify1(void) {
/**
* @brief UART0 IRQ handler.
*
* @isr
*/
#if USE_LPC13xx_UART0 || defined(__DOXYGEN__)
CH_IRQ_HANDLER(VectorF8) {
@ -228,6 +230,8 @@ CH_IRQ_HANDLER(VectorF8) {
/**
* @brief Low level serial driver initialization.
*
* @notapi
*/
void sd_lld_init(void) {
@ -246,6 +250,8 @@ void sd_lld_init(void) {
* @param[in] config the architecture-dependent serial driver configuration.
* If this parameter is set to @p NULL then a default
* configuration is used.
*
* @notapi
*/
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
@ -270,6 +276,8 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
* interrupt vector.
*
* @param[in] sdp pointer to a @p SerialDriver object
*
* @notapi
*/
void sd_lld_stop(SerialDriver *sdp) {

2
os/hal/platforms/LPC13xx/serial_lld.h
View File

@ -150,7 +150,7 @@ typedef struct {
} SerialConfig;
/**
* @brief @p SerialDriver specific data.
* @brief @p SerialDriver specific data.
*/
#define _serial_driver_data \
_base_asynchronous_channel_data \

18
os/hal/platforms/LPC214x/hal_lld.c
View File

@ -18,8 +18,9 @@
*/
/**
* @file LPC214x/hal_lld.c
* @brief LPC214x HAL subsystem low level driver source.
* @file LPC214x/hal_lld.c
* @brief LPC214x HAL subsystem low level driver source.
*
* @addtogroup LPC214x_HAL
* @{
*/
@ -36,7 +37,7 @@
/*===========================================================================*/
/**
* @brief PAL setup.
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
*/
const PALConfig pal_default_config =
@ -75,7 +76,9 @@ static CH_IRQ_HANDLER(irq_handler) {
/*===========================================================================*/
/**
* @brief Low level HAL driver initialization.
* @brief Low level HAL driver initialization.
*
* @notapi
*/
void hal_lld_init(void) {
@ -85,8 +88,11 @@ void hal_lld_init(void) {
}
/**
* @brief LPC214x clocks and PLL initialization.
* @note All the involved constants come from the file @p board.h.
* @brief LPC214x clocks and PLL initialization.
* @note All the involved constants come from the file @p board.h.
* @note This function must be invoked only after the system reset.
*
* @special
*/
void lpc214x_clock_init(void) {

7
os/hal/platforms/LPC214x/hal_lld.h
View File

@ -18,8 +18,9 @@
*/
/**
* @file LPC214x/hal_lld.h
* @brief LPC214x HAL subsystem low level driver header.
* @file LPC214x/hal_lld.h
* @brief LPC214x HAL subsystem low level driver header.
*
* @addtogroup LPC214x_HAL
* @{
*/
@ -44,7 +45,7 @@
/*===========================================================================*/
/**
* @brief Default action for the non vectored IRQ handler, nothing.
* @brief Default action for the non vectored IRQ handler, nothing.
*/
#if !defined(LPC214x_NON_VECTORED_IRQ_HOOK) || defined(__DOXYGEN__)
#define LPC214x_NON_VECTORED_IRQ_HOOK()

30
os/hal/platforms/LPC214x/pal_lld.c
View File

@ -18,8 +18,9 @@
*/
/**
* @file LPC214x/pal_lld.c
* @brief LPC214x FIO low level driver code.
* @file LPC214x/pal_lld.c
* @brief LPC214x FIO low level driver code.
*
* @addtogroup LPC214x_PAL
* @{
*/
@ -50,10 +51,12 @@
/*===========================================================================*/
/**
* @brief LPC214x I/O ports configuration.
* @brief LPC214x I/O ports configuration.
* @details FIO units and PINSEL registers initialization.
*
* @param[in] config the LPC214x ports configuration
* @param[in] config the LPC214x ports configuration
*
* @notapi
*/
void _pal_lld_init(const PALConfig *config) {
@ -76,20 +79,19 @@ void _pal_lld_init(const PALConfig *config) {
}
/**
* @brief Pads mode setup.
* @brief Pads mode setup.
* @details This function programs a pads group belonging to the same port
* with the specified mode.
* @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with
* high state.
* @note This function does not alter the @p PINSELx registers. Alternate
* functions setup must be handled by device-specific code.
*
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
*
* @note This function is not meant to be invoked directly by the application
* code.
* @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with high
* state.
* @note This function does not alter the @p PINSELx registers. Alternate
* functions setup must be handled by device-specific code.
* @notapi
*/
void _pal_lld_setgroupmode(ioportid_t port,
ioportmask_t mask,

124
os/hal/platforms/LPC214x/pal_lld.h
View File

@ -18,8 +18,9 @@
*/
/**
* @file LPC214x/pal_lld.h
* @brief LPC214x FIO low level driver header.
* @file LPC214x/pal_lld.h
* @brief LPC214x FIO low level driver header.
*
* @addtogroup LPC214x_PAL
* @{
*/
@ -42,7 +43,7 @@
/*===========================================================================*/
/**
* @brief FIO port setup info.
* @brief FIO port setup info.
*/
typedef struct {
/** Initial value for FIO_PIN register.*/
@ -52,7 +53,7 @@ typedef struct {
} lpc214x_fio_setup_t;
/**
* @brief LPC214x FIO static initializer.
* @brief LPC214x FIO static initializer.
* @details An instance of this structure must be passed to @p palInit() at
* system startup time in order to initialize the digital I/O
* subsystem. This represents only the initial setup, specific pads
@ -72,17 +73,23 @@ typedef struct {
} PALConfig;
/**
* @brief Width, in bits, of an I/O port.
* @brief Width, in bits, of an I/O port.
*/
#define PAL_IOPORTS_WIDTH 32
/**
* @brief Digital I/O port sized unsigned type.
* @brief Whole port mask.
* @details This macro specifies all the valid bits into a port.
*/
#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFFFFFF)
/**
* @brief Digital I/O port sized unsigned type.
*/
typedef uint32_t ioportmask_t;
/**
* @brief Port Identifier.
* @brief Port Identifier.
*/
typedef FIO * ioportid_t;
@ -91,12 +98,12 @@ typedef FIO * ioportid_t;
/*===========================================================================*/
/**
* @brief FIO port 0 identifier.
* @brief FIO port 0 identifier.
*/
#define IOPORT1 FIO0Base
/**
* @brief FIO port 1 identifier.
* @brief FIO port 1 identifier.
*/
#define IOPORT2 FIO1Base
@ -106,91 +113,85 @@ typedef FIO * ioportid_t;
/*===========================================================================*/
/**
* @brief FIO subsystem initialization.
* @brief FIO subsystem initialization.
* @details Enables the access through the fast registers.
*/
#define pal_lld_init(config) _pal_lld_init(config)
/**
* @brief Reads an I/O port.
* @brief Reads an I/O port.
* @details This function is implemented by reading the FIO PIN register, the
* implementation has no side effects.
*
* @param[in] port the port identifier
* @return the port bits
* @param[in] port the port identifier
* @return The port bits.
*
* @note This function is not meant to be invoked directly by the application
* code.
* @notapi
*/
#define pal_lld_readport(port) ((port)->FIO_PIN)
/**
* @brief Reads the output latch.
* @brief Reads the output latch.
* @details This function is implemented by reading the FIO SET register, the
* implementation has no side effects.
*
* @param[in] port the port identifier
* @return The latched logical states.
* @param[in] port the port identifier
* @return The latched logical states.
*
* @note This function is not meant to be invoked directly by the application
* code.
* @notapi
*/
#define pal_lld_readlatch(port) ((port)->FIO_SET)
/**
* @brief Writes a bits mask on a I/O port.
* @brief Writes a bits mask on a I/O port.
* @details This function is implemented by writing the FIO PIN register, the
* implementation has no side effects.
*
* @param[in] port the port identifier
* @param[in] bits the bits to be written on the specified port
* @param[in] port the port identifier
* @param[in] bits the bits to be written on the specified port
*
* @note This function is not meant to be invoked directly by the application
* code.
* @notapi
*/
#define pal_lld_writeport(port, bits) ((port)->FIO_PIN = (bits))
/**
* @brief Sets a bits mask on a I/O port.
* @brief Sets a bits mask on a I/O port.
* @details This function is implemented by writing the FIO SET register, the
* implementation has no side effects.
*
* @param[in] port the port identifier
* @param[in] bits the bits to be ORed on the specified port
* @param[in] port the port identifier
* @param[in] bits the bits to be ORed on the specified port
*
* @note This function is not meant to be invoked directly by the application
* code.
* @notapi
*/
#define pal_lld_setport(port, bits) ((port)->FIO_SET = (bits))
/**
* @brief Clears a bits mask on a I/O port.
* @brief Clears a bits mask on a I/O port.
* @details This function is implemented by writing the FIO CLR register, the
* implementation has no side effects.
*
* @param[in] port the port identifier
* @param[in] bits the bits to be cleared on the specified port
* @param[in] port the port identifier
* @param[in] bits the bits to be cleared on the specified port
*
* @note This function is not meant to be invoked directly by the application
* code.
* @notapi
*/
#define pal_lld_clearport(port, bits) ((port)->FIO_CLR = (bits))
/**
* @brief Writes a value on an I/O bus.
* @brief Writes a value on an I/O bus.
* @details This function is implemented by writing the FIO PIN and MASK
* registers, the implementation is not atomic because the multiple
* accesses.
*
* @param[in] port the port identifier
* @param[in] mask the group mask, a logical AND is performed on the output
* data
* @param[in] offset the group bit offset within the port
* @param[in] bits the bits to be written. Values exceeding the group width
* are masked.
* @param[in] port the port identifier
* @param[in] mask the group mask, a logical AND is performed on the
* output data
* @param[in] offset the group bit offset within the port
* @param[in] bits the bits to be written. Values exceeding the group
* width are masked.
*
* @note This function is not meant to be invoked directly by the application
* code.
* @notapi
*/
#define pal_lld_writegroup(port, mask, offset, bits) { \
(port)->FIO_MASK = ~((mask) << (offset)); \
@ -199,39 +200,40 @@ typedef FIO * ioportid_t;
}
/**
* @brief Pads group mode setup.
* @brief Pads group mode setup.
* @details This function programs a pads group belonging to the same port
* with the specified mode.
* @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with
* high state.
* @note This function does not alter the @p PINSELx registers. Alternate
* functions setup must be handled by device-specific code.
*
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
*
* @note This function is not meant to be invoked directly by the application
* code.
* @note @p PAL_MODE_UNCONNECTED is implemented as push pull output with high
* state.
* @note This function does not alter the @p PINSELx registers. Alternate
* functions setup must be handled by device-specific code.
* @notapi
*/
#define pal_lld_setgroupmode(port, mask, mode) \
_pal_lld_setgroupmode(port, mask, mode)
/**
* @brief Writes a logical state on an output pad.
* @brief Writes a logical state on an output pad.
*
* @param[in] port the port identifier
* @param[in] pad the pad number within the port
* @param[out] bit the logical value, the value must be @p 0 or @p 1
* @param[in] port the port identifier
* @param[in] pad the pad number within the port
* @param[in] bit logical value, the value must be @p PAL_LOW or
* @p PAL_HIGH
*
* @note This function is not meant to be invoked directly by the application
* code.
* @notapi
*/
#define pal_lld_writepad(port, pad, bit) pal_lld_writegroup(port, 1, pad, bit)
/**
* @brief FIO port setup.
* @brief FIO port setup.
* @details This function programs the pins direction within a port.
*
* @notapi
*/
#define pal_lld_lpc214x_set_direction(port, dir) { \
(port)->FIO_DIR = (dir); \

10
os/hal/platforms/LPC214x/serial_lld.c
View File

@ -227,6 +227,8 @@ static void notify2(void) {
/**
* @brief UART0 IRQ handler.
*
* @isr
*/
#if USE_LPC214x_UART0 || defined(__DOXYGEN__)
CH_IRQ_HANDLER(UART0IrqHandler) {
@ -242,6 +244,8 @@ CH_IRQ_HANDLER(UART0IrqHandler) {
/**
* @brief UART1 IRQ handler.
*
* @isr
*/
#if USE_LPC214x_UART1 || defined(__DOXYGEN__)
CH_IRQ_HANDLER(UART1IrqHandler) {
@ -261,6 +265,8 @@ CH_IRQ_HANDLER(UART1IrqHandler) {
/**
* @brief Low level serial driver initialization.
*
* @notapi
*/
void sd_lld_init(void) {
@ -283,6 +289,8 @@ void sd_lld_init(void) {
* @param[in] config the architecture-dependent serial driver configuration.
* If this parameter is set to @p NULL then a default
* configuration is used.
*
* @notapi
*/
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
@ -312,6 +320,8 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
* interrupt vector.
*
* @param[in] sdp pointer to a @p SerialDriver object
*
* @notapi
*/
void sd_lld_stop(SerialDriver *sdp) {

2
os/hal/platforms/LPC214x/serial_lld.h
View File

@ -121,7 +121,7 @@ typedef struct {
} SerialConfig;
/**
* @brief @p SerialDriver specific data.
* @brief @p SerialDriver specific data.
*/
#define _serial_driver_data \
_base_asynchronous_channel_data \

52
os/hal/platforms/LPC214x/spi_lld.c
View File

@ -18,8 +18,9 @@
*/
/**
* @file LPC214x/spi_lld.c
* @brief LPC214x low level SPI driver code.
* @file LPC214x/spi_lld.c
* @brief LPC214x low level SPI driver code.
*
* @addtogroup LPC214x_SPI
* @{
*/
@ -47,14 +48,13 @@ SPIDriver SPID1;
/*===========================================================================*/
/**
* @brief Synchronous SSP transfer.
* @brief Synchronous SSP transfer.
*
* @param[in] n number of bytes to be exchanged
*
* @param[in] txbuf the pointer to the transmit buffer or @p NULL
* @param[out] rxbuf the pointer to the receive buffer or @p NULL
*/
void rw8(size_t n, const uint8_t *txbuf, uint8_t *rxbuf) {
static void rw8(size_t n, const uint8_t *txbuf, uint8_t *rxbuf) {
size_t ntx = n;
while (n > 0) {
@ -85,7 +85,9 @@ void rw8(size_t n, const uint8_t *txbuf, uint8_t *rxbuf) {
/*===========================================================================*/
/**
* @brief Low level SPI driver initialization.
* @brief Low level SPI driver initialization.
*
* @notapi
*/
void spi_lld_init(void) {
@ -95,9 +97,11 @@ void spi_lld_init(void) {
}
/**
* @brief Configures and activates the SPI peripheral.
* @brief Configures and activates the SPI peripheral.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @notapi
*/
void spi_lld_start(SPIDriver *spip) {
@ -116,9 +120,11 @@ void spi_lld_start(SPIDriver *spip) {
}
/**
* @brief Deactivates the SPI peripheral.
* @brief Deactivates the SPI peripheral.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @notapi
*/
void spi_lld_stop(SPIDriver *spip) {
@ -131,9 +137,11 @@ void spi_lld_stop(SPIDriver *spip) {
}
/**
* @brief Asserts the slave select signal and prepares for transfers.
* @brief Asserts the slave select signal and prepares for transfers.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @notapi
*/
void spi_lld_select(SPIDriver *spip) {
@ -141,10 +149,12 @@ void spi_lld_select(SPIDriver *spip) {
}
/**
* @brief Deasserts the slave select signal.
* @brief Deasserts the slave select signal.
* @details The previously selected peripheral is unselected.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @notapi
*/
void spi_lld_unselect(SPIDriver *spip) {
@ -152,13 +162,15 @@ void spi_lld_unselect(SPIDriver *spip) {
}
/**
* @brief Ignores data on the SPI bus.
* @brief Ignores data on the SPI bus.
* @details This function transmits a series of idle words on the SPI bus and
* ignores the received data. This function can be invoked even
* when a slave select signal has not been yet asserted.
*
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] n number of words to be ignored
*
* @notapi
*/
void spi_lld_ignore(SPIDriver *spip, size_t n) {
@ -167,16 +179,16 @@ void spi_lld_ignore(SPIDriver *spip, size_t n) {
}
/**
* @brief Exchanges data on the SPI bus.
* @brief Exchanges data on the SPI bus.
* @details This function performs a simultaneous transmit/receive operation.
* @note The buffers are organized as uint8_t arrays.
*
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] n number of words to be exchanged
* @param[in] txbuf the pointer to the transmit buffer
* @param[out] rxbuf the pointer to the receive buffer
*
* @note The buffers are organized as uint8_t arrays for data sizes below or
* equal to 8 bits else it is organized as uint16_t arrays.
* @notapi
*/
void spi_lld_exchange(SPIDriver *spip, size_t n,
const void *txbuf, void *rxbuf) {
@ -186,14 +198,14 @@ void spi_lld_exchange(SPIDriver *spip, size_t n,
}
/**
* @brief Sends data ever the SPI bus.
* @brief Sends data ever the SPI bus.
* @note The buffers are organized as uint8_t arrays.
*
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] n number of words to send
* @param[in] txbuf the pointer to the transmit buffer
*
* @note The buffers are organized as uint8_t arrays for data sizes below or
* equal to 8 bits else it is organized as uint16_t arrays.
* @notapi
*/
void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
@ -202,14 +214,14 @@ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
}
/**
* @brief Receives data from the SPI bus.
* @brief Receives data from the SPI bus.
* @note The buffers are organized as uint8_t arrays.
*
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] n number of words to receive
* @param[out] rxbuf the pointer to the receive buffer
*
* @note The buffers are organized as uint8_t arrays for data sizes below or
* equal to 8 bits else it is organized as uint16_t arrays.
* @notapi
*/
void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {

13
os/hal/platforms/LPC214x/spi_lld.h
View File

@ -18,8 +18,9 @@
*/
/**
* @file LPC214x/spi_lld.h
* @brief LPC214x low level SPI driver header.
* @file LPC214x/spi_lld.h
* @brief LPC214x low level SPI driver header.
*
* @addtogroup LPC214x_SPI
* @{
*/
@ -38,9 +39,9 @@
/*===========================================================================*/
/**
* @brief SPI1 (SSP) driver enable switch.
* @brief SPI1 (SSP) driver enable switch.
* @details If set to @p TRUE the support for SPI0 is included.
* @note The default is @p TRUE.
* @note The default is @p TRUE.
*/
#if !defined(USE_LPC214x_SPI1) || defined(__DOXYGEN__)
#define USE_LPC214x_SPI1 TRUE
@ -55,7 +56,7 @@
/*===========================================================================*/
/**
* @brief Driver configuration structure.
* @brief Driver configuration structure.
*/
typedef struct {
/**
@ -81,7 +82,7 @@ typedef struct {
} SPIConfig;
/**
* @brief Structure representing a SPI driver.
* @brief Structure representing a SPI driver.
*/
typedef struct {
/**

4
os/hal/platforms/LPC214x/vic.c
View File

@ -30,6 +30,8 @@
/**
* @brief VIC Initialization.
* @note Better reset everything in the VIC, it is a HUGE source of trouble.
*
* @notapi
*/
void vic_init(void) {
int i;
@ -52,6 +54,8 @@ void vic_init(void) {
* @param[in] handler the pointer to the IRQ service routine
* @param[in] vector the vector number
* @param[in] source the IRQ source to be associated to the vector
*
* @api
*/
void SetVICVector(void *handler, int vector, int source) {

11
os/hal/platforms/MSP430/hal_lld.c
View File

@ -18,8 +18,9 @@
*/
/**
* @file MSP430/hal_lld.c
* @brief MSP430 HAL subsystem low level driver source.
* @file MSP430/hal_lld.c
* @brief MSP430 HAL subsystem low level driver source.
*
* @addtogroup MSP430_HAL
* @{
*/
@ -32,7 +33,7 @@
/*===========================================================================*/
/**
* @brief PAL setup.
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
*/
const PALConfig pal_default_config =
@ -74,7 +75,9 @@ const PALConfig pal_default_config =
/*===========================================================================*/
/**
* @brief Low level HAL driver initialization.
* @brief Low level HAL driver initialization.
*
* @notapi
*/
void hal_lld_init(void) {

13
os/hal/platforms/MSP430/hal_lld.h
View File

@ -18,8 +18,9 @@
*/
/**
* @file MSP430/hal_lld.h
* @brief MSP430 HAL subsystem low level driver header.
* @file MSP430/hal_lld.h
* @brief MSP430 HAL subsystem low level driver header.
*
* @addtogroup MSP430_HAL
* @{
*/
@ -46,11 +47,11 @@
/*===========================================================================*/
/**
* @brief Clock source.
* @brief Clock source.
* @details The clock source can be selected from:
* - @p MSP430_CLOCK_SOURCE_XT2CLK.
* - @p MSP430_CLOCK_SOURCE_DCOCLK.
* .
* - @p MSP430_CLOCK_SOURCE_XT2CLK.
* - @p MSP430_CLOCK_SOURCE_DCOCLK.
* .
*/
#if !defined(MSP430_USE_CLOCK) || defined(__DOXYGEN__)
#define MSP430_USE_CLOCK MSP430_CLOCK_SOURCE_XT2CLK

33
os/hal/platforms/MSP430/pal_lld.c
View File

@ -18,8 +18,9 @@
*/
/**
* @file MSP430/pal_lld.c
* @brief MSP430 Digital I/O low level driver code.
* @file MSP430/pal_lld.c
* @brief MSP430 Digital I/O low level driver code.
*
* @addtogroup MSP430_PAL
* @{
*/
@ -50,12 +51,13 @@
/*===========================================================================*/
/**
* @brief MSP430 I/O ports configuration.
* @brief MSP430 I/O ports configuration.
* @note The @p PxIFG, @p PxIE and @p PxSEL registers are cleared. @p PxOUT
* and @p PxDIR are configured as specified.
*
* @param[in] config the MSP430 ports configuration
*
* @note The @p PxIFG, @p PxIE and @p PxSEL registers are cleared. @p PxOUT
* and @p PxDIR are configured as specified.
* @notapi
*/
void _pal_lld_init(const PALConfig *config) {
@ -101,21 +103,20 @@ void _pal_lld_init(const PALConfig *config) {
}
/**
* @brief Pads mode setup.
* @brief Pads mode setup.
* @details This function programs a pads group belonging to the same port
* with the specified mode.
* @note @p PAL_MODE_UNCONNECTED is implemented as output as recommended by
* the MSP430x1xx Family User's Guide. Unconnected pads are set to
* high logic state by default.
* @note This function does not alter the @p PxSEL registers. Alternate
* functions setup must be handled by device-specific code.
*
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
*
* @note This function is not meant to be invoked directly by the application
* code.
* @note @p PAL_MODE_UNCONNECTED is implemented as output as recommended by
* the MSP430x1xx Family User's Guide. Unconnected pads are set to
* high logic state by default.
* @note This function does not alter the @p PxSEL registers. Alternate
* functions setup must be handled by device-specific code.
* @notapi
*/
void _pal_lld_setgroupmode(ioportid_t port,
ioportmask_t mask,

85
os/hal/platforms/MSP430/pal_lld.h
View File

@ -18,8 +18,9 @@
*/
/**
* @file MSP430/pal_lld.h
* @brief MSP430 Digital I/O low level driver header.
* @file MSP430/pal_lld.h
* @brief MSP430 Digital I/O low level driver header.
*
* @addtogroup MSP430_PAL
* @{
*/
@ -43,7 +44,7 @@
/*===========================================================================*/
/**
* @brief Simplified MSP430 I/O port representation.
* @brief Simplified MSP430 I/O port representation.
* @details This structure represents the common part of all the MSP430 I/O
* ports.
*/
@ -54,7 +55,7 @@ struct msp430_port_common {
};
/**
* @brief Generic MSP430 I/O port.
* @brief Generic MSP430 I/O port.
*/
typedef union {
struct msp430_port_common iop_common;
@ -63,7 +64,7 @@ typedef union {
} msp430_ioport_t;
/**
* @brief Setup registers common to all the MSP430 ports.
* @brief Setup registers common to all the MSP430 ports.
*/
typedef struct {
ioregister_t out;
@ -71,7 +72,7 @@ typedef struct {
} msp430_dio_setup_t;
/**
* @brief MSP430 I/O ports static initializer.
* @brief MSP430 I/O ports static initializer.
* @details An instance of this structure must be passed to @p palInit() at
* system startup time in order to initialize the digital I/O
* subsystem. This represents only the initial setup, specific pads
@ -117,23 +118,23 @@ typedef struct {
} PALConfig;
/**
* @brief Width, in bits, of an I/O port.
* @brief Width, in bits, of an I/O port.
*/
#define PAL_IOPORTS_WIDTH 8
/**
* @brief Whole port mask.
* @brief This macro specifies all the valid bits into a port.
* @brief Whole port mask.
* @details This macro specifies all the valid bits into a port.
*/
#define PAL_WHOLE_PORT ((ioportmask_t)0xFF)
/**
* @brief Digital I/O port sized unsigned type.
* @brief Digital I/O port sized unsigned type.
*/
typedef uint8_t ioportmask_t;
/**
* @brief Port Identifier.
* @brief Port Identifier.
* @details This type can be a scalar or some kind of pointer, do not make
* any assumption about it, use the provided macros when populating
* variables of this type.
@ -145,7 +146,7 @@ typedef union msp430_ioport_t *ioportid_t;
/*===========================================================================*/
/**
* @brief I/O port A identifier.
* @brief I/O port A identifier.
* @details This port identifier is mapped on the MSP430 port 1 (P1).
*/
#if defined(__MSP430_HAS_PORT1__) || \
@ -155,7 +156,7 @@ typedef union msp430_ioport_t *ioportid_t;
#endif
/**
* @brief I/O port B identifier.
* @brief I/O port B identifier.
* @details This port identifier is mapped on the MSP430 port 2 (P2).
*/
#if defined(__MSP430_HAS_PORT2__) || \
@ -165,7 +166,7 @@ typedef union msp430_ioport_t *ioportid_t;
#endif
/**
* @brief I/O port C identifier.
* @brief I/O port C identifier.
* @details This port identifier is mapped on the MSP430 port 3 (P3).
*/
#if defined(__MSP430_HAS_PORT3__) || \
@ -175,7 +176,7 @@ typedef union msp430_ioport_t *ioportid_t;
#endif
/**
* @brief I/O port D identifier.
* @brief I/O port D identifier.
* @details This port identifier is mapped on the MSP430 port 4 (P4).
*/
#if defined(__MSP430_HAS_PORT4__) || \
@ -185,7 +186,7 @@ typedef union msp430_ioport_t *ioportid_t;
#endif
/**
* @brief I/O port E identifier.
* @brief I/O port E identifier.
* @details This port identifier is mapped on the MSP430 port 5 (P5).
*/
#if defined(__MSP430_HAS_PORT5__) || \
@ -195,7 +196,7 @@ typedef union msp430_ioport_t *ioportid_t;
#endif
/**
* @brief I/O port F identifier.
* @brief I/O port F identifier.
* @details This port identifier is mapped on the MSP430 port 6 (P6).
*/
#if defined(__MSP430_HAS_PORT6__) || \
@ -210,69 +211,67 @@ typedef union msp430_ioport_t *ioportid_t;
/*===========================================================================*/
/**
* @brief Low level PAL subsystem initialization.
* @brief Low level PAL subsystem initialization.
* @details In MSP430 programs all the ports as input.
*
* @param[in] config the MSP430 ports configuration
*
* @notapi
*/
#define pal_lld_init(config) _pal_lld_init(config)
/**
* @brief Reads the physical I/O port states.
* @brief Reads the physical I/O port states.
* @details This function is implemented by reading the PxIN register, the
* implementation has no side effects.
*
* @param[in] port the port identifier
* @return The port bits.
* @param[in] port the port identifier
* @return The port bits.
*
* @note This function is not meant to be invoked directly by the application
* code.
* @notapi
*/
#define pal_lld_readport(port) ((port)->iop_common.in.reg_p)
/**
* @brief Reads the output latch.
* @brief Reads the output latch.
* @details This function is implemented by reading the PxOUT register, the
* implementation has no side effects.
*
* @param[in] port the port identifier
* @return The latched logical states.
* @param[in] port the port identifier
* @return The latched logical states.
*
* @note This function is not meant to be invoked directly by the application
* code.
* @notapi
*/
#define pal_lld_readlatch(port) ((port)->iop_common.out.reg_p)
/**
* @brief Writes a bits mask on a I/O port.
* @brief Writes a bits mask on a I/O port.
* @details This function is implemented by writing the PxOUT register, the
* implementation has no side effects.
*
* @param[in] port the port identifier
* @param[in] bits the bits to be written on the specified port
* @param[in] port the port identifier
* @param[in] bits the bits to be written on the specified port
*
* @note This function is not meant to be invoked directly by the application
* code.
* @notapi
*/
#define pal_lld_writeport(port, bits) { \
(port)->iop_common.out.reg_p = (bits); \
}
/**
* @brief Pads group mode setup.
* @brief Pads group mode setup.
* @details This function programs a pads group belonging to the same port
* with the specified mode.
* @note @p PAL_MODE_UNCONNECTED is implemented as output as recommended by
* the MSP430x1xx Family User's Guide.
* @note This function does not alter the @p PxSEL registers. Alternate
* functions setup must be handled by device-specific code.
*
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
*
* @note This function is not meant to be invoked directly by the application
* code.
* @note @p PAL_MODE_UNCONNECTED is implemented as output as recommended by
* the MSP430x1xx Family User's Guide.
* @note This function does not alter the @p PxSEL registers. Alternate
* functions setup must be handled by device-specific code.
* @notapi
*/
#define pal_lld_setgroupmode(port, mask, mode) \
_pal_lld_setgroupmode(port, mask, mode)

26
os/hal/platforms/MSP430/serial_lld.c
View File

@ -169,6 +169,11 @@ static void usart1_deinit(void) {
/*===========================================================================*/
#if USE_MSP430_USART0 || defined(__DOXYGEN__)
/**
* @brief USART0 TX interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(USART0TX_VECTOR) {
msg_t b;
@ -185,6 +190,11 @@ CH_IRQ_HANDLER(USART0TX_VECTOR) {
CH_IRQ_EPILOGUE();
}
/**
* @brief USART0 RX interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(USART0RX_VECTOR) {
uint8_t urctl;
@ -201,6 +211,11 @@ CH_IRQ_HANDLER(USART0RX_VECTOR) {
#endif /* USE_MSP430_USART0 */
#if USE_MSP430_USART1 || defined(__DOXYGEN__)
/**
* @brief USART1 TX interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(USART1TX_VECTOR) {
msg_t b;
@ -217,6 +232,11 @@ CH_IRQ_HANDLER(USART1TX_VECTOR) {
CH_IRQ_EPILOGUE();
}
/**
* @brief USART1 RX interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(USART1RX_VECTOR) {
uint8_t urctl;
@ -238,6 +258,8 @@ CH_IRQ_HANDLER(USART1RX_VECTOR) {
/**
* @brief Low level serial driver initialization.
*
* @notapi
*/
void sd_lld_init(void) {
@ -261,6 +283,8 @@ void sd_lld_init(void) {
* @param[in] config the architecture-dependent serial driver configuration.
* If this parameter is set to @p NULL then a default
* configuration is used.
*
* @notapi
*/
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
@ -287,6 +311,8 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
* interrupt vector.
*
* @param[in] sdp pointer to a @p SerialDriver object
*
* @notapi
*/
void sd_lld_stop(SerialDriver *sdp) {

2
os/hal/platforms/MSP430/serial_lld.h
View File

@ -90,7 +90,7 @@ typedef struct {
} SerialConfig;
/**
* @brief @p SerialDriver specific data.
* @brief @p SerialDriver specific data.
*/
#define _serial_driver_data \
_base_asynchronous_channel_data \

5
os/hal/platforms/SPC56x/hal_lld.c
View File

@ -50,6 +50,8 @@
/**
* @brief Low level HAL driver initialization.
*
* @notapi
*/
void hal_lld_init(void) {
extern void _vectors(void);
@ -107,6 +109,9 @@ void hal_lld_init(void) {
* @brief SPC563 clocks and PLL initialization.
* @note All the involved constants come from the file @p board.h and
* @p hal_lld.h
* @note This function must be invoked only after the system reset.
*
* @special
*/
void spc563_clock_init(void) {

10
os/hal/platforms/SPC56x/serial_lld.c
View File

@ -215,6 +215,8 @@ static void notify2(void) {
#if USE_SPC563_ESCIA || defined(__DOXYGEN__)
/**
* @brief eSCI-A interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(vector146) {
@ -229,6 +231,8 @@ CH_IRQ_HANDLER(vector146) {
#if USE_SPC563_ESCIB || defined(__DOXYGEN__)
/**
* @brief eSCI-B interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(vector149) {
@ -246,6 +250,8 @@ CH_IRQ_HANDLER(vector149) {
/**
* @brief Low level serial driver initialization.
*
* @notapi
*/
void sd_lld_init(void) {
@ -271,6 +277,8 @@ void sd_lld_init(void) {
* @param[in] config the architecture-dependent serial driver configuration.
* If this parameter is set to @p NULL then a default
* configuration is used.
*
* @notapi
*/
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
@ -283,6 +291,8 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
* @brief Low level serial driver stop.
*
* @param[in] sdp pointer to a @p SerialDriver object
*
* @notapi
*/
void sd_lld_stop(SerialDriver *sdp) {

12
os/hal/platforms/STM32/adc_lld.c
View File

@ -54,6 +54,8 @@ ADCDriver ADCD1;
#if STM32_ADC_USE_ADC1 || defined(__DOXYGEN__)
/**
* @brief ADC1 DMA interrupt handler (channel 1).
*
* @isr
*/
CH_IRQ_HANDLER(DMA1_Ch1_IRQHandler) {
uint32_t isr;
@ -110,6 +112,8 @@ CH_IRQ_HANDLER(DMA1_Ch1_IRQHandler) {
/**
* @brief Low level ADC driver initialization.
*
* @notapi
*/
void adc_lld_init(void) {
@ -151,6 +155,8 @@ void adc_lld_init(void) {
* @brief Configures and activates the ADC peripheral.
*
* @param[in] adcp pointer to the @p ADCDriver object
*
* @notapi
*/
void adc_lld_start(ADCDriver *adcp) {
@ -177,6 +183,8 @@ void adc_lld_start(ADCDriver *adcp) {
* @brief Deactivates the ADC peripheral.
*
* @param[in] adcp pointer to the @p ADCDriver object
*
* @notapi
*/
void adc_lld_stop(ADCDriver *adcp) {
@ -198,6 +206,8 @@ void adc_lld_stop(ADCDriver *adcp) {
* @brief Starts an ADC conversion.
*
* @param[in] adcp pointer to the @p ADCDriver object
*
* @notapi
*/
void adc_lld_start_conversion(ADCDriver *adcp) {
uint32_t ccr, n;
@ -234,6 +244,8 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
* @brief Stops an ongoing conversion.
*
* @param[in] adcp pointer to the @p ADCDriver object
*
* @notapi
*/
void adc_lld_stop_conversion(ADCDriver *adcp) {

40
os/hal/platforms/STM32/can_lld.c
View File

@ -51,8 +51,10 @@ CANDriver CAND1;
/* Driver interrupt handlers. */
/*===========================================================================*/
/*
* CAN1 TX interrupt handler.
/**
* @brief CAN1 TX interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(CAN1_TX_IRQHandler) {
@ -70,7 +72,9 @@ CH_IRQ_HANDLER(CAN1_TX_IRQHandler) {
}
/*
* CAN1 RX0 interrupt handler.
* @brief CAN1 RX0 interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(CAN1_RX0_IRQHandler) {
uint32_t rf0r;
@ -99,8 +103,10 @@ CH_IRQ_HANDLER(CAN1_RX0_IRQHandler) {
CH_IRQ_EPILOGUE();
}
/*
* CAN1 RX1 interrupt handler.
/**
* @brief CAN1 RX1 interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(CAN1_RX1_IRQHandler) {
@ -111,8 +117,10 @@ CH_IRQ_HANDLER(CAN1_RX1_IRQHandler) {
CH_IRQ_EPILOGUE();
}
/*
* CAN1 SCE interrupt handler.
/**
* @brief CAN1 SCE interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(CAN1_SCE_IRQHandler) {
uint32_t msr;
@ -151,6 +159,8 @@ CH_IRQ_HANDLER(CAN1_SCE_IRQHandler) {
/**
* @brief Low level CAN driver initialization.
*
* @notapi
*/
void can_lld_init(void) {
@ -169,6 +179,8 @@ void can_lld_init(void) {
* @brief Configures and activates the CAN peripheral.
*
* @param[in] canp pointer to the @p CANDriver object
*
* @notapi
*/
void can_lld_start(CANDriver *canp) {
@ -253,6 +265,8 @@ void can_lld_start(CANDriver *canp) {
* @brief Deactivates the CAN peripheral.
*
* @param[in] canp pointer to the @p CANDriver object
*
* @notapi
*/
void can_lld_stop(CANDriver *canp) {
@ -280,6 +294,8 @@ void can_lld_stop(CANDriver *canp) {
* @return The queue space availability.
* @retval FALSE no space in the transmit queue.
* @retval TRUE transmit slot available.
*
* @notapi
*/
bool_t can_lld_can_transmit(CANDriver *canp) {
@ -291,6 +307,8 @@ bool_t can_lld_can_transmit(CANDriver *canp) {
*
* @param[in] canp pointer to the @p CANDriver object
* @param[in] ctfp pointer to the CAN frame to be transmitted
*
* @notapi
*/
void can_lld_transmit(CANDriver *canp, const CANTxFrame *ctfp) {
uint32_t tir;
@ -319,6 +337,8 @@ void can_lld_transmit(CANDriver *canp, const CANTxFrame *ctfp) {
* @return The queue space availability.
* @retval FALSE no space in the transmit queue.
* @retval TRUE transmit slot available.
*
* @notapi
*/
bool_t can_lld_can_receive(CANDriver *canp) {
@ -330,6 +350,8 @@ bool_t can_lld_can_receive(CANDriver *canp) {
*
* @param[in] canp pointer to the @p CANDriver object
* @param[out] crfp pointer to the buffer where the CAN frame is copied
*
* @notapi
*/
void can_lld_receive(CANDriver *canp, CANRxFrame *crfp) {
uint32_t r;
@ -363,6 +385,8 @@ void can_lld_receive(CANDriver *canp, CANRxFrame *crfp) {
* @brief Enters the sleep mode.
*
* @param[in] canp pointer to the @p CANDriver object
*
* @notapi
*/
void can_lld_sleep(CANDriver *canp) {
@ -373,6 +397,8 @@ void can_lld_sleep(CANDriver *canp) {
* @brief Enforces leaving the sleep mode.
*
* @param[in] canp pointer to the @p CANDriver object
*
* @notapi
*/
void can_lld_wakeup(CANDriver *canp) {

13
os/hal/platforms/STM32/hal_lld.c
View File

@ -39,7 +39,7 @@
/*===========================================================================*/
/**
* @brief PAL setup.
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
*/
const PALConfig pal_default_config =
@ -70,7 +70,9 @@ const PALConfig pal_default_config =
/*===========================================================================*/
/**
* @brief Low level HAL driver initialization.
* @brief Low level HAL driver initialization.
*
* @notapi
*/
void hal_lld_init(void) {
@ -87,8 +89,11 @@ void hal_lld_init(void) {
}
/**
* @brief STM32 clocks and PLL initialization.
* @note All the involved constants come from the file @p board.h.
* @brief STM32 clocks and PLL initialization.
* @note All the involved constants come from the file @p board.h.
* @note This function must be invoked only after the system reset.
*
* @special
*/
#if defined(STM32F10X_LD) || defined(STM32F10X_MD) || \
defined(STM32F10X_HD) || defined(__DOXYGEN__)

4
os/hal/platforms/STM32/pal_lld.c
View File

@ -81,6 +81,8 @@
* @details Ports A-D(E, F, G) clocks enabled, AFIO clock enabled.
*
* @param[in] config the STM32 ports configuration
*
* @notapi
*/
void _pal_lld_init(const PALConfig *config) {
@ -136,6 +138,8 @@ void _pal_lld_init(const PALConfig *config) {
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
*
* @notapi
*/
void _pal_lld_setgroupmode(ioportid_t port,
ioportmask_t mask,

20
os/hal/platforms/STM32/pal_lld.h
View File

@ -95,7 +95,7 @@ typedef struct {
/**
* @brief Whole port mask.
* @brief This macro specifies all the valid bits into a port.
* @details This macro specifies all the valid bits into a port.
*/
#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFF)
@ -164,6 +164,8 @@ typedef GPIO_TypeDef * ioportid_t;
/**
* @brief GPIO ports subsystem initialization.
*
* @notapi
*/
#define pal_lld_init(config) _pal_lld_init(config)
@ -176,6 +178,8 @@ typedef GPIO_TypeDef * ioportid_t;
*
* @param[in] port the port identifier
* @return The port bits.
*
* @notapi
*/
#define pal_lld_readport(port) ((port)->IDR)
@ -188,6 +192,8 @@ typedef GPIO_TypeDef * ioportid_t;
*
* @param[in] port the port identifier
* @return The latched logical states.
*
* @notapi
*/
#define pal_lld_readlatch(port) ((port)->ODR)
@ -203,6 +209,8 @@ typedef GPIO_TypeDef * ioportid_t;
*
* @param[in] port the port identifier
* @param[in] bits the bits to be written on the specified port
*
* @notapi
*/
#define pal_lld_writeport(port, bits) ((port)->ODR = (bits))
@ -218,6 +226,8 @@ typedef GPIO_TypeDef * ioportid_t;
*
* @param[in] port the port identifier
* @param[in] bits the bits to be ORed on the specified port
*
* @notapi
*/
#define pal_lld_setport(port, bits) ((port)->BSRR = (bits))
@ -233,6 +243,8 @@ typedef GPIO_TypeDef * ioportid_t;
*
* @param[in] port the port identifier
* @param[in] bits the bits to be cleared on the specified port
*
* @notapi
*/
#define pal_lld_clearport(port, bits) ((port)->BRR = (bits))
@ -251,6 +263,8 @@ typedef GPIO_TypeDef * ioportid_t;
* @param[in] offset the group bit offset within the port
* @param[in] bits the bits to be written. Values exceeding the group
* width are masked.
*
* @notapi
*/
#define pal_lld_writegroup(port, mask, offset, bits) { \
(port)->BSRR = ((~(bits) & (mask)) << (16 + (offset))) | \
@ -270,6 +284,8 @@ typedef GPIO_TypeDef * ioportid_t;
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
*
* @notapi
*/
#define pal_lld_setgroupmode(port, mask, mode) \
_pal_lld_setgroupmode(port, mask, mode)
@ -286,6 +302,8 @@ typedef GPIO_TypeDef * ioportid_t;
* @param[in] pad the pad number within the port
* @param[in] bit logical value, the value must be @p PAL_LOW or
* @p PAL_HIGH
*
* @notapi
*/
#define pal_lld_writepad(port, pad, bit) pal_lld_writegroup(port, 1, pad, bit)

41
os/hal/platforms/STM32/pwm_lld.c
View File

@ -62,7 +62,7 @@ PWMDriver PWMD3;
* @brief PWM4 driver identifier.
* @note The driver PWM4 allocates the timer TIM4 when enabled.
*/
#if defined(USE_STM32_PWM4) || defined(__DOXYGEN__)
#if defined(STM32_PWM_USE_TIM4) || defined(__DOXYGEN__)
PWMDriver PWMD4;
#endif
@ -91,7 +91,8 @@ static void stop_channels(PWMDriver *pwmp) {
pwmp->pd_tim->CCMR2 = 0; /* Channels 3 and 4 frozen. */
}
#if STM32_PWM_USE_TIM2 || STM32_PWM_USE_TIM3 || USE_STM32_PWM4 || defined(__DOXYGEN__)
#if STM32_PWM_USE_TIM2 || STM32_PWM_USE_TIM3 || STM32_PWM_USE_TIM4 || \
defined(__DOXYGEN__)
/**
* @brief Common TIM2...TIM4 IRQ handler.
* @note It is assumed that the various sources are only activated if the
@ -115,7 +116,7 @@ static void serve_interrupt(PWMDriver *pwmp) {
if ((sr & TIM_SR_UIF) != 0)
pwmp->pd_config->pc_callback();
}
#endif /* STM32_PWM_USE_TIM2 || STM32_PWM_USE_TIM3 || USE_STM32_PWM4 */
#endif /* STM32_PWM_USE_TIM2 || STM32_PWM_USE_TIM3 || STM32_PWM_USE_TIM4 */
/*===========================================================================*/
/* Driver interrupt handlers. */
@ -127,6 +128,8 @@ static void serve_interrupt(PWMDriver *pwmp) {
* @note It is assumed that this interrupt is only activated if the callback
* pointer is not equal to @p NULL in order to not perform an extra
* check in a potentially critical interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(TIM1_UP_IRQHandler) {
@ -143,6 +146,8 @@ CH_IRQ_HANDLER(TIM1_UP_IRQHandler) {
* @note It is assumed that the various sources are only activated if the
* associated callback pointer is not equal to @p NULL in order to not
* perform an extra check in a potentially critical interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(TIM1_CC_IRQHandler) {
uint16_t sr;
@ -166,7 +171,9 @@ CH_IRQ_HANDLER(TIM1_CC_IRQHandler) {
#if STM32_PWM_USE_TIM2
/**
* @brief TIM2 interrupt handler.
* @brief TIM2 interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(TIM2_IRQHandler) {
@ -180,7 +187,9 @@ CH_IRQ_HANDLER(TIM2_IRQHandler) {
#if STM32_PWM_USE_TIM3
/**
* @brief TIM3 interrupt handler.
* @brief TIM3 interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(TIM3_IRQHandler) {
@ -192,9 +201,11 @@ CH_IRQ_HANDLER(TIM3_IRQHandler) {
}
#endif /* STM32_PWM_USE_TIM3 */
#if USE_STM32_PWM4
#if STM32_PWM_USE_TIM4
/**
* @brief TIM4 interrupt handler.
* @brief TIM4 interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(TIM4_IRQHandler) {
@ -204,7 +215,7 @@ CH_IRQ_HANDLER(TIM4_IRQHandler) {
CH_IRQ_EPILOGUE();
}
#endif /* USE_STM32_PWM4 */
#endif /* STM32_PWM_USE_TIM4 */
/*===========================================================================*/
/* Driver exported functions. */
@ -212,6 +223,8 @@ CH_IRQ_HANDLER(TIM4_IRQHandler) {
/**
* @brief Low level PWM driver initialization.
*
* @notapi
*/
void pwm_lld_init(void) {
@ -248,7 +261,7 @@ void pwm_lld_init(void) {
PWMD3.pd_tim = TIM3;
#endif
#if USE_STM32_PWM4
#if STM32_PWM_USE_TIM4
/* TIM2 reset, ensures reset state in order to avoid trouble with JTAGs.*/
RCC->APB1RSTR = RCC_APB1RSTR_TIM4RST;
RCC->APB1RSTR = 0;
@ -264,6 +277,8 @@ void pwm_lld_init(void) {
* @brief Configures and activates the PWM peripheral.
*
* @param[in] pwmp pointer to a @p PWMDriver object
*
* @notapi
*/
void pwm_lld_start(PWMDriver *pwmp) {
uint16_t ccer;
@ -293,7 +308,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
RCC->APB1ENR |= RCC_APB1ENR_TIM3EN;
}
#endif
#if USE_STM32_PWM4
#if STM32_PWM_USE_TIM4
if (&PWMD4 == pwmp) {
NVICEnableVector(TIM4_IRQn,
CORTEX_PRIORITY_MASK(STM32_PWM_PWM4_IRQ_PRIORITY));
@ -358,6 +373,8 @@ void pwm_lld_start(PWMDriver *pwmp) {
* @brief Deactivates the PWM peripheral.
*
* @param[in] pwmp pointer to a @p PWMDriver object
*
* @notapi
*/
void pwm_lld_stop(PWMDriver *pwmp) {
/* If in ready state then disables the PWM clock.*/
@ -401,6 +418,8 @@ void pwm_lld_stop(PWMDriver *pwmp) {
* @param[in] pwmp pointer to a @p PWMDriver object
* @param[in] channel PWM channel identifier
* @param[in] width PWM pulse width as clock pulses number
*
* @notapi
*/
void pwm_lld_enable_channel(PWMDriver *pwmp,
pwmchannel_t channel,
@ -476,6 +495,8 @@ void pwm_lld_enable_channel(PWMDriver *pwmp,
*
* @param[in] pwmp pointer to a @p PWMDriver object
* @param[in] channel PWM channel identifier
*
* @notapi
*/
void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) {

31
os/hal/platforms/STM32/serial_lld.c
View File

@ -222,6 +222,11 @@ static void notify5(void) {
/*===========================================================================*/
#if STM32_SERIAL_USE_USART1 || defined(__DOXYGEN__)
/**
* @brief USART1 interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(USART1_IRQHandler) {
CH_IRQ_PROLOGUE();
@ -233,6 +238,11 @@ CH_IRQ_HANDLER(USART1_IRQHandler) {
#endif
#if STM32_SERIAL_USE_USART2 || defined(__DOXYGEN__)
/**
* @brief USART2 interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(USART2_IRQHandler) {
CH_IRQ_PROLOGUE();
@ -244,6 +254,11 @@ CH_IRQ_HANDLER(USART2_IRQHandler) {
#endif
#if STM32_SERIAL_USE_USART3 || defined(__DOXYGEN__)
/**
* @brief USART3 interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(USART3_IRQHandler) {
CH_IRQ_PROLOGUE();
@ -255,6 +270,11 @@ CH_IRQ_HANDLER(USART3_IRQHandler) {
#endif
#if STM32_SERIAL_USE_UART4 || defined(__DOXYGEN__)
/**
* @brief UART4 interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(UART4_IRQHandler) {
CH_IRQ_PROLOGUE();
@ -266,6 +286,11 @@ CH_IRQ_HANDLER(UART4_IRQHandler) {
#endif
#if STM32_SERIAL_USE_UART5 || defined(__DOXYGEN__)
/**
* @brief UART5 interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(UART5_IRQHandler) {
CH_IRQ_PROLOGUE();
@ -282,6 +307,8 @@ CH_IRQ_HANDLER(UART5_IRQHandler) {
/**
* @brief Low level serial driver initialization.
*
* @notapi
*/
void sd_lld_init(void) {
@ -318,6 +345,8 @@ void sd_lld_init(void) {
* @param[in] config the architecture-dependent serial driver configuration.
* If this parameter is set to @p NULL then a default
* configuration is used.
*
* @notapi
*/
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
@ -370,6 +399,8 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
* interrupt vector.
*
* @param[in] sdp pointer to a @p SerialDriver object
*
* @notapi
*/
void sd_lld_stop(SerialDriver *sdp) {

30
os/hal/platforms/STM32/spi_lld.c
View File

@ -90,6 +90,8 @@ static void spi_start_wait(SPIDriver *spip) {
#if STM32_SPI_USE_SPI1 || defined(__DOXYGEN__)
/**
* @brief SPI1 RX DMA interrupt handler (channel 2).
*
* @isr
*/
CH_IRQ_HANDLER(DMA1_Ch2_IRQHandler) {
@ -106,6 +108,8 @@ CH_IRQ_HANDLER(DMA1_Ch2_IRQHandler) {
/**
* @brief SPI1 TX DMA interrupt handler (channel 3).
*
* @isr
*/
CH_IRQ_HANDLER(DMA1_Ch3_IRQHandler) {
@ -121,6 +125,8 @@ CH_IRQ_HANDLER(DMA1_Ch3_IRQHandler) {
#if STM32_SPI_USE_SPI2 || defined(__DOXYGEN__)
/**
* @brief SPI2 RX DMA interrupt handler (channel 4).
*
* @isr
*/
CH_IRQ_HANDLER(DMA1_Ch4_IRQHandler) {
@ -137,6 +143,8 @@ CH_IRQ_HANDLER(DMA1_Ch4_IRQHandler) {
/**
* @brief SPI2 TX DMA interrupt handler (channel 5).
*
* @isr
*/
CH_IRQ_HANDLER(DMA1_Ch5_IRQHandler) {
@ -152,6 +160,8 @@ CH_IRQ_HANDLER(DMA1_Ch5_IRQHandler) {
#if STM32_SPI_USE_SPI3 || defined(__DOXYGEN__)
/**
* @brief SPI3 RX DMA interrupt handler (DMA2, channel 1).
*
* @isr
*/
CH_IRQ_HANDLER(DMA2_Ch1_IRQHandler) {
@ -168,6 +178,8 @@ CH_IRQ_HANDLER(DMA2_Ch1_IRQHandler) {
/**
* @brief SPI3 TX DMA2 interrupt handler (DMA2, channel 2).
*
* @isr
*/
CH_IRQ_HANDLER(DMA2_Ch2_IRQHandler) {
@ -186,6 +198,8 @@ CH_IRQ_HANDLER(DMA2_Ch2_IRQHandler) {
/**
* @brief Low level SPI driver initialization.
*
* @notapi
*/
void spi_lld_init(void) {
@ -224,6 +238,8 @@ void spi_lld_init(void) {
* @brief Configures and activates the SPI peripheral.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @notapi
*/
void spi_lld_start(SPIDriver *spip) {
@ -284,6 +300,8 @@ void spi_lld_start(SPIDriver *spip) {
* @brief Deactivates the SPI peripheral.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @notapi
*/
void spi_lld_stop(SPIDriver *spip) {
@ -324,6 +342,8 @@ void spi_lld_stop(SPIDriver *spip) {
* @brief Asserts the slave select signal and prepares for transfers.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @notapi
*/
void spi_lld_select(SPIDriver *spip) {
@ -335,6 +355,8 @@ void spi_lld_select(SPIDriver *spip) {
* @details The previously selected peripheral is unselected.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @notapi
*/
void spi_lld_unselect(SPIDriver *spip) {
@ -349,6 +371,8 @@ void spi_lld_unselect(SPIDriver *spip) {
*
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] n number of words to be ignored
*
* @notapi
*/
void spi_lld_ignore(SPIDriver *spip, size_t n) {
uint16_t dummyrx;
@ -371,6 +395,8 @@ void spi_lld_ignore(SPIDriver *spip, size_t n) {
* @param[in] n number of words to be exchanged
* @param[in] txbuf the pointer to the transmit buffer
* @param[out] rxbuf the pointer to the receive buffer
*
* @notapi
*/
void spi_lld_exchange(SPIDriver *spip, size_t n,
const void *txbuf, void *rxbuf) {
@ -390,6 +416,8 @@ void spi_lld_exchange(SPIDriver *spip, size_t n,
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] n number of words to send
* @param[in] txbuf the pointer to the transmit buffer
*
* @notapi
*/
void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
uint16_t dummyrx;
@ -409,6 +437,8 @@ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] n number of words to receive
* @param[out] rxbuf the pointer to the receive buffer
*
* @notapi
*/
void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {
uint16_t dummytx = 0xFFFF;

6
os/hal/platforms/STM32/stm32_dma.c
View File

@ -54,6 +54,8 @@ static cnt_t dmacnt2;
/**
* @brief STM32 DMA helper initialization.
*
* @init
*/
void dmaInit(void) {
int i;
@ -74,6 +76,8 @@ void dmaInit(void) {
* @brief Enables the specified DMA controller clock.
*
* @param[in] dma the DMA controller id
*
* @api
*/
void dmaEnable(uint32_t dma) {
@ -99,6 +103,8 @@ void dmaEnable(uint32_t dma) {
* @brief Disables the specified DMA controller clock.
*
* @param[in] dma the DMA controller id
*
* @api
*/
void dmaDisable(uint32_t dma) {

16
os/hal/platforms/STM32/stm32_dma.h
View File

@ -130,6 +130,8 @@ typedef struct {
*
* @param[in] dmachp dmachp to a stm32_dma_channel_t structure
* @param[in] cpar value to be written in the CPAR register
*
* @api
*/
#define dmaChannelSetPeripheral(dmachp, cpar) { \
(dmachp)->CPAR = (uint32_t)(cpar); \
@ -145,6 +147,8 @@ typedef struct {
* @param[in] cndtr value to be written in the CNDTR register
* @param[in] cmar value to be written in the CMAR register
* @param[in] ccr value to be written in the CCR register
*
* @api
*/
#define dmaChannelSetup(dmachp, cndtr, cmar, ccr) { \
(dmachp)->CNDTR = (uint32_t)(cndtr); \
@ -156,6 +160,8 @@ typedef struct {
* @brief DMA channel enable by channel pointer.
*
* @param[in] dmachp dmachp to a stm32_dma_channel_t structure
*
* @api
*/
#define dmaChannelEnable(dmachp) { \
(dmachp)->CCR |= DMA_CCR1_EN; \
@ -166,6 +172,8 @@ typedef struct {
* @brief DMA channel disable by channel pointer.
*
* @param[in] dmachp dmachp to a stm32_dma_channel_t structure
*
* @api
*/
#define dmaChannelDisable(dmachp) { \
(dmachp)->CCR = 0; \
@ -184,6 +192,8 @@ typedef struct {
* @param[in] cndtr value to be written in the CNDTR register
* @param[in] cmar value to be written in the CMAR register
* @param[in] ccr value to be written in the CCR register
*
* @api
*/
#define dmaSetupChannel(dmap, ch, cndtr, cmar, ccr) { \
dmaChannelSetup(&(dmap)->channels[ch], (cndtr), (cmar), (ccr)); \
@ -196,6 +206,8 @@ typedef struct {
*
* @param[in] dmap pointer to a stm32_dma_t structure
* @param[in] ch channel number
*
* @api
*/
#define dmaEnableChannel(dmap, ch) { \
dmaChannelEnable(&(dmap)->channels[ch]); \
@ -208,6 +220,8 @@ typedef struct {
*
* @param[in] dmap pointer to a stm32_dma_t structure
* @param[in] ch channel number
*
* @api
*/
#define dmaDisableChannel(dmap, ch) { \
dmaChannelDisable(&(dmap)->channels[ch]); \
@ -222,6 +236,8 @@ typedef struct {
*
* @param[in] dmap pointer to a stm32_dma_t structure
* @param[in] ch channel number
*
* @api
*/
#define dmaClearChannel(dmap, ch){ \
(dmap)->IFCR = 1 << ((ch) * 4); \

32
os/hal/platforms/STM32/uart_lld.c
View File

@ -225,6 +225,8 @@ static void serve_usart_irq(UARTDriver *uartp) {
#if STM32_UART_USE_USART1 || defined(__DOXYGEN__)
/**
* @brief USART1 RX DMA interrupt handler (channel 5).
*
* @isr
*/
CH_IRQ_HANDLER(DMA1_Ch5_IRQHandler) {
UARTDriver *uartp;
@ -256,6 +258,8 @@ CH_IRQ_HANDLER(DMA1_Ch5_IRQHandler) {
/**
* @brief USART1 TX DMA interrupt handler (channel 4).
*
* @isr
*/
CH_IRQ_HANDLER(DMA1_Ch4_IRQHandler) {
@ -273,6 +277,8 @@ CH_IRQ_HANDLER(DMA1_Ch4_IRQHandler) {
/**
* @brief USART1 IRQ handler.
*
* @isr
*/
CH_IRQ_HANDLER(USART1_IRQHandler) {
@ -287,6 +293,8 @@ CH_IRQ_HANDLER(USART1_IRQHandler) {
#if STM32_UART_USE_USART2 || defined(__DOXYGEN__)
/**
* @brief USART2 RX DMA interrupt handler (channel 6).
*
* @isr
*/
CH_IRQ_HANDLER(DMA1_Ch6_IRQHandler) {
UARTDriver *uartp;
@ -318,6 +326,8 @@ CH_IRQ_HANDLER(DMA1_Ch6_IRQHandler) {
/**
* @brief USART2 TX DMA interrupt handler (channel 7).
*
* @isr
*/
CH_IRQ_HANDLER(DMA1_Ch7_IRQHandler) {
@ -335,6 +345,8 @@ CH_IRQ_HANDLER(DMA1_Ch7_IRQHandler) {
/**
* @brief USART2 IRQ handler.
*
* @isr
*/
CH_IRQ_HANDLER(USART2_IRQHandler) {
@ -349,6 +361,8 @@ CH_IRQ_HANDLER(USART2_IRQHandler) {
#if STM32_UART_USE_USART3 || defined(__DOXYGEN__)
/**
* @brief USART3 RX DMA interrupt handler (channel 3).
*
* @isr
*/
CH_IRQ_HANDLER(DMA1_Ch3_IRQHandler) {
UARTDriver *uartp;
@ -380,6 +394,8 @@ CH_IRQ_HANDLER(DMA1_Ch3_IRQHandler) {
/**
* @brief USART3 TX DMA interrupt handler (channel 2).
*
* @isr
*/
CH_IRQ_HANDLER(DMA1_Ch2_IRQHandler) {
@ -397,6 +413,8 @@ CH_IRQ_HANDLER(DMA1_Ch2_IRQHandler) {
/**
* @brief USART3 IRQ handler.
*
* @isr
*/
CH_IRQ_HANDLER(USART3_IRQHandler) {
@ -414,6 +432,8 @@ CH_IRQ_HANDLER(USART3_IRQHandler) {
/**
* @brief Low level UART driver initialization.
*
* @notapi
*/
void uart_lld_init(void) {
@ -455,6 +475,8 @@ void uart_lld_init(void) {
* @brief Configures and activates the UART peripheral.
*
* @param[in] uartp pointer to the @p UARTDriver object
*
* @notapi
*/
void uart_lld_start(UARTDriver *uartp) {
@ -519,6 +541,8 @@ void uart_lld_start(UARTDriver *uartp) {
* @brief Deactivates the UART peripheral.
*
* @param[in] uartp pointer to the @p UARTDriver object
*
* @notapi
*/
void uart_lld_stop(UARTDriver *uartp) {
@ -568,6 +592,8 @@ void uart_lld_stop(UARTDriver *uartp) {
* @param[in] uartp pointer to the @p UARTDriver object
* @param[in] n number of data frames to send
* @param[in] txbuf the pointer to the transmit buffer
*
* @notapi
*/
void uart_lld_start_send(UARTDriver *uartp, size_t n, const void *txbuf) {
@ -586,6 +612,8 @@ void uart_lld_start_send(UARTDriver *uartp, size_t n, const void *txbuf) {
*
* @return The number of data frames not transmitted by the
* stopped transmit operation.
*
* @notapi
*/
size_t uart_lld_stop_send(UARTDriver *uartp) {
@ -602,6 +630,8 @@ size_t uart_lld_stop_send(UARTDriver *uartp) {
* @param[in] uartp pointer to the @p UARTDriver object
* @param[in] n number of data frames to send
* @param[in] rxbuf the pointer to the receive buffer
*
* @notapi
*/
void uart_lld_start_receive(UARTDriver *uartp, size_t n, void *rxbuf) {
@ -624,6 +654,8 @@ void uart_lld_start_receive(UARTDriver *uartp, size_t n, void *rxbuf) {
*
* @return The number of data frames not received by the
* stopped receive operation.
*
* @notapi
*/
size_t uart_lld_stop_receive(UARTDriver *uartp) {
size_t n;

2
os/hal/platforms/STM8/hal_lld.c
View File

@ -73,6 +73,8 @@ ROMCONST PALConfig pal_default_config =
/**
* @brief Low level HAL driver initialization.
*
* @notapi
*/
void hal_lld_init(void) {

2
os/hal/platforms/STM8/pal_lld.c
View File

@ -61,6 +61,8 @@
* @param[in] port the port identifier
* @param[in] mask the group mask
* @param[in] mode the mode
*
* @notapi
*/
void _pal_lld_setgroupmode(ioportid_t port,
ioportmask_t mask,

10
os/hal/platforms/STM8/pal_lld.h
View File

@ -156,6 +156,8 @@ typedef GPIO_TypeDef *ioportid_t;
* @brief Low level PAL subsystem initialization.
*
* @param[in] config architecture-dependent ports configuration
*
* @notapi
*/
#define pal_lld_init(config) *IOPORTS = *(config)
@ -166,6 +168,8 @@ typedef GPIO_TypeDef *ioportid_t;
*
* @param[in] port port identifier
* @return The port bits.
*
* @notapi
*/
#define pal_lld_readport(port) ((port)->IDR)
@ -178,6 +182,8 @@ typedef GPIO_TypeDef *ioportid_t;
*
* @param[in] port port identifier
* @return The latched logical states.
*
* @notapi
*/
#define pal_lld_readlatch(port) ((port)->ODR)
@ -188,6 +194,8 @@ typedef GPIO_TypeDef *ioportid_t;
*
* @param[in] port port identifier
* @param[in] bits bits to be written on the specified port
*
* @notapi
*/
#define pal_lld_writeport(port, bits) ((port)->ODR = (bits))
@ -203,6 +211,8 @@ typedef GPIO_TypeDef *ioportid_t;
* @param[in] port port identifier
* @param[in] mask group mask
* @param[in] mode group mode
*
* @notapi
*/
#define pal_lld_setgroupmode(port, mask, mode) \
_pal_lld_setgroupmode(port, mask, mode)

36
os/hal/platforms/STM8/serial_lld.c
View File

@ -217,6 +217,11 @@ static void uart3_deinit(void) {
/*===========================================================================*/
#if USE_STM8_UART1 || defined(__DOXYGEN__)
/**
* @brief IRQ 17 service routine.
*
* @isr
*/
CH_IRQ_HANDLER(17) {
msg_t b;
@ -233,6 +238,11 @@ CH_IRQ_HANDLER(17) {
CH_IRQ_EPILOGUE();
}
/**
* @brief IRQ 18 service routine.
*
* @isr
*/
CH_IRQ_HANDLER(18) {
uint8_t sr = UART1->SR;
@ -250,6 +260,11 @@ CH_IRQ_HANDLER(18) {
#endif /* USE_STM8_UART1 */
#if USE_STM8_UART2 || defined(__DOXYGEN__)
/**
* @brief IRQ 20 service routine.
*
* @isr
*/
CH_IRQ_HANDLER(20) {
msg_t b;
@ -266,6 +281,11 @@ CH_IRQ_HANDLER(20) {
CH_IRQ_EPILOGUE();
}
/**
* @brief IRQ 21 service routine.
*
* @isr
*/
CH_IRQ_HANDLER(21) {
uint8_t sr = UART2->SR;
@ -283,6 +303,11 @@ CH_IRQ_HANDLER(21) {
#endif /* USE_STM8_UART2 */
#if USE_STM8_UART3 || defined(__DOXYGEN__)
/**
* @brief IRQ 20 service routine.
*
* @isr
*/
CH_IRQ_HANDLER(20) {
msg_t b;
@ -299,6 +324,11 @@ CH_IRQ_HANDLER(20) {
CH_IRQ_EPILOGUE();
}
/**
* @brief IRQ 21 service routine.
*
* @isr
*/
CH_IRQ_HANDLER(21) {
uint8_t sr = UART3->SR;
@ -321,6 +351,8 @@ CH_IRQ_HANDLER(21) {
/**
* @brief Low level serial driver initialization.
*
* @notapi
*/
void sd_lld_init(void) {
@ -350,6 +382,8 @@ void sd_lld_init(void) {
* @param[in] config the architecture-dependent serial driver configuration.
* If this parameter is set to @p NULL then a default
* configuration is used.
*
* @notapi
*/
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
@ -382,6 +416,8 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
* interrupt vector.
*
* @param[in] sdp pointer to a @p SerialDriver object
*
* @notapi
*/
void sd_lld_stop(SerialDriver *sdp) {

20
os/hal/src/adc.c
View File

@ -48,6 +48,8 @@
/**
* @brief ADC Driver initialization.
*
* @init
*/
void adcInit(void) {
@ -58,6 +60,8 @@ void adcInit(void) {
* @brief Initializes the standard part of a @p ADCDriver structure.
*
* @param[in] adcp pointer to the @p ADCDriver object
*
* @init
*/
void adcObjectInit(ADCDriver *adcp) {
@ -77,6 +81,8 @@ void adcObjectInit(ADCDriver *adcp) {
*
* @param[in] adcp pointer to the @p ADCDriver object
* @param[in] config pointer to the @p ADCConfig object
*
* @api
*/
void adcStart(ADCDriver *adcp, const ADCConfig *config) {
@ -96,6 +102,8 @@ void adcStart(ADCDriver *adcp, const ADCConfig *config) {
* @brief Deactivates the ADC peripheral.
*
* @param[in] adcp pointer to the @p ADCDriver object
*
* @api
*/
void adcStop(ADCDriver *adcp) {
@ -139,6 +147,8 @@ void adcStop(ADCDriver *adcp) {
* @return The operation status.
* @retval FALSE the conversion has been started.
* @retval TRUE the driver is busy, conversion not started.
*
* @api
*/
bool_t adcStartConversion(ADCDriver *adcp,
const ADCConversionGroup *grpp,
@ -182,6 +192,8 @@ bool_t adcStartConversion(ADCDriver *adcp,
* @return The operation status.
* @retval FALSE the conversion has been started.
* @retval TRUE the driver is busy, conversion not started.
*
* @iclass
*/
bool_t adcStartConversionI(ADCDriver *adcp,
const ADCConversionGroup *grpp,
@ -216,6 +228,8 @@ bool_t adcStartConversionI(ADCDriver *adcp,
* being processed then the function does nothing.
*
* @param[in] adcp pointer to the @p ADCDriver object
*
* @api
*/
void adcStopConversion(ADCDriver *adcp) {
@ -248,6 +262,8 @@ void adcStopConversion(ADCDriver *adcp) {
* being processed then the function does nothing.
*
* @param[in] adcp pointer to the @p ADCDriver object
*
* @iclass
*/
void adcStopConversionI(ADCDriver *adcp) {
@ -275,6 +291,8 @@ void adcStopConversionI(ADCDriver *adcp) {
* @brief Waits for completion.
* @details If the conversion is not completed or not yet started then the
* invoking thread waits for a conversion completion event.
* @pre In order to use this function the option @p ADC_USE_WAIT must be
* enabled.
*
* @param[in] adcp pointer to the @p ADCDriver object
* @param[in] timeout the number of ticks before the operation timeouts,
@ -285,6 +303,8 @@ void adcStopConversionI(ADCDriver *adcp) {
* @return The operation result.
* @retval RDY_OK conversion finished.
* @retval RDY_TIMEOUT conversion not finished within the specified time.
*
* @init
*/
msg_t adcWaitConversion(ADCDriver *adcp, systime_t timeout) {

21
os/hal/src/can.c
View File

@ -48,6 +48,8 @@
/**
* @brief CAN Driver initialization.
*
* @init
*/
void canInit(void) {
@ -58,6 +60,8 @@ void canInit(void) {
* @brief Initializes the standard part of a @p CANDriver structure.
*
* @param[in] canp pointer to the @p CANDriver object
*
* @init
*/
void canObjectInit(CANDriver *canp) {
@ -80,6 +84,8 @@ void canObjectInit(CANDriver *canp) {
*
* @param[in] canp pointer to the @p CANDriver object
* @param[in] config pointer to the @p CANConfig object
*
* @api
*/
void canStart(CANDriver *canp, const CANConfig *config) {
@ -105,6 +111,8 @@ void canStart(CANDriver *canp, const CANConfig *config) {
* @brief Deactivates the CAN peripheral.
*
* @param[in] canp pointer to the @p CANDriver object
*
* @api
*/
void canStop(CANDriver *canp) {
@ -140,6 +148,8 @@ void canStop(CANDriver *canp) {
* @retval RDY_OK the frame has been queued for transmission.
* @retval RDY_TIMEOUT operation not finished within the specified time.
* @retval RDY_RESET driver stopped while waiting.
*
* @api
*/
msg_t canTransmit(CANDriver *canp, const CANTxFrame *ctfp, systime_t timeout) {
@ -181,6 +191,8 @@ msg_t canTransmit(CANDriver *canp, const CANTxFrame *ctfp, systime_t timeout) {
* frame not immediately available if invoked using
* @p TIME_IMMEDIATE.
* @retval RDY_RESET driver stopped while waiting.
*
* @api
*/
msg_t canReceive(CANDriver *canp, CANRxFrame *crfp, systime_t timeout) {
@ -207,6 +219,8 @@ msg_t canReceive(CANDriver *canp, CANRxFrame *crfp, systime_t timeout) {
*
* @param[in] canp pointer to the @p CANDriver object
* @return The status flags mask.
*
* @api
*/
canstatus_t canGetAndClearFlags(CANDriver *canp) {
canstatus_t status;
@ -221,8 +235,15 @@ canstatus_t canGetAndClearFlags(CANDriver *canp) {
#if CAN_USE_SLEEP_MODE || defined(__DOXYGEN__)
/**
* @brief Enters the sleep mode.
* @details This function puts the CAN driver in sleep mode and broadcasts
* the @p cd_sleep_event event source.
* @pre In order to use this function the option @p CAN_USE_SLEEP_MODE must
* be enabled and the @p CAN_SUPPORTS_SLEEP mode must be supported
* by the low level driver.
*
* @param[in] canp pointer to the @p CANDriver object
*
* @api
*/
void canSleep(CANDriver *canp) {

2
os/hal/src/hal.c
View File

@ -46,6 +46,8 @@
/**
* @brief HAL initialization.
*
* @init
*/
void halInit(void) {

30
os/hal/src/i2c.c
View File

@ -48,6 +48,8 @@
/**
* @brief I2C Driver initialization.
*
* @init
*/
void i2cInit(void) {
@ -58,6 +60,8 @@ void i2cInit(void) {
* @brief Initializes the standard part of a @p I2CDriver structure.
*
* @param[in] i2cp pointer to the @p I2CDriver object
*
* @init
*/
void i2cObjectInit(I2CDriver *i2cp) {
@ -70,6 +74,8 @@ void i2cObjectInit(I2CDriver *i2cp) {
*
* @param[in] i2cp pointer to the @p I2CDriver object
* @param[in] config pointer to the @p I2CConfig object
*
* @api
*/
void i2cStart(I2CDriver *i2cp, const I2CConfig *config) {
@ -89,6 +95,8 @@ void i2cStart(I2CDriver *i2cp, const I2CConfig *config) {
* @brief Deactivates the I2C peripheral.
*
* @param[in] i2cp pointer to the @p I2CDriver object
*
* @api
*/
void i2cStop(I2CDriver *i2cp) {
@ -111,6 +119,8 @@ void i2cStop(I2CDriver *i2cp) {
* @param[in] i2cp pointer to the @p I2CDriver object
* @param[in] header transaction header
* @param[in] callback operation complete callback
*
* @iclass
*/
void i2cMasterStartI(I2CDriver *i2cp,
uint16_t header,
@ -129,6 +139,8 @@ void i2cMasterStartI(I2CDriver *i2cp,
*
* @param[in] i2cp pointer to the @p I2CDriver object
* @param[in] callback operation complete callback
*
* @iclass
*/
void i2cMasterStopI(I2CDriver *i2cp, i2ccallback_t callback) {
@ -147,6 +159,8 @@ void i2cMasterStopI(I2CDriver *i2cp, i2ccallback_t callback) {
*
* @param[in] i2cp pointer to the @p I2CDriver object
* @param[in] callback operation complete callback
*
* @iclass
*/
void i2cMasterRestartI(I2CDriver *i2cp, i2ccallback_t callback) {
@ -165,6 +179,8 @@ void i2cMasterRestartI(I2CDriver *i2cp, i2ccallback_t callback) {
* @param[in] n number of bytes to be transmitted
* @param[in] txbuf transmit data buffer pointer
* @param[in] callback operation complete callback
*
* @iclass
*/
void i2cMasterTransmitI(I2CDriver *i2cp, size_t n, const uint8_t *txbuf,
i2ccallback_t callback) {
@ -185,6 +201,8 @@ void i2cMasterTransmitI(I2CDriver *i2cp, size_t n, const uint8_t *txbuf,
* @param[in] n number of bytes to be transmitted
* @param[in] rxbuf receive data buffer pointer
* @param[in] callback operation complete callback
*
* @iclass
*/
void i2cMasterReceiveI(I2CDriver *i2cp, size_t n, uint8_t *rxbuf,
i2ccallback_t callback) {
@ -203,11 +221,13 @@ void i2cMasterReceiveI(I2CDriver *i2cp, size_t n, uint8_t *rxbuf,
* @brief Gains exclusive access to the I2C bus.
* @details This function tries to gain ownership to the I2C bus, if the bus
* is already being used then the invoking thread is queued.
* @note This function is only available when the @p I2C_USE_MUTUAL_EXCLUSION
* option is set to @p TRUE.
* @pre In order to use this function the option @p I2C_USE_MUTUAL_EXCLUSION
* must be enabled.
*
* @param[in] i2cp pointer to the @p I2CDriver object
*
* @api
*
*/
void i2cAcquireBus(I2CDriver *i2cp) {
@ -222,10 +242,12 @@ void i2cAcquireBus(I2CDriver *i2cp) {
/**
* @brief Releases exclusive access to the I2C bus.
* @note This function is only available when the @p I2C_USE_MUTUAL_EXCLUSION
* option is set to @p TRUE.
* @pre In order to use this function the option @p I2C_USE_MUTUAL_EXCLUSION
* must be enabled.
*
* @param[in] i2cp pointer to the @p I2CDriver object
*
* @api
*/
void i2cReleaseBus(I2CDriver *i2cp) {

17
os/hal/src/mac.c
View File

@ -52,6 +52,8 @@
/**
* @brief MAC Driver initialization.
*
* @init
*/
void macInit(void) {
@ -62,6 +64,8 @@ void macInit(void) {
* @brief Initialize the standard part of a @p MACDriver structure.
*
* @param[in] macp pointer to the @p MACDriver object
*
* @init
*/
void macObjectInit(MACDriver *macp) {
@ -74,7 +78,7 @@ void macObjectInit(MACDriver *macp) {
/**
* @brief MAC address setup.
* @note This function must be invoked only with the driver in the stopped
* @pre This function must be invoked with the driver in the stopped
* state. If invoked on an active interface then it is ignored.
*
* @param[in] macp pointer to the @p MACDriver object
@ -82,6 +86,7 @@ void macObjectInit(MACDriver *macp) {
* address. If this parameter is set to @p NULL then MAC
* a system default is used.
*
* @api
*/
void macSetAddress(MACDriver *macp, const uint8_t *p) {
@ -104,6 +109,8 @@ void macSetAddress(MACDriver *macp, const uint8_t *p) {
* @return The operation status.
* @retval RDY_OK the descriptor was obtained.
* @retval RDY_TIMEOUT the operation timed out, descriptor not initialized.
*
* @api
*/
msg_t macWaitTransmitDescriptor(MACDriver *macp,
MACTransmitDescriptor *tdp,
@ -128,6 +135,8 @@ msg_t macWaitTransmitDescriptor(MACDriver *macp,
* enqueued data as a single frame.
*
* @param[in] tdp the pointer to the @p MACTransmitDescriptor structure
*
* @api
*/
void macReleaseTransmitDescriptor(MACTransmitDescriptor *tdp) {
@ -150,6 +159,8 @@ void macReleaseTransmitDescriptor(MACTransmitDescriptor *tdp) {
* @return The operation status.
* @retval RDY_OK the descriptor was obtained.
* @retval RDY_TIMEOUT the operation timed out, descriptor not initialized.
*
* @api
*/
msg_t macWaitReceiveDescriptor(MACDriver *macp,
MACReceiveDescriptor *rdp,
@ -175,6 +186,8 @@ msg_t macWaitReceiveDescriptor(MACDriver *macp,
* frames.
*
* @param[in] rdp the pointer to the @p MACReceiveDescriptor structure
*
* @api
*/
void macReleaseReceiveDescriptor(MACReceiveDescriptor *rdp) {
@ -188,6 +201,8 @@ void macReleaseReceiveDescriptor(MACReceiveDescriptor *rdp) {
* @return The link status.
* @retval TRUE if the link is active.
* @retval FALSE if the link is down.
*
* @api
*/
bool_t macPollLinkStatus(MACDriver *macp) {

54
os/hal/src/mmc_spi.c
View File

@ -46,8 +46,10 @@
* @brief Inserion monitor timer callback function.
*
* @param[in] p pointer to the @p MMCDriver object
*
* @notapi
*/
void tmrfunc(void *p) {
static void tmrfunc(void *p) {
MMCDriver *mmcp = p;
if (mmcp->mmc_cnt > 0) {
@ -74,6 +76,8 @@ void tmrfunc(void *p) {
* @brief Waits an idle condition.
*
* @param[in] mmcp pointer to the @p MMCDriver object
*
* @notapi
*/
static void wait(MMCDriver *mmcp) {
int i;
@ -102,6 +106,8 @@ static void wait(MMCDriver *mmcp) {
* @param[in] mmcp pointer to the @p MMCDriver object
* @param cmd[in] the command id
* @param arg[in] the command argument
*
* @notapi
*/
static void send_hdr(MMCDriver *mmcp, uint8_t cmd, uint32_t arg) {
uint8_t buf[6];
@ -124,6 +130,8 @@ static void send_hdr(MMCDriver *mmcp, uint8_t cmd, uint32_t arg) {
* @param[in] mmcp pointer to the @p MMCDriver object
* @return The response as an @p uint8_t value.
* @retval 0xFF timed out.
*
* @notapi
*/
static uint8_t recvr1(MMCDriver *mmcp) {
int i;
@ -145,6 +153,8 @@ static uint8_t recvr1(MMCDriver *mmcp) {
* @param arg[in] the command argument
* @return The response as an @p uint8_t value.
* @retval 0xFF timed out.
*
* @notapi
*/
static uint8_t send_command(MMCDriver *mmcp, uint8_t cmd, uint32_t arg) {
uint8_t r1;
@ -160,6 +170,8 @@ static uint8_t send_command(MMCDriver *mmcp, uint8_t cmd, uint32_t arg) {
* @brief Waits that the card reaches an idle state.
*
* @param[in] mmcp pointer to the @p MMCDriver object
*
* @notapi
*/
static void sync(MMCDriver *mmcp) {
uint8_t buf[1];
@ -182,6 +194,8 @@ static void sync(MMCDriver *mmcp) {
/**
* @brief MMC over SPI driver initialization.
*
* @init
*/
void mmcInit(void) {
@ -198,6 +212,8 @@ void mmcInit(void) {
* setting
* @param[in] is_inserted function that returns the card insertion sensor
* status
*
* @init
*/
void mmcObjectInit(MMCDriver *mmcp, SPIDriver *spip,
const SPIConfig *lscfg, const SPIConfig *hscfg,
@ -219,6 +235,8 @@ void mmcObjectInit(MMCDriver *mmcp, SPIDriver *spip,
*
* @param[in] mmcp pointer to the @p MMCDriver object
* @param[in] config pointer to the @p MMCConfig object
*
* @api
*/
void mmcStart(MMCDriver *mmcp, const MMCConfig *config) {
@ -237,6 +255,8 @@ void mmcStart(MMCDriver *mmcp, const MMCConfig *config) {
* @brief Disables the MMC peripheral.
*
* @param[in] mmcp pointer to the @p MMCDriver object
*
* @api
*/
void mmcStop(MMCDriver *mmcp) {
@ -266,9 +286,11 @@ void mmcStop(MMCDriver *mmcp) {
*
* @param[in] mmcp pointer to the @p MMCDriver object
* @return The operation status.
* @retval FALSE the operation was successful and the driver is now
* @retval FALSE the operation succeeded and the driver is now
* in the @p MMC_READY state.
* @retval TRUE the operation failed.
*
* @api
*/
bool_t mmcConnect(MMCDriver *mmcp) {
unsigned i;
@ -338,9 +360,11 @@ bool_t mmcConnect(MMCDriver *mmcp) {
*
* @param[in] mmcp pointer to the @p MMCDriver object
* @return The operation status.
* @retval FALSE the operation was successful and the driver is now
* @retval FALSE the operation succeeded and the driver is now
* in the @p MMC_INSERTED state.
* @retval TRUE the operation failed.
*
* @api
*/
bool_t mmcDisconnect(MMCDriver *mmcp) {
bool_t status;
@ -374,8 +398,10 @@ bool_t mmcDisconnect(MMCDriver *mmcp) {
* @param[in] mmcp pointer to the @p MMCDriver object
* @param[in] startblk first block to read
* @return The operation status.
* @retval FALSE the operation was successful.
* @retval FALSE the operation succeeded.
* @retval TRUE the operation failed.
*
* @api
*/
bool_t mmcStartSequentialRead(MMCDriver *mmcp, uint32_t startblk) {
@ -409,8 +435,10 @@ bool_t mmcStartSequentialRead(MMCDriver *mmcp, uint32_t startblk) {
* @param[in] mmcp pointer to the @p MMCDriver object
* @param[out] buffer pointer to the read buffer
* @return The operation status.
* @retval FALSE the operation was successful.
* @retval FALSE the operation succeeded.
* @retval TRUE the operation failed.
*
* @api
*/
bool_t mmcSequentialRead(MMCDriver *mmcp, uint8_t *buffer) {
int i;
@ -447,8 +475,10 @@ bool_t mmcSequentialRead(MMCDriver *mmcp, uint8_t *buffer) {
*
* @param[in] mmcp pointer to the @p MMCDriver object
* @return The operation status.
* @retval FALSE the operation was successful.
* @retval FALSE the operation succeeded.
* @retval TRUE the operation failed.
*
* @api
*/
bool_t mmcStopSequentialRead(MMCDriver *mmcp) {
static const uint8_t stopcmd[] = {0x40 | MMC_CMDSTOP, 0, 0, 0, 0, 1, 0xFF};
@ -483,8 +513,10 @@ bool_t mmcStopSequentialRead(MMCDriver *mmcp) {
* @param[in] mmcp pointer to the @p MMCDriver object
* @param[in] startblk first block to write
* @return The operation status.
* @retval FALSE the operation was successful.
* @retval FALSE the operation succeeded.
* @retval TRUE the operation failed.
*
* @api
*/
bool_t mmcStartSequentialWrite(MMCDriver *mmcp, uint32_t startblk) {
@ -518,8 +550,10 @@ bool_t mmcStartSequentialWrite(MMCDriver *mmcp, uint32_t startblk) {
* @param[in] mmcp pointer to the @p MMCDriver object
* @param[out] buffer pointer to the write buffer
* @return The operation status.
* @retval FALSE the operation was successful.
* @retval FALSE the operation succeeded.
* @retval TRUE the operation failed.
*
* @api
*/
bool_t mmcSequentialWrite(MMCDriver *mmcp, const uint8_t *buffer) {
static const uint8_t start[] = {0xFF, 0xFC};
@ -557,8 +591,10 @@ bool_t mmcSequentialWrite(MMCDriver *mmcp, const uint8_t *buffer) {
*
* @param[in] mmcp pointer to the @p MMCDriver object
* @return The operation status.
* @retval FALSE the operation was successful.
* @retval FALSE the operation succeeded.
* @retval TRUE the operation failed.
*
* @api
*/
bool_t mmcStopSequentialWrite(MMCDriver *mmcp) {
static const uint8_t stop[] = {0xFD, 0xFF};

6
os/hal/src/pal.c
View File

@ -58,6 +58,8 @@
*
* @param[in] bus the I/O bus, pointer to a @p IOBus structure
* @return The bus logical states.
*
* @api
*/
ioportmask_t palReadBus(IOBus *bus) {
@ -81,6 +83,8 @@ ioportmask_t palReadBus(IOBus *bus) {
* @param[in] bits the bits to be written on the I/O bus. Values exceeding
* the bus width are masked so most significant bits are
* lost.
*
* @api
*/
void palWriteBus(IOBus *bus, ioportmask_t bits) {
@ -102,6 +106,8 @@ void palWriteBus(IOBus *bus, ioportmask_t bits) {
*
* @param[in] bus the I/O bus, pointer to a @p IOBus structure
* @param[in] mode the mode
*
* @api
*/
void palSetBusMode(IOBus *bus, uint_fast8_t mode) {

12
os/hal/src/pwm.c
View File

@ -48,6 +48,8 @@
/**
* @brief PWM Driver initialization.
*
* @init
*/
void pwmInit(void) {
@ -58,6 +60,8 @@ void pwmInit(void) {
* @brief Initializes the standard part of a @p PWMDriver structure.
*
* @param[in] pwmp pointer to a @p PWMDriver object
*
* @init
*/
void pwmObjectInit(PWMDriver *pwmp) {
@ -70,6 +74,8 @@ void pwmObjectInit(PWMDriver *pwmp) {
*
* @param[in] pwmp pointer to a @p PWMDriver object
* @param[in] config pointer to a @p PWMConfig object
*
* @api
*/
void pwmStart(PWMDriver *pwmp, const PWMConfig *config) {
@ -89,6 +95,8 @@ void pwmStart(PWMDriver *pwmp, const PWMConfig *config) {
* @brief Deactivates the PWM peripheral.
*
* @param[in] pwmp pointer to a @p PWMDriver object
*
* @api
*/
void pwmStop(PWMDriver *pwmp) {
@ -110,6 +118,8 @@ void pwmStop(PWMDriver *pwmp) {
* @param[in] pwmp pointer to a @p PWMDriver object
* @param[in] channel PWM channel identifier
* @param[in] width PWM pulse width as clock pulses number
*
* @api
*/
void pwmEnableChannel(PWMDriver *pwmp,
pwmchannel_t channel,
@ -132,6 +142,8 @@ void pwmEnableChannel(PWMDriver *pwmp,
*
* @param[in] pwmp pointer to a @p PWMDriver object
* @param[in] channel PWM channel identifier
*
* @api
*/
void pwmDisableChannel(PWMDriver *pwmp, pwmchannel_t channel) {

16
os/hal/src/serial.c
View File

@ -99,6 +99,8 @@ static const struct SerialDriverVMT vmt = {
/**
* @brief Serial Driver initialization.
*
* @init
*/
void sdInit(void) {
@ -117,6 +119,8 @@ void sdInit(void) {
* @param[in] onotify pointer to a callback function that is invoked when
* some data is written in the Queue. The value can be
* @p NULL.
*
* @init
*/
void sdObjectInit(SerialDriver *sdp, qnotify_t inotify, qnotify_t onotify) {
@ -137,6 +141,8 @@ void sdObjectInit(SerialDriver *sdp, qnotify_t inotify, qnotify_t onotify) {
* @param[in] config the architecture-dependent serial driver configuration.
* If this parameter is set to @p NULL then a default
* configuration is used.
*
* @api
*/
void sdStart(SerialDriver *sdp, const SerialConfig *config) {
@ -157,6 +163,8 @@ void sdStart(SerialDriver *sdp, const SerialConfig *config) {
* the message @p Q_RESET.
*
* @param[in] sdp pointer to a @p SerialDrive object
*
* @api
*/
void sdStop(SerialDriver *sdp) {
@ -187,6 +195,8 @@ void sdStop(SerialDriver *sdp) {
*
* @param[in] sdp pointer to a @p SerialDriver structure
* @param[in] b the byte to be written in the driver's Input Queue
*
* @iclass
*/
void sdIncomingDataI(SerialDriver *sdp, uint8_t b) {
@ -210,6 +220,8 @@ void sdIncomingDataI(SerialDriver *sdp, uint8_t b) {
* @return The byte value read from the driver's output queue.
* @retval Q_EMPTY if the queue is empty (the lower driver usually
* disables the interrupt source when this happens).
*
* @iclass
*/
msg_t sdRequestDataI(SerialDriver *sdp) {
msg_t b;
@ -229,6 +241,8 @@ msg_t sdRequestDataI(SerialDriver *sdp) {
*
* @param[in] sdp pointer to a @p SerialDriver structure
* @param[in] mask condition flags to be added to the mask
*
* @iclass
*/
void sdAddFlagsI(SerialDriver *sdp, sdflags_t mask) {
@ -244,6 +258,8 @@ void sdAddFlagsI(SerialDriver *sdp, sdflags_t mask) {
* @param[in] sdp pointer to a @p SerialDriver structure
* @return The condition flags modified since last time this
* function was invoked.
*
* @api
*/
sdflags_t sdGetAndClearFlags(SerialDriver *sdp) {
sdflags_t mask;

31
os/hal/src/spi.c
View File

@ -48,6 +48,8 @@
/**
* @brief SPI Driver initialization.
*
* @init
*/
void spiInit(void) {
@ -58,6 +60,8 @@ void spiInit(void) {
* @brief Initializes the standard part of a @p SPIDriver structure.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @init
*/
void spiObjectInit(SPIDriver *spip) {
@ -75,6 +79,8 @@ void spiObjectInit(SPIDriver *spip) {
*
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] config pointer to the @p SPIConfig object
*
* @api
*/
void spiStart(SPIDriver *spip, const SPIConfig *config) {
@ -94,6 +100,8 @@ void spiStart(SPIDriver *spip, const SPIConfig *config) {
* @brief Deactivates the SPI peripheral.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @api
*/
void spiStop(SPIDriver *spip) {
@ -112,6 +120,8 @@ void spiStop(SPIDriver *spip) {
* @brief Asserts the slave select signal and prepares for transfers.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @api
*/
void spiSelect(SPIDriver *spip) {
@ -132,6 +142,8 @@ void spiSelect(SPIDriver *spip) {
* @details The previously selected peripheral is unselected.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @api
*/
void spiUnselect(SPIDriver *spip) {
@ -155,6 +167,8 @@ void spiUnselect(SPIDriver *spip) {
*
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] n number of words to be ignored
*
* @api
*/
void spiIgnore(SPIDriver *spip, size_t n) {
@ -176,6 +190,8 @@ void spiIgnore(SPIDriver *spip, size_t n) {
* @param[in] n number of words to be exchanged
* @param[in] txbuf the pointer to the transmit buffer
* @param[out] rxbuf the pointer to the receive buffer
*
* @api
*/
void spiExchange(SPIDriver *spip, size_t n, const void *txbuf, void *rxbuf) {
@ -196,6 +212,8 @@ void spiExchange(SPIDriver *spip, size_t n, const void *txbuf, void *rxbuf) {
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] n number of words to send
* @param[in] txbuf the pointer to the transmit buffer
*
* @api
*/
void spiSend(SPIDriver *spip, size_t n, const void *txbuf) {
@ -216,6 +234,8 @@ void spiSend(SPIDriver *spip, size_t n, const void *txbuf) {
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] n number of words to receive
* @param[out] rxbuf the pointer to the receive buffer
*
* @api
*/
void spiReceive(SPIDriver *spip, size_t n, void *rxbuf) {
@ -233,11 +253,12 @@ void spiReceive(SPIDriver *spip, size_t n, void *rxbuf) {
* @brief Gains exclusive access to the SPI bus.
* @details This function tries to gain ownership to the SPI bus, if the bus
* is already being used then the invoking thread is queued.
* @note This function is only available when the @p SPI_USE_MUTUAL_EXCLUSION
* option is set to @p TRUE.
* @pre In order to use this function the option @p SPI_USE_MUTUAL_EXCLUSION
* must be enabled.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @api
*/
void spiAcquireBus(SPIDriver *spip) {
@ -252,10 +273,12 @@ void spiAcquireBus(SPIDriver *spip) {
/**
* @brief Releases exclusive access to the SPI bus.
* @note This function is only available when the @p SPI_USE_MUTUAL_EXCLUSION
* option is set to @p TRUE.
* @pre In order to use this function the option @p SPI_USE_MUTUAL_EXCLUSION
* must be enabled.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @api
*/
void spiReleaseBus(SPIDriver *spip) {

24
os/hal/src/uart.c
View File

@ -48,6 +48,8 @@
/**
* @brief UART Driver initialization.
*
* @init
*/
void uartInit(void) {
@ -58,6 +60,8 @@ void uartInit(void) {
* @brief Initializes the standard part of a @p UARTDriver structure.
*
* @param[in] uartp pointer to the @p UARTDriver object
*
* @init
*/
void uartObjectInit(UARTDriver *uartp) {
@ -72,6 +76,8 @@ void uartObjectInit(UARTDriver *uartp) {
*
* @param[in] uartp pointer to the @p UARTDriver object
* @param[in] config pointer to the @p UARTConfig object
*
* @api
*/
void uartStart(UARTDriver *uartp, const UARTConfig *config) {
@ -93,6 +99,8 @@ void uartStart(UARTDriver *uartp, const UARTConfig *config) {
* @brief Deactivates the UART peripheral.
*
* @param[in] uartp pointer to the @p UARTDriver object
*
* @api
*/
void uartStop(UARTDriver *uartp) {
@ -119,6 +127,8 @@ void uartStop(UARTDriver *uartp) {
* @param[in] uartp pointer to the @p UARTDriver object
* @param[in] n number of data frames to send
* @param[in] txbuf the pointer to the transmit buffer
*
* @api
*/
void uartStartSend(UARTDriver *uartp, size_t n, const void *txbuf) {
@ -145,6 +155,8 @@ void uartStartSend(UARTDriver *uartp, size_t n, const void *txbuf) {
* @param[in] uartp pointer to the @p UARTDriver object
* @param[in] n number of data frames to send
* @param[in] txbuf the pointer to the transmit buffer
*
* @iclass
*/
void uartStartSendI(UARTDriver *uartp, size_t n, const void *txbuf) {
@ -168,6 +180,8 @@ void uartStartSendI(UARTDriver *uartp, size_t n, const void *txbuf) {
* @return The number of data frames not transmitted by the
* stopped transmit operation.
* @retval 0 There was no transmit operation in progress.
*
* @api
*/
size_t uartStopSend(UARTDriver *uartp) {
size_t n;
@ -199,6 +213,8 @@ size_t uartStopSend(UARTDriver *uartp) {
* @return The number of data frames not transmitted by the
* stopped transmit operation.
* @retval 0 There was no transmit operation in progress.
*
* @iclass
*/
size_t uartStopSendI(UARTDriver *uartp) {
@ -224,6 +240,8 @@ size_t uartStopSendI(UARTDriver *uartp) {
* @param[in] uartp pointer to the @p UARTDriver object
* @param[in] n number of data frames to send
* @param[in] rxbuf the pointer to the receive buffer
*
* @api
*/
void uartStartReceive(UARTDriver *uartp, size_t n, void *rxbuf) {
@ -250,6 +268,8 @@ void uartStartReceive(UARTDriver *uartp, size_t n, void *rxbuf) {
* @param[in] uartp pointer to the @p UARTDriver object
* @param[in] n number of data frames to send
* @param[in] rxbuf the pointer to the receive buffer
*
* @iclass
*/
void uartStartReceiveI(UARTDriver *uartp, size_t n, void *rxbuf) {
@ -274,6 +294,8 @@ void uartStartReceiveI(UARTDriver *uartp, size_t n, void *rxbuf) {
* @return The number of data frames not received by the
* stopped receive operation.
* @retval 0 There was no receive operation in progress.
*
* @api
*/
size_t uartStopReceive(UARTDriver *uartp) {
size_t n;
@ -305,6 +327,8 @@ size_t uartStopReceive(UARTDriver *uartp) {
* @return The number of data frames not received by the
* stopped receive operation.
* @retval 0 There was no receive operation in progress.
*
* @iclass
*/
size_t uartStopReceiveI(UARTDriver *uartp) {
chDbgCheck(uartp != NULL, "uartStopReceiveI");

10
os/hal/templates/adc_lld.c
View File

@ -52,6 +52,8 @@
/**
* @brief Low level ADC driver initialization.
*
* @notapi
*/
void adc_lld_init(void) {
@ -61,6 +63,8 @@ void adc_lld_init(void) {
* @brief Configures and activates the ADC peripheral.
*
* @param[in] adcp pointer to the @p ADCDriver object
*
* @notapi
*/
void adc_lld_start(ADCDriver *adcp) {
@ -74,6 +78,8 @@ void adc_lld_start(ADCDriver *adcp) {
* @brief Deactivates the ADC peripheral.
*
* @param[in] adcp pointer to the @p ADCDriver object
*
* @notapi
*/
void adc_lld_stop(ADCDriver *adcp) {
@ -83,6 +89,8 @@ void adc_lld_stop(ADCDriver *adcp) {
* @brief Starts an ADC conversion.
*
* @param[in] adcp pointer to the @p ADCDriver object
*
* @notapi
*/
void adc_lld_start_conversion(ADCDriver *adcp) {
@ -92,6 +100,8 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
* @brief Stops an ongoing conversion.
*
* @param[in] adcp pointer to the @p ADCDriver object
*
* @notapi
*/
void adc_lld_stop_conversion(ADCDriver *adcp) {

18
os/hal/templates/can_lld.c
View File

@ -52,6 +52,8 @@
/**
* @brief Low level CAN driver initialization.
*
* @notapi
*/
void can_lld_init(void) {
@ -61,6 +63,8 @@ void can_lld_init(void) {
* @brief Configures and activates the CAN peripheral.
*
* @param[in] canp pointer to the @p CANDriver object
*
* @notapi
*/
void can_lld_start(CANDriver *canp) {
@ -70,6 +74,8 @@ void can_lld_start(CANDriver *canp) {
* @brief Deactivates the CAN peripheral.
*
* @param[in] canp pointer to the @p CANDriver object
*
* @notapi
*/
void can_lld_stop(CANDriver *canp) {
@ -87,6 +93,8 @@ void can_lld_stop(CANDriver *canp) {
* @return The queue space availability.
* @retval FALSE no space in the transmit queue.
* @retval TRUE transmit slot available.
*
* @notapi
*/
bool_t can_lld_can_transmit(CANDriver *canp) {
@ -98,6 +106,8 @@ bool_t can_lld_can_transmit(CANDriver *canp) {
*
* @param[in] canp pointer to the @p CANDriver object
* @param[in] ctfp pointer to the CAN frame to be transmitted
*
* @notapi
*/
void can_lld_transmit(CANDriver *canp, const CANTxFrame *ctfp) {
@ -110,6 +120,8 @@ void can_lld_transmit(CANDriver *canp, const CANTxFrame *ctfp) {
* @return The queue space availability.
* @retval FALSE no space in the transmit queue.
* @retval TRUE transmit slot available.
*
* @notapi
*/
bool_t can_lld_can_receive(CANDriver *canp) {
@ -121,6 +133,8 @@ bool_t can_lld_can_receive(CANDriver *canp) {
*
* @param[in] canp pointer to the @p CANDriver object
* @param[out] crfp pointer to the buffer where the CAN frame is copied
*
* @notapi
*/
void can_lld_receive(CANDriver *canp, CANRxFrame *crfp) {
@ -131,6 +145,8 @@ void can_lld_receive(CANDriver *canp, CANRxFrame *crfp) {
* @brief Enters the sleep mode.
*
* @param[in] canp pointer to the @p CANDriver object
*
* @notapi
*/
void can_lld_sleep(CANDriver *canp) {
@ -140,6 +156,8 @@ void can_lld_sleep(CANDriver *canp) {
* @brief Enforces leaving the sleep mode.
*
* @param[in] canp pointer to the @p CANDriver object
*
* @notapi
*/
void can_lld_wakeup(CANDriver *canp) {

2
os/hal/templates/hal_lld.c
View File

@ -50,6 +50,8 @@
/**
* @brief Low level HAL driver initialization.
*
* @notapi
*/
void hal_lld_init(void) {

16
os/hal/templates/i2c_lld.c
View File

@ -52,6 +52,8 @@
/**
* @brief Low level I2C driver initialization.
*
* @notapi
*/
void i2c_lld_init(void) {
@ -61,6 +63,8 @@ void i2c_lld_init(void) {
* @brief Configures and activates the I2C peripheral.
*
* @param[in] i2cp pointer to the @p I2CDriver object
*
* @notapi
*/
void i2c_lld_start(I2CDriver *i2cp) {
@ -74,6 +78,8 @@ void i2c_lld_start(I2CDriver *i2cp) {
* @brief Deactivates the I2C peripheral.
*
* @param[in] i2cp pointer to the @p I2CDriver object
*
* @notapi
*/
void i2c_lld_stop(I2CDriver *i2cp) {
@ -86,6 +92,8 @@ void i2c_lld_stop(I2CDriver *i2cp) {
*
* @param[in] i2cp pointer to the @p I2CDriver object
* @param[in] header transaction header
*
* @notapi
*/
void i2c_lld_master_start(I2CDriver *i2cp, uint16_t header) {
@ -95,6 +103,8 @@ void i2c_lld_master_start(I2CDriver *i2cp, uint16_t header) {
* @brief Terminates a master bus transaction.
*
* @param[in] i2cp pointer to the @p I2CDriver object
*
* @notapi
*/
void i2c_lld_master_stop(I2CDriver *i2cp) {
@ -105,6 +115,8 @@ void i2c_lld_master_stop(I2CDriver *i2cp) {
* @details Restart bits are required by some types of I2C transactions.
*
* @param[in] i2cp pointer to the @p I2CDriver object
*
* @notapi
*/
void i2c_lld_master_restart(I2CDriver *i2cp) {
@ -116,6 +128,8 @@ void i2c_lld_master_restart(I2CDriver *i2cp) {
* @param[in] i2cp pointer to the @p I2CDriver object
* @param[in] n number of bytes to be transmitted
* @param[in] txbuf transmit data buffer pointer
*
* @notapi
*/
void i2c_lld_master_transmit(I2CDriver *i2cp, size_t n,
const uint8_t *txbuf) {
@ -128,6 +142,8 @@ void i2c_lld_master_transmit(I2CDriver *i2cp, size_t n,
* @param[in] i2cp pointer to the @p I2CDriver object
* @param[in] n number of bytes to be transmitted
* @param[in] rxbuf receive data buffer pointer
*
* @notapi
*/
void i2c_lld_master_receive(I2CDriver *i2cp, size_t n, uint8_t *rxbuf) {

18
os/hal/templates/mac_lld.c
View File

@ -52,6 +52,8 @@
/**
* @brief Low level MAC initialization.
*
* @notapi
*/
void mac_lld_init(void) {
@ -64,6 +66,8 @@ void mac_lld_init(void) {
* @param[in] p pointer to a six bytes buffer containing the MAC
* address. If this parameter is set to @p NULL then
* a system default MAC is used.
*
* @notapi
*/
void mac_lld_set_address(MACDriver *macp, const uint8_t *p) {
@ -79,6 +83,8 @@ void mac_lld_set_address(MACDriver *macp, const uint8_t *p) {
* @return The operation status.
* @retval RDY_OK a descriptor was obtained.
* @retval RDY_TIMEOUT descriptor not available.
*
* @notapi
*/
msg_t max_lld_get_transmit_descriptor(MACDriver *macp,
MACTransmitDescriptor *tdp) {
@ -97,6 +103,8 @@ msg_t max_lld_get_transmit_descriptor(MACDriver *macp,
* stream, this value can be less than the amount
* specified in the parameter @p size if the maximum
* frame size is reached.
*
* @notapi
*/
size_t mac_lld_write_transmit_descriptor(MACTransmitDescriptor *tdp,
uint8_t *buf,
@ -110,6 +118,8 @@ size_t mac_lld_write_transmit_descriptor(MACTransmitDescriptor *tdp,
* enqueued data as a single frame.
*
* @param[in] tdp pointer to a @p MACTransmitDescriptor structure
*
* @notapi
*/
void mac_lld_release_transmit_descriptor(MACTransmitDescriptor *tdp) {
@ -123,6 +133,8 @@ void mac_lld_release_transmit_descriptor(MACTransmitDescriptor *tdp) {
* @return The operation status.
* @retval RDY_OK a descriptor was obtained.
* @retval RDY_TIMEOUT descriptor not available.
*
* @notapi
*/
msg_t max_lld_get_receive_descriptor(MACDriver *macp,
MACReceiveDescriptor *rdp) {
@ -139,6 +151,8 @@ msg_t max_lld_get_receive_descriptor(MACDriver *macp,
* @return The number of bytes read from the descriptor's stream,
* this value can be less than the amount specified in
* the parameter @p size if there are no more bytes to read.
*
* @notapi
*/
size_t mac_lld_read_receive_descriptor(MACReceiveDescriptor *rdp,
uint8_t *buf,
@ -153,6 +167,8 @@ size_t mac_lld_read_receive_descriptor(MACReceiveDescriptor *rdp,
* frames.
*
* @param[in] rdp pointer to a @p MACReceiveDescriptor structure
*
* @notapi
*/
void mac_lld_release_receive_descriptor(MACReceiveDescriptor *rdp) {
@ -165,6 +181,8 @@ void mac_lld_release_receive_descriptor(MACReceiveDescriptor *rdp) {
* @return The link status.
* @retval TRUE if the link is active.
* @retval FALSE if the link is down.
*
* @notapi
*/
bool_t mac_lld_poll_link_status(MACDriver *macp) {

8
os/hal/templates/meta/driver.c
View File

@ -48,6 +48,8 @@
/**
* @brief XXX Driver initialization.
*
* @init
*/
void xxxInit(void) {
@ -58,6 +60,8 @@ void xxxInit(void) {
* @brief Initializes the standard part of a @p XXXDriver structure.
*
* @param[in] xxxp pointer to the @p XXXDriver object
*
* @init
*/
void xxxObjectInit(XXXDriver *xxxp) {
@ -70,6 +74,8 @@ void xxxObjectInit(XXXDriver *xxxp) {
*
* @param[in] xxxp pointer to the @p XXXDriver object
* @param[in] config pointer to the @p XXXConfig object
*
* @api
*/
void xxxStart(XXXDriver *xxxp, const XXXConfig *config) {
@ -89,6 +95,8 @@ void xxxStart(XXXDriver *xxxp, const XXXConfig *config) {
* @brief Deactivates the XXX peripheral.
*
* @param[in] xxxp pointer to the @p XXXDriver object
*
* @api
*/
void xxxStop(XXXDriver *xxxp) {

6
os/hal/templates/meta/driver_lld.c
View File

@ -52,6 +52,8 @@
/**
* @brief Low level XXX driver initialization.
*
* @notapi
*/
void xxx_lld_init(void) {
@ -61,6 +63,8 @@ void xxx_lld_init(void) {
* @brief Configures and activates the XXX peripheral.
*
* @param[in] xxxp pointer to the @p XXXDriver object
*
* @notapi
*/
void xxx_lld_start(XXXDriver *xxxp) {
@ -74,6 +78,8 @@ void xxx_lld_start(XXXDriver *xxxp) {
* @brief Deactivates the XXX peripheral.
*
* @param[in] xxxp pointer to the @p XXXDriver object
*
* @notapi
*/
void xxx_lld_stop(XXXDriver *xxxp) {

34
os/hal/templates/pal_lld.h
View File

@ -95,6 +95,8 @@ typedef uint32_t ioportid_t;
* @brief Low level PAL subsystem initialization.
*
* @param[in] config architecture-dependent ports configuration
*
* @notapi
*/
#define pal_lld_init(config)
@ -105,6 +107,8 @@ typedef uint32_t ioportid_t;
*
* @param[in] port port identifier
* @return The port bits.
*
* @notapi
*/
#define pal_lld_readport(port)
@ -117,6 +121,8 @@ typedef uint32_t ioportid_t;
*
* @param[in] port port identifier
* @return The latched logical states.
*
* @notapi
*/
#define pal_lld_readlatch(port)
@ -127,6 +133,8 @@ typedef uint32_t ioportid_t;
*
* @param[in] port port identifier
* @param[in] bits bits to be written on the specified port
*
* @notapi
*/
#define pal_lld_writeport(port, bits)
@ -140,6 +148,8 @@ typedef uint32_t ioportid_t;
*
* @param[in] port port identifier
* @param[in] bits bits to be ORed on the specified port
*
* @notapi
*/
#define pal_lld_setport(port, bits)
@ -153,6 +163,8 @@ typedef uint32_t ioportid_t;
*
* @param[in] port port identifier
* @param[in] bits bits to be cleared on the specified port
*
* @notapi
*/
#define pal_lld_clearport(port, bits)
@ -166,6 +178,8 @@ typedef uint32_t ioportid_t;
*
* @param[in] port port identifier
* @param[in] bits bits to be XORed on the specified port
*
* @notapi
*/
#define pal_lld_toggleport(port, bits)
@ -181,6 +195,8 @@ typedef uint32_t ioportid_t;
* @param[in] mask group mask
* @param[in] offset group bit offset within the port
* @return The group logical states.
*
* @notapi
*/
#define pal_lld_readgroup(port, mask, offset)
@ -197,6 +213,8 @@ typedef uint32_t ioportid_t;
* @param[in] offset group bit offset within the port
* @param[in] bits bits to be written. Values exceeding the group width
* are masked.
*
* @notapi
*/
#define pal_lld_writegroup(port, mask, offset, bits)
@ -211,6 +229,8 @@ typedef uint32_t ioportid_t;
* @param[in] port port identifier
* @param[in] mask group mask
* @param[in] mode group mode
*
* @notapi
*/
#define pal_lld_setgroupmode(port, mask, mode)
@ -227,6 +247,8 @@ typedef uint32_t ioportid_t;
* @return The logical state.
* @retval PAL_LOW low logical state.
* @retval PAL_HIGH high logical state.
*
* @notapi
*/
#define pal_lld_readpad(port, pad)
@ -240,8 +262,10 @@ typedef uint32_t ioportid_t;
*
* @param[in] port port identifier
* @param[in] pad pad number within the port
* @param[out] bit logical value, the value must be @p PAL_LOW or
* @param[in] bit logical value, the value must be @p PAL_LOW or
* @p PAL_HIGH
*
* @notapi
*/
#define pal_lld_writepad(port, pad, bit)
@ -255,6 +279,8 @@ typedef uint32_t ioportid_t;
*
* @param[in] port port identifier
* @param[in] pad pad number within the port
*
* @notapi
*/
#define pal_lld_setpad(port, pad)
@ -268,6 +294,8 @@ typedef uint32_t ioportid_t;
*
* @param[in] port port identifier
* @param[in] pad pad number within the port
*
* @notapi
*/
#define pal_lld_clearpad(port, pad)
@ -281,6 +309,8 @@ typedef uint32_t ioportid_t;
*
* @param[in] port port identifier
* @param[in] pad pad number within the port
*
* @notapi
*/
#define pal_lld_togglepad(port, pad)
@ -297,6 +327,8 @@ typedef uint32_t ioportid_t;
* @param[in] port port identifier
* @param[in] pad pad number within the port
* @param[in] mode pad mode
*
* @notapi
*/
#define pal_lld_setpadmode(port, pad, mode)

14
os/hal/templates/pwm_lld.c
View File

@ -50,6 +50,8 @@
/**
* @brief Low level PWM driver initialization.
*
* @notapi
*/
void pwm_lld_init(void) {
@ -59,6 +61,8 @@ void pwm_lld_init(void) {
* @brief Configures and activates the PWM peripheral.
*
* @param[in] pwmp pointer to the @p PWMDriver object
*
* @notapi
*/
void pwm_lld_start(PWMDriver *pwmp) {
@ -72,6 +76,8 @@ void pwm_lld_start(PWMDriver *pwmp) {
* @brief Deactivates the PWM peripheral.
*
* @param[in] pwmp pointer to the @p PWMDriver object
*
* @notapi
*/
void pwm_lld_stop(PWMDriver *pwmp) {
@ -85,6 +91,8 @@ void pwm_lld_stop(PWMDriver *pwmp) {
* @return The PWM channel status.
* @retval FALSE the channel is not enabled.
* @retval TRUE the channel is enabled.
*
* @notapi
*/
bool_t pwm_lld_is_enabled(PWMDriver *pwmp, pwmchannel_t channel) {
@ -99,6 +107,8 @@ bool_t pwm_lld_is_enabled(PWMDriver *pwmp, pwmchannel_t channel) {
* @param[in] channel PWM channel identifier
* @param[in] edge output edge mode
* @param[in] callback callback function
*
* @notapi
*/
void pwm_lld_set_callback(PWMDriver *pwmp, pwmchannel_t channel,
pwmedge_t edge, pwmcallback_t callback) {
@ -111,6 +121,8 @@ void pwm_lld_set_callback(PWMDriver *pwmp, pwmchannel_t channel,
* @param[in] pwmp pointer to the @p PWMDriver object
* @param[in] channel PWM channel identifier
* @param[in] width PWM pulse width as clock pulses number
*
* @notapi
*/
void pwm_lld_enable_channel(PWMDriver *pwmp,
pwmchannel_t channel,
@ -125,6 +137,8 @@ void pwm_lld_enable_channel(PWMDriver *pwmp,
*
* @param[in] pwmp pointer to the @p PWMDriver object
* @param[in] channel PWM channel identifier
*
* @notapi
*/
void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) {

6
os/hal/templates/serial_lld.c
View File

@ -58,6 +58,8 @@ static const SerialConfig default_config = {
/**
* @brief Low level serial driver initialization.
*
* @notapi
*/
void sd_lld_init(void) {
@ -70,6 +72,8 @@ void sd_lld_init(void) {
* @param[in] config the architecture-dependent serial driver configuration.
* If this parameter is set to @p NULL then a default
* configuration is used.
*
* @notapi
*/
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
@ -84,6 +88,8 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
* interrupt vector.
*
* @param[in] sdp pointer to a @p SerialDriver object
*
* @notapi
*/
void sd_lld_stop(SerialDriver *sdp) {

18
os/hal/templates/spi_lld.c
View File

@ -52,6 +52,8 @@
/**
* @brief Low level SPI driver initialization.
*
* @notapi
*/
void spi_lld_init(void) {
@ -61,6 +63,8 @@ void spi_lld_init(void) {
* @brief Configures and activates the SPI peripheral.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @notapi
*/
void spi_lld_start(SPIDriver *spip) {
@ -74,6 +78,8 @@ void spi_lld_start(SPIDriver *spip) {
* @brief Deactivates the SPI peripheral.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @notapi
*/
void spi_lld_stop(SPIDriver *spip) {
@ -83,6 +89,8 @@ void spi_lld_stop(SPIDriver *spip) {
* @brief Asserts the slave select signal and prepares for transfers.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @notapi
*/
void spi_lld_select(SPIDriver *spip) {
@ -93,6 +101,8 @@ void spi_lld_select(SPIDriver *spip) {
* @details The previously selected peripheral is unselected.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @notapi
*/
void spi_lld_unselect(SPIDriver *spip) {
@ -106,6 +116,8 @@ void spi_lld_unselect(SPIDriver *spip) {
*
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] n number of words to be ignored
*
* @notapi
*/
void spi_lld_ignore(SPIDriver *spip, size_t n) {
@ -121,6 +133,8 @@ void spi_lld_ignore(SPIDriver *spip, size_t n) {
* @param[in] n number of words to be exchanged
* @param[in] txbuf the pointer to the transmit buffer
* @param[out] rxbuf the pointer to the receive buffer
*
* @notapi
*/
void spi_lld_exchange(SPIDriver *spip, size_t n,
const void *txbuf, void *rxbuf) {
@ -135,6 +149,8 @@ void spi_lld_exchange(SPIDriver *spip, size_t n,
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] n number of words to send
* @param[in] txbuf the pointer to the transmit buffer
*
* @notapi
*/
void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
@ -148,6 +164,8 @@ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
* @param[in] spip pointer to the @p SPIDriver object
* @param[in] n number of words to receive
* @param[out] rxbuf the pointer to the receive buffer
*
* @notapi
*/
void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {

14
os/hal/templates/uart_lld.c
View File

@ -52,6 +52,8 @@
/**
* @brief Low level UART driver initialization.
*
* @notapi
*/
void uart_lld_init(void) {
@ -61,6 +63,8 @@ void uart_lld_init(void) {
* @brief Configures and activates the UART peripheral.
*
* @param[in] uartp pointer to the @p UARTDriver object
*
* @notapi
*/
void uart_lld_start(UARTDriver *uartp) {
@ -74,6 +78,8 @@ void uart_lld_start(UARTDriver *uartp) {
* @brief Deactivates the UART peripheral.
*
* @param[in] uartp pointer to the @p UARTDriver object
*
* @notapi
*/
void uart_lld_stop(UARTDriver *uartp) {
@ -87,6 +93,8 @@ void uart_lld_stop(UARTDriver *uartp) {
* @param[in] uartp pointer to the @p UARTDriver object
* @param[in] n number of data frames to send
* @param[in] txbuf the pointer to the transmit buffer
*
* @notapi
*/
void uart_lld_start_send(UARTDriver *uartp, size_t n, const void *txbuf) {
@ -100,6 +108,8 @@ void uart_lld_start_send(UARTDriver *uartp, size_t n, const void *txbuf) {
*
* @return The number of data frames not transmitted by the
* stopped transmit operation.
*
* @notapi
*/
size_t uart_lld_stop_send(UARTDriver *uartp) {
@ -113,6 +123,8 @@ size_t uart_lld_stop_send(UARTDriver *uartp) {
* @param[in] uartp pointer to the @p UARTDriver object
* @param[in] n number of data frames to send
* @param[in] rxbuf the pointer to the receive buffer
*
* @notapi
*/
void uart_lld_start_receive(UARTDriver *uartp, size_t n, void *rxbuf) {
@ -126,6 +138,8 @@ void uart_lld_start_receive(UARTDriver *uartp, size_t n, void *rxbuf) {
*
* @return The number of data frames not received by the
* stopped receive operation.
*
* @notapi
*/
size_t uart_lld_stop_receive(UARTDriver *uartp) {

2
readme.txt
View File

@ -45,7 +45,7 @@
| | | +--MSP430/ - Port files for MSP430 architecture.
| | | +--SIMIA32/ - Port files for SIMIA32 simulator architecture.
| | +--cosmic/ - Ports for the Cosmic compiler.
| | +--STM8/ - Port files for STM8 architecture.
| | | +--STM8/ - Port files for STM8 architecture.
| | +--RC/ - Ports for the Raisonance compiler.
| | +--STM8/ - Port files for STM8 architecture.
| +--kernel/ - Kernel portable files.