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ChibiOS
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Fixed bug #1058. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13172 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2019-11-10 09:01:43 +00:00
parent 1452e78dd9
commit 28a32c89f2
7 changed files with 4 additions and 26 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
os/hal/ports/STM32/LLD/ADCv1/hal_adc_lld.c
View File

@ -98,8 +98,7 @@ static void adc_lld_serve_rx_interrupt(ADCDriver *adcp, uint32_t flags) {
/* Driver interrupt handlers. */
/*===========================================================================*/
#if (STM32_ADC_USE_ADC1 && (STM32_ADC1_IRQ_SHARED_WITH_EXTI == FALSE)) || \
defined(__DOXYGEN__)
#if STM32_ADC_USE_ADC1 || defined(__DOXYGEN__)
#if !defined(STM32_ADC1_HANDLER)
#error "STM32_ADC1_HANDLER not defined"
#endif
@ -145,11 +144,9 @@ void adc_lld_init(void) {
STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE |
STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
#if STM32_ADC1_IRQ_SHARED_WITH_EXTI == FALSE
/* The shared vector is initialized on driver initialization and never
/* The vector is initialized on driver initialization and never
disabled.*/
nvicEnableVector(12, STM32_ADC_ADC1_IRQ_PRIORITY);
#endif
#endif
/* Calibration procedure.*/

2
os/hal/ports/STM32/LLD/ADCv1/hal_adc_lld.h
View File

@ -168,12 +168,10 @@
#error "ADC driver activated but no ADC peripheral assigned"
#endif
#if STM32_ADC1_IRQ_SHARED_WITH_EXTI == FALSE
#if STM32_ADC_USE_ADC1 && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_ADC_ADC1_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to ADC1"
#endif
#endif
#if STM32_ADC_USE_ADC1 && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_ADC_ADC1_DMA_IRQ_PRIORITY)

8
os/hal/ports/STM32/STM32F0xx/stm32_registry.h
View File

@ -67,7 +67,6 @@
#define STM32_HAS_ADC1 TRUE
#define STM32_ADC_SUPPORTS_PRESCALER FALSE
#define STM32_ADC_SUPPORTS_OVERSAMPLING FALSE
#define STM32_ADC1_IRQ_SHARED_WITH_EXTI FALSE
#define STM32_ADC1_HANDLER Vector70
#define STM32_ADC1_NUMBER 12
#define STM32_ADC1_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 1) |\
@ -389,7 +388,6 @@
#define STM32_HAS_ADC1 TRUE
#define STM32_ADC_SUPPORTS_PRESCALER FALSE
#define STM32_ADC_SUPPORTS_OVERSAMPLING FALSE
#define STM32_ADC1_IRQ_SHARED_WITH_EXTI TRUE
#define STM32_ADC1_HANDLER Vector70
#define STM32_ADC1_NUMBER 12
#define STM32_ADC1_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 1) |\
@ -606,7 +604,6 @@
#define STM32_HAS_ADC1 TRUE
#define STM32_ADC_SUPPORTS_PRESCALER FALSE
#define STM32_ADC_SUPPORTS_OVERSAMPLING FALSE
#define STM32_ADC1_IRQ_SHARED_WITH_EXTI TRUE
#define STM32_ADC1_HANDLER Vector70
#define STM32_ADC1_NUMBER 12
#define STM32_ADC1_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 1) |\
@ -833,7 +830,6 @@
#define STM32_HAS_ADC1 TRUE
#define STM32_ADC_SUPPORTS_PRESCALER FALSE
#define STM32_ADC_SUPPORTS_OVERSAMPLING FALSE
#define STM32_ADC1_IRQ_SHARED_WITH_EXTI TRUE
#define STM32_ADC1_HANDLER Vector70
#define STM32_ADC1_NUMBER 12
#define STM32_ADC1_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 1) |\
@ -1064,7 +1060,6 @@
#define STM32_HAS_ADC1 TRUE
#define STM32_ADC_SUPPORTS_PRESCALER FALSE
#define STM32_ADC_SUPPORTS_OVERSAMPLING FALSE
#define STM32_ADC1_IRQ_SHARED_WITH_EXTI TRUE
#define STM32_ADC1_HANDLER Vector70
#define STM32_ADC1_NUMBER 12
#define STM32_ADC1_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 1) |\
@ -1311,7 +1306,6 @@
#define STM32_HAS_ADC1 TRUE
#define STM32_ADC_SUPPORTS_PRESCALER FALSE
#define STM32_ADC_SUPPORTS_OVERSAMPLING FALSE
#define STM32_ADC1_IRQ_SHARED_WITH_EXTI TRUE
#define STM32_ADC1_HANDLER Vector70
#define STM32_ADC1_NUMBER 12
#define STM32_ADC1_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 1) |\
@ -1573,7 +1567,6 @@
#define STM32_HAS_ADC1 TRUE
#define STM32_ADC_SUPPORTS_PRESCALER FALSE
#define STM32_ADC_SUPPORTS_OVERSAMPLING FALSE
#define STM32_ADC1_IRQ_SHARED_WITH_EXTI TRUE
#define STM32_ADC1_HANDLER Vector70
#define STM32_ADC1_NUMBER 12
#define STM32_ADC1_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 1) |\
@ -1851,7 +1844,6 @@
#define STM32_HAS_ADC1 TRUE
#define STM32_ADC_SUPPORTS_PRESCALER FALSE
#define STM32_ADC_SUPPORTS_OVERSAMPLING FALSE
#define STM32_ADC1_IRQ_SHARED_WITH_EXTI TRUE
#define STM32_ADC1_HANDLER Vector70
#define STM32_ADC1_NUMBER 12
#define STM32_ADC1_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 1) |\

2
os/hal/ports/STM32/STM32G0xx/stm32_registry.h
View File

@ -94,7 +94,6 @@
#define STM32_HAS_ADC1 TRUE
#define STM32_ADC_SUPPORTS_PRESCALER TRUE
#define STM32_ADC_SUPPORTS_OVERSAMPLING TRUE
#define STM32_ADC1_IRQ_SHARED_WITH_EXTI TRUE
#define STM32_HAS_ADC2 FALSE
#define STM32_HAS_ADC3 FALSE
@ -274,7 +273,6 @@
#define STM32_HAS_ADC1 TRUE
#define STM32_ADC_SUPPORTS_PRESCALER TRUE
#define STM32_ADC_SUPPORTS_OVERSAMPLING TRUE
#define STM32_ADC1_IRQ_SHARED_WITH_EXTI TRUE
#define STM32_HAS_ADC2 FALSE
#define STM32_HAS_ADC3 FALSE

3
os/hal/ports/STM32/STM32L0xx/stm32_isr.c
View File

@ -247,7 +247,6 @@ void irqInit(void) {
nvicEnableVector(STM32_EXTI_LINE01_NUMBER, STM32_IRQ_EXTI0_1_PRIORITY);
nvicEnableVector(STM32_EXTI_LINE23_NUMBER, STM32_IRQ_EXTI2_3_PRIORITY);
nvicEnableVector(STM32_EXTI_LINE4_15_NUMBER, STM32_IRQ_EXTI4_15_PRIORITY);
nvicEnableVector(STM32_EXTI_LINE16_NUMBER, STM32_IRQ_EXTI16_PRIORITY);
#endif
#if HAL_USE_SERIAL || HAL_USE_UART
@ -269,8 +268,6 @@ void irqDeinit(void) {
nvicDisableVector(STM32_EXTI_LINE01_NUMBER);
nvicDisableVector(STM32_EXTI_LINE23_NUMBER);
nvicDisableVector(STM32_EXTI_LINE4_15_NUMBER);
nvicDisableVector(STM32_EXTI_LINE16_NUMBER);
nvicDisableVector(STM32_EXTI_LINE2122_NUMBER);
#endif
#if HAL_USE_SERIAL || HAL_USE_UART

6
os/hal/ports/STM32/STM32L0xx/stm32_registry.h
View File

@ -64,7 +64,6 @@
#define STM32_HAS_ADC1 TRUE
#define STM32_ADC_SUPPORTS_PRESCALER TRUE
#define STM32_ADC_SUPPORTS_OVERSAMPLING TRUE
#define STM32_ADC1_IRQ_SHARED_WITH_EXTI TRUE
#define STM32_ADC1_HANDLER Vector70
#define STM32_ADC1_NUMBER 12
#define STM32_ADC1_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 1) |\
@ -257,7 +256,6 @@
#define STM32_HAS_ADC1 TRUE
#define STM32_ADC_SUPPORTS_PRESCALER TRUE
#define STM32_ADC_SUPPORTS_OVERSAMPLING TRUE
#define STM32_ADC1_IRQ_SHARED_WITH_EXTI TRUE
#define STM32_ADC1_HANDLER Vector70
#define STM32_ADC1_NUMBER 12
#define STM32_ADC1_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 1) |\
@ -453,7 +451,6 @@
#define STM32_HAS_ADC1 TRUE
#define STM32_ADC_SUPPORTS_PRESCALER TRUE
#define STM32_ADC_SUPPORTS_OVERSAMPLING TRUE
#define STM32_ADC1_IRQ_SHARED_WITH_EXTI TRUE
#define STM32_ADC1_HANDLER Vector70
#define STM32_ADC1_NUMBER 12
#define STM32_ADC1_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 1) |\
@ -680,7 +677,6 @@
#define STM32_HAS_ADC1 TRUE
#define STM32_ADC_SUPPORTS_PRESCALER TRUE
#define STM32_ADC_SUPPORTS_OVERSAMPLING TRUE
#define STM32_ADC1_IRQ_SHARED_WITH_EXTI TRUE
#define STM32_ADC1_HANDLER Vector70
#define STM32_ADC1_NUMBER 12
#define STM32_ADC1_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 1) |\
@ -912,7 +908,6 @@
#define STM32_HAS_ADC1 TRUE
#define STM32_ADC_SUPPORTS_PRESCALER TRUE
#define STM32_ADC_SUPPORTS_OVERSAMPLING TRUE
#define STM32_ADC1_IRQ_SHARED_WITH_EXTI TRUE
#define STM32_ADC1_HANDLER Vector70
#define STM32_ADC1_NUMBER 12
#define STM32_ADC1_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 1) |\
@ -1171,7 +1166,6 @@
#define STM32_HAS_ADC1 TRUE
#define STM32_ADC_SUPPORTS_PRESCALER TRUE
#define STM32_ADC_SUPPORTS_OVERSAMPLING TRUE
#define STM32_ADC1_IRQ_SHARED_WITH_EXTI TRUE
#define STM32_ADC1_HANDLER Vector70
#define STM32_ADC1_NUMBER 12
#define STM32_ADC1_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 1) |\

2
readme.txt
View File

@ -135,6 +135,8 @@
- HAL: Added a new interface for range-finder devices (used by EX).
- HAL: Added mcuconf.h updater tool for STM32F407 (backported to 19.1.1).
- NIL: Integrated NIL 4.0.
- FIX: Fixed STM32 ADCv1 error callback disabled on some devices (bug #1058)
(backported to 19.1.4)(backported to 18.2.3).
- FIX: Fixed error in uartSendFullTimeout() HAL function (bug #1057)
(backported to 19.1.4)(backported to 18.2.3).
- FIX: Fixed OS-less Cortex-M OSAL problem with critical zones (bug #1056)