git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7517 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -42,7 +42,7 @@
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#define STM32_HSE_ENABLED FALSE
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#define STM32_LSE_ENABLED FALSE
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#define STM32_SW STM32_SW_PLL
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#define STM32_PLLSRC STM32_PLLSRC_HSI
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#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
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#define STM32_PREDIV_VALUE 1
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#define STM32_PLLMUL_VALUE 12
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#define STM32_HPRE STM32_HPRE_DIV1
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#define STM32_HSE_ENABLED FALSE
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#define STM32_LSE_ENABLED FALSE
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#define STM32_SW STM32_SW_PLL
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#define STM32_PLLSRC STM32_PLLSRC_HSI
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#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
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#define STM32_PREDIV_VALUE 1
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#define STM32_PLLMUL_VALUE 12
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#define STM32_HPRE STM32_HPRE_DIV1
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#define STM32_HSE_ENABLED FALSE
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#define STM32_LSE_ENABLED FALSE
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#define STM32_SW STM32_SW_PLL
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#define STM32_PLLSRC STM32_PLLSRC_HSI
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#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
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#define STM32_PREDIV_VALUE 1
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#define STM32_PLLMUL_VALUE 12
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#define STM32_HPRE STM32_HPRE_DIV1
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@ -31,10 +31,6 @@
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* Low Density devices.
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* - STM32F051x8, STM32F058xx, STM32F071xB, STM32F072xB,
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* STM32F078xx for Medium Density devices.
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*
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* - STM32F030 for Value Line devices.
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* - STM32F0XX_LD for Low Density devices.
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* - STM32F0XX_MD for Medium Density devices.
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* .
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*
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* @addtogroup HAL
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@ -520,7 +516,6 @@
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#if (STM32_SW == STM32_SW_PLL) && (STM32_PLLSRC == STM32_PLLSRC_HSI48)
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#error "HSI48 not enabled, required by STM32_SW and STM32_PLLSRC"
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#endif
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#endif
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#endif /* !STM32_HSI48_ENABLED */
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#define STM32_HSE_ENABLED FALSE
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#define STM32_LSE_ENABLED FALSE
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#define STM32_SW STM32_SW_PLL
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#define STM32_PLLSRC STM32_PLLSRC_HSI
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#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
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#define STM32_PREDIV_VALUE 1
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#define STM32_PLLMUL_VALUE 12
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#define STM32_HPRE STM32_HPRE_DIV1
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#define STM32_HSE_ENABLED FALSE
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#define STM32_LSE_ENABLED FALSE
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#define STM32_SW STM32_SW_PLL
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#define STM32_PLLSRC STM32_PLLSRC_HSI
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#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
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#define STM32_PREDIV_VALUE 1
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#define STM32_PLLMUL_VALUE 12
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#define STM32_HPRE STM32_HPRE_DIV1
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#define STM32_HSE_ENABLED FALSE
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#define STM32_LSE_ENABLED FALSE
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#define STM32_SW STM32_SW_PLL
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#define STM32_PLLSRC STM32_PLLSRC_HSI
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#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
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#define STM32_PREDIV_VALUE 1
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#define STM32_PLLMUL_VALUE 12
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#define STM32_HPRE STM32_HPRE_DIV1
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#define STM32_HSE_ENABLED FALSE
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#define STM32_LSE_ENABLED FALSE
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#define STM32_SW STM32_SW_PLL
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#define STM32_PLLSRC STM32_PLLSRC_HSI
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#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
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#define STM32_PREDIV_VALUE 1
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#define STM32_PLLMUL_VALUE 12
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#define STM32_HPRE STM32_HPRE_DIV1
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#define STM32_HSE_ENABLED FALSE
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#define STM32_LSE_ENABLED FALSE
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#define STM32_SW STM32_SW_PLL
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#define STM32_PLLSRC STM32_PLLSRC_HSI
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#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
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#define STM32_PREDIV_VALUE 1
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#define STM32_PLLMUL_VALUE 12
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#define STM32_HPRE STM32_HPRE_DIV1
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#define STM32_HSE_ENABLED FALSE
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#define STM32_LSE_ENABLED FALSE
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#define STM32_SW STM32_SW_PLL
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#define STM32_PLLSRC STM32_PLLSRC_HSI
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#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
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#define STM32_PREDIV_VALUE 1
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#define STM32_PLLMUL_VALUE 12
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#define STM32_HPRE STM32_HPRE_DIV1
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