From 29fb7d1e9da06e21764e8cd89e2720c4b510d65a Mon Sep 17 00:00:00 2001 From: barthess Date: Tue, 17 Apr 2012 18:30:45 +0000 Subject: [PATCH] SDC. Added global macros CH_SUCCESS/CH_FAILED in ch.h. SDC driver changed respectively. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4107 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32/sdc_lld.c | 48 ++++++++++++++++---------------- os/hal/src/sdc.c | 24 ++++++++-------- os/kernel/include/ch.h | 10 +++++++ 3 files changed, 46 insertions(+), 36 deletions(-) diff --git a/os/hal/platforms/STM32/sdc_lld.c b/os/hal/platforms/STM32/sdc_lld.c index d3f251b99..890bbe1f2 100644 --- a/os/hal/platforms/STM32/sdc_lld.c +++ b/os/hal/platforms/STM32/sdc_lld.c @@ -96,16 +96,16 @@ static bool_t sdc_lld_prepare_read(SDCDriver *sdcp, uint32_t startblk, /* Send read multiple blocks command to card.*/ if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_READ_MULTIPLE_BLOCK, startblk, resp) || SDC_R1_ERROR(resp[0])) - return TRUE; + return CH_FAILED; } else{ /* Send read single block command.*/ if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_READ_SINGLE_BLOCK, startblk, resp) || SDC_R1_ERROR(resp[0])) - return TRUE; + return CH_FAILED; } - return FALSE; + return CH_SUCCESS; } /** @@ -134,16 +134,16 @@ static bool_t sdc_lld_prepare_write(SDCDriver *sdcp, uint32_t startblk, /* Write multiple blocks command.*/ if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_WRITE_MULTIPLE_BLOCK, startblk, resp) || SDC_R1_ERROR(resp[0])) - return TRUE; + return CH_FAILED; } else{ /* Write single block command.*/ if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_WRITE_BLOCK, startblk, resp) || SDC_R1_ERROR(resp[0])) - return TRUE; + return CH_FAILED; } - return FALSE; + return CH_SUCCESS; } /** @@ -173,7 +173,7 @@ static bool_t sdc_lld_wait_transaction_end(SDCDriver *sdcp, uint32_t n, } if ((SDIO->STA & SDIO_STA_DATAEND) == 0) { chSysUnlock(); - return TRUE; + return CH_FAILED; } /* Wait until DMA channel enabled to be sure that all data transferred.*/ @@ -195,7 +195,7 @@ static bool_t sdc_lld_wait_transaction_end(SDCDriver *sdcp, uint32_t n, if (n > 1) return sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_STOP_TRANSMISSION, 0, resp); else - return FALSE; + return CH_SUCCESS; } /** @@ -488,10 +488,10 @@ bool_t sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, SDIO->ICR = SDIO_ICR_CMDRENDC | SDIO_ICR_CTIMEOUTC | SDIO_ICR_CCRCFAILC; if ((sta & (SDIO_STA_CTIMEOUT)) != 0){ sdc_lld_collect_errors(sdcp); - return TRUE; + return CH_FAILED; } *resp = SDIO->RESP1; - return FALSE; + return CH_SUCCESS; } /** @@ -521,10 +521,10 @@ bool_t sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, SDIO->ICR = SDIO_ICR_CMDRENDC | SDIO_ICR_CTIMEOUTC | SDIO_ICR_CCRCFAILC; if ((sta & (SDIO_STA_CTIMEOUT | SDIO_STA_CCRCFAIL)) != 0){ sdc_lld_collect_errors(sdcp); - return TRUE; + return CH_FAILED; } *resp = SDIO->RESP1; - return FALSE; + return CH_SUCCESS; } /** @@ -556,14 +556,14 @@ bool_t sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, SDIO->ICR = SDIO_ICR_CMDRENDC | SDIO_ICR_CTIMEOUTC | SDIO_ICR_CCRCFAILC; if ((sta & (STM32_SDIO_STA_ERROR_MASK)) != 0){ sdc_lld_collect_errors(sdcp); - return TRUE; + return CH_FAILED; } /* save bytes in reverse order because MSB in response comes first */ *resp++ = SDIO->RESP4; *resp++ = SDIO->RESP3; *resp++ = SDIO->RESP2; *resp = SDIO->RESP1; - return FALSE; + return CH_SUCCESS; } /** @@ -590,7 +590,7 @@ bool_t sdc_lld_read_aligned(SDCDriver *sdcp, uint32_t startblk, /* Checks for errors and waits for the card to be ready for reading.*/ if (_sdc_wait_for_transfer_state(sdcp)) - return TRUE; + return CH_FAILED; /* Prepares the DMA channel for writing.*/ dmaStreamSetMemory0(sdcp->dma, buf); @@ -621,11 +621,11 @@ bool_t sdc_lld_read_aligned(SDCDriver *sdcp, uint32_t startblk, if (sdc_lld_wait_transaction_end(sdcp, n, resp) == TRUE) goto error; else - return FALSE; + return CH_SUCCESS; error: sdc_lld_error_cleanup(sdcp, n, resp); - return TRUE; + return CH_FAILED; } /** @@ -652,7 +652,7 @@ bool_t sdc_lld_write_aligned(SDCDriver *sdcp, uint32_t startblk, /* Checks for errors and waits for the card to be ready for writing.*/ if (_sdc_wait_for_transfer_state(sdcp)) - return TRUE; + return CH_FAILED; /* Prepares the DMA channel for writing.*/ dmaStreamSetMemory0(sdcp->dma, buf); @@ -682,11 +682,11 @@ bool_t sdc_lld_write_aligned(SDCDriver *sdcp, uint32_t startblk, if (sdc_lld_wait_transaction_end(sdcp, n, resp) == TRUE) goto error; else - return FALSE; + return CH_SUCCESS; error: sdc_lld_error_cleanup(sdcp, n, resp); - return TRUE; + return CH_FAILED; } /** @@ -711,12 +711,12 @@ bool_t sdc_lld_read(SDCDriver *sdcp, uint32_t startblk, uint32_t i; for (i = 0; i < n; i++) { if (sdc_lld_read_aligned(sdcp, startblk, u.buf, 1)) - return TRUE; + return CH_FAILED; memcpy(buf, u.buf, SDC_BLOCK_SIZE); buf += SDC_BLOCK_SIZE; startblk++; } - return FALSE; + return CH_SUCCESS; } #endif /* STM32_SDC_SDIO_UNALIGNED_SUPPORT */ return sdc_lld_read_aligned(sdcp, startblk, buf, n); @@ -746,10 +746,10 @@ bool_t sdc_lld_write(SDCDriver *sdcp, uint32_t startblk, memcpy(u.buf, buf, SDC_BLOCK_SIZE); buf += SDC_BLOCK_SIZE; if (sdc_lld_write_aligned(sdcp, startblk, u.buf, 1)) - return TRUE; + return CH_FAILED; startblk++; } - return FALSE; + return CH_SUCCESS; } #endif /* STM32_SDC_SDIO_UNALIGNED_SUPPORT */ return sdc_lld_write_aligned(sdcp, startblk, buf, n); diff --git a/os/hal/src/sdc.c b/os/hal/src/sdc.c index 96c1b4561..c46589bae 100644 --- a/os/hal/src/sdc.c +++ b/os/hal/src/sdc.c @@ -101,10 +101,10 @@ bool_t _sdc_wait_for_transfer_state(SDCDriver *sdcp) { if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_SEND_STATUS, sdcp->rca, resp) || SDC_R1_ERROR(resp[0])) - return TRUE; + return CH_FAILED; switch (SDC_R1_STS(resp[0])) { case SDC_STS_TRAN: - return FALSE; + return CH_SUCCESS; case SDC_STS_DATA: case SDC_STS_RCV: case SDC_STS_PRG: @@ -115,11 +115,11 @@ bool_t _sdc_wait_for_transfer_state(SDCDriver *sdcp) { default: /* The card should have been initialized so any other state is not valid and is reported as an error.*/ - return TRUE; + return CH_FAILED; } } /* If something going too wrong.*/ - return TRUE; + return CH_FAILED; } /*===========================================================================*/ @@ -251,7 +251,7 @@ bool_t sdcConnect(SDCDriver *sdcp) { #if SDC_MMC_SUPPORT if ((sdcp->cardmode & SDC_MODE_CARDTYPE_MASK) == SDC_MODE_CARDTYPE_MMC) { /* TODO: MMC initialization.*/ - return TRUE; + return CH_FAILED; } else #endif /* SDC_MMC_SUPPORT */ @@ -350,13 +350,13 @@ bool_t sdcConnect(SDCDriver *sdcp) { /* Initialization complete.*/ sdcp->state = SDC_ACTIVE; - return FALSE; + return CH_SUCCESS; /* Initialization failed.*/ failed: sdc_lld_stop_clk(sdcp); sdcp->state = SDC_READY; - return TRUE; + return CH_FAILED; } /** @@ -379,20 +379,20 @@ bool_t sdcDisconnect(SDCDriver *sdcp) { "sdcDisconnect(), #1", "invalid state"); if (sdcp->state == SDC_READY) { chSysUnlock(); - return FALSE; + return CH_SUCCESS; } sdcp->state = SDC_DISCONNECTING; chSysUnlock(); /* Waits for eventual pending operations completion.*/ if (_sdc_wait_for_transfer_state(sdcp)) - return TRUE; + return CH_FAILED; /* Card clock stopped.*/ sdc_lld_stop_clk(sdcp); sdcp->state = SDC_READY; - return FALSE; + return CH_SUCCESS; } /** @@ -419,7 +419,7 @@ bool_t sdcRead(SDCDriver *sdcp, uint32_t startblk, if ((startblk + n - 1) > sdcp->capacity){ sdcp->errors |= SDC_OVERFLOW_ERROR; - return TRUE; + return CH_FAILED; } chSysLock(); @@ -456,7 +456,7 @@ bool_t sdcWrite(SDCDriver *sdcp, uint32_t startblk, if ((startblk + n - 1) > sdcp->capacity){ sdcp->errors |= SDC_OVERFLOW_ERROR; - return TRUE; + return CH_FAILED; } chSysLock(); diff --git a/os/kernel/include/ch.h b/os/kernel/include/ch.h index 65ca431e0..7386b622b 100644 --- a/os/kernel/include/ch.h +++ b/os/kernel/include/ch.h @@ -72,6 +72,16 @@ #define TRUE (!FALSE) #endif +/* + * Human readable boolean error conditions. + */ +#ifndef CH_SUCCESS +#define CH_SUCCESS FALSE +#endif +#ifndef CH_FAILED +#define CH_FAILED TRUE +#endif + #include "chconf.h" #include "chtypes.h" #include "chlists.h"