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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13307 27425a3e-05d8-49a3-a47f-9c15f0e5edd8

This commit is contained in:
Giovanni Di Sirio 2020-01-26 09:22:51 +00:00
parent 9f7f61e2de
commit 2a3f333d73
19 changed files with 42 additions and 12 deletions
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4
demos/STM32/RT-STM32H743I-NUCLEO144/cfg/mcuconf.h
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@ -183,8 +183,8 @@
#define STM32_IRQ_QUADSPI1_PRIORITY 10 #define STM32_IRQ_QUADSPI1_PRIORITY 10
#define STM32_IRQ_SDMMC1_PRIORITY 8 #define STM32_IRQ_SDMMC1_PRIORITY 9
#define STM32_IRQ_SDMMC2_PRIORITY 8 #define STM32_IRQ_SDMMC2_PRIORITY 9
#define STM32_IRQ_TIM1_UP_PRIORITY 7 #define STM32_IRQ_TIM1_UP_PRIORITY 7
#define STM32_IRQ_TIM1_CC_PRIORITY 7 #define STM32_IRQ_TIM1_CC_PRIORITY 7

2
demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/mcuconf.h
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@ -125,6 +125,8 @@
#define STM32_IRQ_EXTI20_PRIORITY 6 #define STM32_IRQ_EXTI20_PRIORITY 6
#define STM32_IRQ_EXTI21_22_PRIORITY 6 #define STM32_IRQ_EXTI21_22_PRIORITY 6
#define STM32_IRQ_SDMMC1_PRIORITY 9
#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7 #define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7
#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7 #define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7
#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7 #define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7

2
demos/STM32/RT-STM32L4R9-DISCOVERY/cfg/mcuconf.h
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@ -125,6 +125,8 @@
#define STM32_IRQ_EXTI20_PRIORITY 6 #define STM32_IRQ_EXTI20_PRIORITY 6
#define STM32_IRQ_EXTI21_22_PRIORITY 6 #define STM32_IRQ_EXTI21_22_PRIORITY 6
#define STM32_IRQ_SDMMC1_PRIORITY 9
#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7 #define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7
#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7 #define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7
#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7 #define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7

6
os/hal/ports/STM32/STM32L4xx+/stm32_isr.c
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@ -64,6 +64,8 @@
#include "stm32_exti20.inc" #include "stm32_exti20.inc"
#include "stm32_exti21_22.inc" #include "stm32_exti21_22.inc"
#include "stm32_sdmmc1.inc"
#include "stm32_usart1.inc" #include "stm32_usart1.inc"
#include "stm32_usart2.inc" #include "stm32_usart2.inc"
#include "stm32_usart3.inc" #include "stm32_usart3.inc"
@ -103,6 +105,8 @@ void irqInit(void) {
exti19_irq_init(); exti19_irq_init();
exti21_22_irq_init(); exti21_22_irq_init();
sdmmc1_irq_init();
tim1_tim15_tim16_tim17_irq_init(); tim1_tim15_tim16_tim17_irq_init();
tim2_irq_init(); tim2_irq_init();
tim3_irq_init(); tim3_irq_init();
@ -139,6 +143,8 @@ void irqDeinit(void) {
exti19_irq_deinit(); exti19_irq_deinit();
exti21_22_irq_deinit(); exti21_22_irq_deinit();
sdmmc1_irq_deinit();
tim1_tim15_tim16_tim17_irq_deinit(); tim1_tim15_tim16_tim17_irq_deinit();
tim2_irq_deinit(); tim2_irq_deinit();
tim3_irq_deinit(); tim3_irq_deinit();

4
testhal/STM32/multi/ADC/cfg/stm32h743_nucleo144/mcuconf.h
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@ -183,8 +183,8 @@
#define STM32_IRQ_QUADSPI1_PRIORITY 10 #define STM32_IRQ_QUADSPI1_PRIORITY 10
#define STM32_IRQ_SDMMC1_PRIORITY 8 #define STM32_IRQ_SDMMC1_PRIORITY 9
#define STM32_IRQ_SDMMC2_PRIORITY 8 #define STM32_IRQ_SDMMC2_PRIORITY 9
#define STM32_IRQ_TIM1_UP_PRIORITY 7 #define STM32_IRQ_TIM1_UP_PRIORITY 7
#define STM32_IRQ_TIM1_CC_PRIORITY 7 #define STM32_IRQ_TIM1_CC_PRIORITY 7

2
testhal/STM32/multi/ADC/cfg/stm32l4r5zi_nucleo144/mcuconf.h
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@ -125,6 +125,8 @@
#define STM32_IRQ_EXTI20_PRIORITY 6 #define STM32_IRQ_EXTI20_PRIORITY 6
#define STM32_IRQ_EXTI21_22_PRIORITY 6 #define STM32_IRQ_EXTI21_22_PRIORITY 6
#define STM32_IRQ_SDMMC1_PRIORITY 9
#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7 #define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7
#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7 #define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7
#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7 #define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7

4
testhal/STM32/multi/DAC/cfg/stm32h743_nucleo144/mcuconf.h
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@ -183,8 +183,8 @@
#define STM32_IRQ_QUADSPI1_PRIORITY 10 #define STM32_IRQ_QUADSPI1_PRIORITY 10
#define STM32_IRQ_SDMMC1_PRIORITY 8 #define STM32_IRQ_SDMMC1_PRIORITY 9
#define STM32_IRQ_SDMMC2_PRIORITY 8 #define STM32_IRQ_SDMMC2_PRIORITY 9
#define STM32_IRQ_TIM1_UP_PRIORITY 7 #define STM32_IRQ_TIM1_UP_PRIORITY 7
#define STM32_IRQ_TIM1_CC_PRIORITY 7 #define STM32_IRQ_TIM1_CC_PRIORITY 7

2
testhal/STM32/multi/DAC/cfg/stm32l4r5zi_nucleo144/mcuconf.h
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@ -125,6 +125,8 @@
#define STM32_IRQ_EXTI20_PRIORITY 6 #define STM32_IRQ_EXTI20_PRIORITY 6
#define STM32_IRQ_EXTI21_22_PRIORITY 6 #define STM32_IRQ_EXTI21_22_PRIORITY 6
#define STM32_IRQ_SDMMC1_PRIORITY 9
#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7 #define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7
#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7 #define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7
#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7 #define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7

2
testhal/STM32/multi/RTC/cfg/stm32l4r5_nucleo144/mcuconf.h
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@ -125,6 +125,8 @@
#define STM32_IRQ_EXTI20_PRIORITY 6 #define STM32_IRQ_EXTI20_PRIORITY 6
#define STM32_IRQ_EXTI21_22_PRIORITY 6 #define STM32_IRQ_EXTI21_22_PRIORITY 6
#define STM32_IRQ_SDMMC1_PRIORITY 9
#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7 #define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7
#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7 #define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7
#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7 #define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7

2
testhal/STM32/multi/SDMMC-FATFS/cfg/stm32l4r9ai_discovery/mcuconf.h
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@ -125,6 +125,8 @@
#define STM32_IRQ_EXTI20_PRIORITY 6 #define STM32_IRQ_EXTI20_PRIORITY 6
#define STM32_IRQ_EXTI21_22_PRIORITY 6 #define STM32_IRQ_EXTI21_22_PRIORITY 6
#define STM32_IRQ_SDMMC1_PRIORITY 9
#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7 #define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7
#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7 #define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7
#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7 #define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7

4
testhal/STM32/multi/SPI/cfg/stm32h743_nucleo144/mcuconf.h
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@ -183,8 +183,8 @@
#define STM32_IRQ_QUADSPI1_PRIORITY 10 #define STM32_IRQ_QUADSPI1_PRIORITY 10
#define STM32_IRQ_SDMMC1_PRIORITY 8 #define STM32_IRQ_SDMMC1_PRIORITY 9
#define STM32_IRQ_SDMMC2_PRIORITY 8 #define STM32_IRQ_SDMMC2_PRIORITY 9
#define STM32_IRQ_TIM1_UP_PRIORITY 7 #define STM32_IRQ_TIM1_UP_PRIORITY 7
#define STM32_IRQ_TIM1_CC_PRIORITY 7 #define STM32_IRQ_TIM1_CC_PRIORITY 7

2
testhal/STM32/multi/SPI/cfg/stm32l4r5_nucleo144/mcuconf.h
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@ -125,6 +125,8 @@
#define STM32_IRQ_EXTI20_PRIORITY 6 #define STM32_IRQ_EXTI20_PRIORITY 6
#define STM32_IRQ_EXTI21_22_PRIORITY 6 #define STM32_IRQ_EXTI21_22_PRIORITY 6
#define STM32_IRQ_SDMMC1_PRIORITY 9
#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7 #define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7
#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7 #define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7
#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7 #define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7

2
testhal/STM32/multi/SPI/cfg/stm32l4r9_discovery/mcuconf.h
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@ -125,6 +125,8 @@
#define STM32_IRQ_EXTI20_PRIORITY 6 #define STM32_IRQ_EXTI20_PRIORITY 6
#define STM32_IRQ_EXTI21_22_PRIORITY 6 #define STM32_IRQ_EXTI21_22_PRIORITY 6
#define STM32_IRQ_SDMMC1_PRIORITY 9
#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7 #define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7
#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7 #define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7
#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7 #define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7

2
testhal/STM32/multi/TRNG/cfg/stm32l4r5zi_nucleo144/mcuconf.h
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@ -125,6 +125,8 @@
#define STM32_IRQ_EXTI20_PRIORITY 6 #define STM32_IRQ_EXTI20_PRIORITY 6
#define STM32_IRQ_EXTI21_22_PRIORITY 6 #define STM32_IRQ_EXTI21_22_PRIORITY 6
#define STM32_IRQ_SDMMC1_PRIORITY 9
#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7 #define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7
#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7 #define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7
#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7 #define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7

4
testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/mcuconf.h
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@ -183,8 +183,8 @@
#define STM32_IRQ_QUADSPI1_PRIORITY 10 #define STM32_IRQ_QUADSPI1_PRIORITY 10
#define STM32_IRQ_SDMMC1_PRIORITY 8 #define STM32_IRQ_SDMMC1_PRIORITY 9
#define STM32_IRQ_SDMMC2_PRIORITY 8 #define STM32_IRQ_SDMMC2_PRIORITY 9
#define STM32_IRQ_TIM1_UP_PRIORITY 7 #define STM32_IRQ_TIM1_UP_PRIORITY 7
#define STM32_IRQ_TIM1_CC_PRIORITY 7 #define STM32_IRQ_TIM1_CC_PRIORITY 7

2
testhal/STM32/multi/USB_CDC/cfg/stm32l4r5_nucleo144/mcuconf.h
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@ -125,6 +125,8 @@
#define STM32_IRQ_EXTI20_PRIORITY 6 #define STM32_IRQ_EXTI20_PRIORITY 6
#define STM32_IRQ_EXTI21_22_PRIORITY 6 #define STM32_IRQ_EXTI21_22_PRIORITY 6
#define STM32_IRQ_SDMMC1_PRIORITY 9
#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7 #define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7
#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7 #define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7
#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7 #define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7

2
testhal/STM32/multi/WSPI-MFS/cfg/stm32l4r9_discovery/mcuconf.h
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@ -125,6 +125,8 @@
#define STM32_IRQ_EXTI20_PRIORITY 6 #define STM32_IRQ_EXTI20_PRIORITY 6
#define STM32_IRQ_EXTI21_22_PRIORITY 6 #define STM32_IRQ_EXTI21_22_PRIORITY 6
#define STM32_IRQ_SDMMC1_PRIORITY 9
#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7 #define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7
#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7 #define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7
#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7 #define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7

4
tools/ftl/processors/conf/mcuconf_stm32h743xx/mcuconf.h.ftl
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@ -194,8 +194,8 @@
#define STM32_IRQ_QUADSPI1_PRIORITY ${doc.STM32_IRQ_QUADSPI1_PRIORITY!"10"} #define STM32_IRQ_QUADSPI1_PRIORITY ${doc.STM32_IRQ_QUADSPI1_PRIORITY!"10"}
#define STM32_IRQ_SDMMC1_PRIORITY ${doc.STM32_IRQ_SDMMC1_PRIORITY!"8"} #define STM32_IRQ_SDMMC1_PRIORITY ${doc.STM32_IRQ_SDMMC1_PRIORITY!"9"}
#define STM32_IRQ_SDMMC2_PRIORITY ${doc.STM32_IRQ_SDMMC2_PRIORITY!"8"} #define STM32_IRQ_SDMMC2_PRIORITY ${doc.STM32_IRQ_SDMMC2_PRIORITY!"9"}
#define STM32_IRQ_TIM1_UP_PRIORITY ${doc.STM32_IRQ_TIM1_UP_PRIORITY!"7"} #define STM32_IRQ_TIM1_UP_PRIORITY ${doc.STM32_IRQ_TIM1_UP_PRIORITY!"7"}
#define STM32_IRQ_TIM1_CC_PRIORITY ${doc.STM32_IRQ_TIM1_CC_PRIORITY!"7"} #define STM32_IRQ_TIM1_CC_PRIORITY ${doc.STM32_IRQ_TIM1_CC_PRIORITY!"7"}

2
tools/ftl/processors/conf/mcuconf_stm32l4rxxx/mcuconf.h.ftl
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@ -136,6 +136,8 @@
#define STM32_IRQ_EXTI20_PRIORITY ${doc.STM32_IRQ_EXTI20_PRIORITY!"6"} #define STM32_IRQ_EXTI20_PRIORITY ${doc.STM32_IRQ_EXTI20_PRIORITY!"6"}
#define STM32_IRQ_EXTI21_22_PRIORITY ${doc.STM32_IRQ_EXTI21_22_PRIORITY!"6"} #define STM32_IRQ_EXTI21_22_PRIORITY ${doc.STM32_IRQ_EXTI21_22_PRIORITY!"6"}
#define STM32_IRQ_SDMMC1_PRIORITY ${doc.STM32_IRQ_SDMMC1_PRIORITY!"9"}
#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY ${doc.STM32_IRQ_TIM1_BRK_TIM15_PRIORITY!"7"} #define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY ${doc.STM32_IRQ_TIM1_BRK_TIM15_PRIORITY!"7"}
#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY ${doc.STM32_IRQ_TIM1_UP_TIM16_PRIORITY!"7"} #define STM32_IRQ_TIM1_UP_TIM16_PRIORITY ${doc.STM32_IRQ_TIM1_UP_TIM16_PRIORITY!"7"}
#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY ${doc.STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY!"7"} #define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY ${doc.STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY!"7"}