git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3064 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -28,12 +28,17 @@
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*/
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static WORKING_AREA(waThread1, 128);
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static msg_t Thread1(void *arg) {
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static uint32_t seconds_counter;
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(void)arg;
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while (TRUE) {
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chThdSleepMilliseconds(1000);
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seconds_counter++;
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palSetPad(GPIOB, GPIOB_LED3);
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chThdSleepMilliseconds(250);
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palClearPad(GPIOB, GPIOB_LED3);
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chThdSleepMilliseconds(250);
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palSetPad(GPIOB, GPIOB_LED4);
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chThdSleepMilliseconds(250);
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palClearPad(GPIOB, GPIOB_LED4);
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chThdSleepMilliseconds(250);
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}
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}
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@ -145,7 +145,13 @@ typedef struct {
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volatile uint32_t PUPDR;
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volatile uint32_t IDR;
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volatile uint32_t ODR;
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volatile uint32_t BSRR;
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volatile union {
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uint32_t W;
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struct {
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uint16_t set;
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uint16_t clear;
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} H;
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} BSRR;
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volatile uint32_t LCKR;
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volatile uint32_t AFRL;
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volatile uint32_t AFRH;
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@ -357,11 +363,11 @@ typedef GPIO_TypeDef * ioportid_t;
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*
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* @notapi
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*/
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#define pal_lld_setport(port, bits) ((port)->BSRR = (bits))
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#define pal_lld_setport(port, bits) ((port)->BSRR.H.set = (uint16_t)(bits))
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/**
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* @brief Clears a bits mask on a I/O port.
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* @details This function is implemented by writing the GPIO BRR register, the
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* @details This function is implemented by writing the GPIO BSRR register, the
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* implementation has no side effects.
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* @note This function is not meant to be invoked directly by the
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* application code.
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@ -374,7 +380,7 @@ typedef GPIO_TypeDef * ioportid_t;
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*
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* @notapi
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*/
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#define pal_lld_clearport(port, bits) ((port)->BRR = (bits))
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#define pal_lld_clearport(port, bits) ((port)->BSRR.H.clear = (uint16_t)(bits))
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/**
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* @brief Writes a group of bits.
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@ -395,8 +401,8 @@ typedef GPIO_TypeDef * ioportid_t;
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* @notapi
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*/
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#define pal_lld_writegroup(port, mask, offset, bits) \
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((port)->BSRR = ((~(bits) & (mask)) << (16 + (offset))) | \
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(((bits) & (mask)) << (offset)))
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((port)->BSRR.W = ((~(bits) & (mask)) << (16 + (offset))) | \
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(((bits) & (mask)) << (offset)))
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/**
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* @brief Pads group mode setup.
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