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Fixed Bug #759 and #760. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/stable_16.1.x@9661 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
Rocco Marco Guglielmi 2016-06-25 14:44:10 +00:00
parent 47831ebfd6
commit 2c2341c13a
3 changed files with 29 additions and 5 deletions
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20
os/hal/ports/STM32/STM32L4xx/hal_lld.c
View File

@ -114,7 +114,7 @@ void hal_lld_init(void) {
}
/**
* @brief STM32F2xx clocks and PLL initialization.
* @brief STM32L4xx clocks and PLL initialization.
* @note All the involved constants come from the file @p board.h.
* @note This function should be invoked just after the system reset.
*
@ -124,12 +124,14 @@ void stm32_clock_init(void) {
#if !STM32_NO_INIT
/* PWR clock enable.*/
RCC->APB1ENR1 = RCC_APB1ENR1_PWREN;
RCC->APB1ENR1 |= RCC_APB1ENR1_PWREN;
/* Initial clocks setup and wait for MSI stabilization, the MSI clock is
always enabled because it is the fall back clock when PLL the fails.
Trim fields are not altered from reset values.*/
RCC->CR = RCC_CR_MSION | STM32_MSIRANGE_4M;
/* MSIRANGE can be set only when MSI is OFF or READY.*/
RCC->CR = RCC_CR_MSION;
while ((RCC->CR & RCC_CR_MSIRDY) == 0)
; /* Wait until MSI is stable. */
@ -189,6 +191,18 @@ void stm32_clock_init(void) {
RCC->CR |= RCC_CR_MSIPLLEN;
#endif
/* Changing MSIRANGE value. Meanwhile range is set by MSISRANGE which is 4MHz.*/
RCC->CR |= STM32_MSIRANGE;
/* Switching from MSISRANGE to MSIRANGE.*/
RCC->CR |= RCC_CR_MSIRGSEL;
while ((RCC->CR & RCC_CR_MSIRDY) == 0)
;
/* Updating MSISRANGE value. MSISRANGE can be set only when MSIRGSEL is high.
This range is used exiting the Standby mode until MSIRGSEL is set.*/
RCC->CSR |= STM32_MSISRANGE;
#if STM32_ACTIVATE_PLL || STM32_ACTIVATE_PLLSAI1 || STM32_ACTIVATE_PLLSAI2
/* PLLM and PLLSRC are common to all PLLs.*/
RCC->PLLCFGR = STM32_PLLR | STM32_PLLREN |

11
os/hal/ports/STM32/STM32L4xx/hal_lld.h
View File

@ -15,8 +15,8 @@
*/
/**
* @file STM32L1xx/hal_lld.h
* @brief STM32L1xx HAL subsystem low level driver header.
* @file STM32L4xx/hal_lld.h
* @brief STM32L4xx HAL subsystem low level driver header.
* @pre This module requires the following macros to be defined in the
* @p board.h file:
* - STM32_LSECLK.
@ -1108,6 +1108,13 @@
#endif /* !STM32_LSE_ENABLED */
/*
* MSI related checks.
*/
#if (STM32_MSIRANGE == STM32_MSIRANGE_48M) && !STM32_MSIPLL_ENABLED
#warning "STM32_MSIRANGE_48M should be used with STM32_MSIPLL_ENABLED"
#endif
/**
* @brief STM32_PLLM field.
*/

3
readme.txt
View File

@ -73,6 +73,9 @@
*****************************************************************************
*** 16.1.5 ***
- HAL: Fixed wrong comment in STM32L4xx\hal_lld (bug #760).
- HAL: Fixed wrong MSIRANGE management for STM32L4xx in function
stm32_clock_init() (bug #759).
- HAL: Fixed problem in USB driver when changing configuration (bug #757).
- HAL: Fixed bug in function usbDisableEndpointsI() (bug #756).
- HAL: Fixed wrong info in readme of LWIP related demos (bug #755).