git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11128 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
parent
35328c52fe
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*** ChibiOS/RT Test Suite
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***
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*** Compiled: Dec 7 2017 - 08:49:34
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*** Compiled: Dec 7 2017 - 09:48:31
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*** Platform: SPC56ECxx Gateway
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*** Test Board: EVB with SPC56ECxx Mini Module
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============================================================================
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=== Test Sequence 1 (Information)
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----------------------------------------------------------------------------
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--- Test Case 1.1 (Kernel Info)
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--- Test Case 1.1 (Port Info)
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--- Architecture: Power Architecture e200
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--- Compiler: GCC 4.6.3 build on 2013-01-07
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--- Natural alignment: 4
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--- Stack alignment: 8
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--- Working area alignment: 8
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 1.2 (Kernel Info)
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--- Product: ChibiOS/RT
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--- Stable Flag: 0
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--- Version String: 5.0.0
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@ -17,7 +25,7 @@
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--- Patch Number: 0
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 1.2 (Kernel Settings)
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--- Test Case 1.3 (Kernel Settings)
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--- CH_CFG_ST_RESOLUTION: 32
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--- CH_CFG_ST_FREQUENCY: 1000
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--- CH_CFG_ST_TIMEDELTA: 0
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 10.2 (Messages performance #2)
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--- Score : 305736 msgs/S, 611472 ctxswc/S
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--- Score : 305735 msgs/S, 611470 ctxswc/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 10.3 (Messages performance #3)
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@ -192,7 +200,7 @@
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 10.6 (Threads performance, create/exit only)
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--- Score : 317909 threads/S
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--- Score : 317908 threads/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 10.7 (Mass reschedule performance)
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@ -212,7 +220,7 @@
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 10.11 (Mutexes lock/unlock performance)
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--- Score : 1318240 lock+unlock/S
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--- Score : 1318244 lock+unlock/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 10.12 (RAM Footprint)
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@ -232,7 +240,7 @@ Final result: SUCCESS
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*** ChibiOS OS Library Test Suite
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***
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*** Compiled: Dec 7 2017 - 08:49:34
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*** Compiled: Dec 7 2017 - 09:48:31
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*** Platform: SPC56ECxx Gateway
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*** Test Board: EVB with SPC56ECxx Mini Module
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*** ChibiOS/RT Test Suite
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***
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*** Compiled: Dec 7 2017 - 08:47:19
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*** Compiled: Dec 7 2017 - 09:42:16
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*** Platform: SPC56ECxx Gateway
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*** Test Board: EVB with SPC56ECxx Mini Module
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============================================================================
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=== Test Sequence 1 (Information)
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----------------------------------------------------------------------------
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--- Test Case 1.1 (Kernel Info)
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--- Test Case 1.1 (Port Info)
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--- Architecture: Power Architecture e200
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--- Compiler: GHS
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--- Natural alignment: 4
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--- Stack alignment: 8
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--- Working area alignment: 8
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 1.2 (Kernel Info)
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--- Product: ChibiOS/RT
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--- Stable Flag: 0
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--- Version String: 5.0.0
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--- Patch Number: 0
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 1.2 (Kernel Settings)
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--- Test Case 1.3 (Kernel Settings)
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--- CH_CFG_ST_RESOLUTION: 32
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--- CH_CFG_ST_FREQUENCY: 1000
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--- CH_CFG_ST_TIMEDELTA: 0
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=== Test Sequence 10 (Benchmarks)
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----------------------------------------------------------------------------
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--- Test Case 10.1 (Messages performance #1)
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--- Score : 368797 msgs/S, 737594 ctxswc/S
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--- Score : 368798 msgs/S, 737596 ctxswc/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 10.2 (Messages performance #2)
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--- Score : 324839 msgs/S, 649678 ctxswc/S
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--- Score : 324836 msgs/S, 649672 ctxswc/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 10.3 (Messages performance #3)
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 10.5 (Threads performance, full cycle)
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--- Score : 268113 threads/S
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--- Score : 268142 threads/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 10.6 (Threads performance, create/exit only)
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 10.7 (Mass reschedule performance)
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--- Score : 99059 reschedules/S, 594354 ctxswc/S
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--- Score : 99061 reschedules/S, 594366 ctxswc/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 10.8 (Round-Robin voluntary reschedule)
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--- Score : 635160 ctxswc/S
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--- Score : 635180 ctxswc/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 10.9 (Virtual Timers set/reset performance)
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--- Score : 1774952 timers/S
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--- Score : 1774954 timers/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 10.10 (Semaphores wait/signal performance)
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--- Score : 1728804 wait+signal/S
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--- Score : 1728808 wait+signal/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 10.11 (Mutexes lock/unlock performance)
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--- Score : 1473752 lock+unlock/S
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--- Score : 1473756 lock+unlock/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 10.12 (RAM Footprint)
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*** ChibiOS OS Library Test Suite
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***
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*** Compiled: Dec 7 2017 - 08:47:19
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*** Compiled: Dec 7 2017 - 09:42:16
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*** Platform: SPC56ECxx Gateway
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*** Test Board: EVB with SPC56ECxx Mini Module
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*** ChibiOS/RT Test Suite
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***
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*** Compiled: Sep 19 2017 - 12:17:36
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*** Compiled: Dec 7 2017 - 09:22:24
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*** Platform: STM32F746 Very High Performance with DSP and FPU
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*** Test Board: STMicroelectronics STM32F746G-Discovery
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*** Compiler: GCC 5.4.1 20160919 (release) [ARM/embedded-5-branch revision 240496]
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*** Architecture: ARMv7E-M
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*** Core Variant: Cortex-M7
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*** Port Info: Advanced kernel mode
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============================================================================
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=== Test Sequence 1 (Information)
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----------------------------------------------------------------------------
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--- Test Case 1.1 (Kernel Info)
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--- Product: ChibiOS/RT
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--- Stable Flag: 1
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--- Version String: 4.0.1
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--- Major Number: 4
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--- Minor Number: 0
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--- Patch Number: 1
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--- Test Case 1.1 (Port Info)
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--- Architecture: ARMv7E-M
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--- Compiler: GCC 5.4.1 20160609 (release) [ARM/embedded-5-branch revision 237715]
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--- Natural alignment: 4
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--- Stack alignment: 8
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--- Working area alignment: 8
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 1.2 (Kernel Settings)
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--- Test Case 1.2 (Kernel Info)
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--- Product: ChibiOS/RT
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--- Stable Flag: 0
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--- Version String: 5.0.0
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--- Major Number: 5
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--- Minor Number: 0
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--- Patch Number: 0
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 1.3 (Kernel Settings)
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--- CH_CFG_ST_RESOLUTION: 32
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--- CH_CFG_ST_FREQUENCY: 10000
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--- CH_CFG_ST_TIMEDELTA: 2
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--- CH_DBG_SYSTEM_STATE_CHECK: 0
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--- CH_DBG_ENABLE_CHECKS: 0
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--- CH_DBG_ENABLE_ASSERTS: 0
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--- CH_DBG_TRACE_MASK: 255
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--- CH_DBG_TRACE_MASK: 0
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--- CH_DBG_TRACE_BUFFER_SIZE: 128
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--- CH_DBG_ENABLE_STACK_CHECK: 0
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--- CH_DBG_FILL_THREADS: 0
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--- CH_DBG_THREADS_PROFILING: 0
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--- Result: SUCCESS
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============================================================================
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=== Test Sequence 2 (System layer and port interface)
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----------------------------------------------------------------------------
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--- Test Case 2.1 (System integrity functionality)
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 2.4 (System Tick Counter functionality)
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--- Result: SUCCESS
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============================================================================
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=== Test Sequence 3 (Threads Functionality)
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----------------------------------------------------------------------------
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--- Test Case 3.1 (Thread Sleep functionality)
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 3.4 (Priority change test with Priority Inheritance)
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--- Result: SUCCESS
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============================================================================
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=== Test Sequence 4 (Suspend/Resume)
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----------------------------------------------------------------------------
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--- Test Case 4.1 (Suspend and Resume functionality)
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--- Result: SUCCESS
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============================================================================
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=== Test Sequence 5 (Counter Semaphores)
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----------------------------------------------------------------------------
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--- Test Case 5.1 (Semaphore primitives, no state change)
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 5.6 (Testing Binary Semaphores special case)
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--- Result: SUCCESS
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============================================================================
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=== Test Sequence 6 (Mutexes, Condition Variables and Priority Inheritance)
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----------------------------------------------------------------------------
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--- Test Case 6.1 (Priority enqueuing test)
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 6.6 (Condition Variable priority boost test)
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--- Result: SUCCESS
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============================================================================
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=== Test Sequence 7 (Synchronous Messages)
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----------------------------------------------------------------------------
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--- Test Case 7.1 (Messages Server loop)
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--- Result: SUCCESS
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============================================================================
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=== Test Sequence 8 (Event Sources and Event Flags)
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----------------------------------------------------------------------------
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--- Test Case 8.1 (Events registration)
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 8.7 (Broadcasting using chEvtBroadcast())
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--- Result: SUCCESS
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============================================================================
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=== Test Sequence 9 (Dynamic threads)
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----------------------------------------------------------------------------
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--- Test Case 9.1 (Mailbox normal API, non-blocking tests)
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--- Test Case 9.1 (Threads creation from Memory Heap)
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 9.2 (Mailbox I-Class API, non-blocking tests)
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--- Test Case 9.2 (Threads creation from Memory Pool)
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--- Result: SUCCESS
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============================================================================
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=== Test Sequence 10 (Benchmarks)
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----------------------------------------------------------------------------
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--- Test Case 10.1 (Messages performance #1)
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--- Score : 931025 msgs/S, 1862050 ctxswc/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 9.3 (Mailbox timeouts)
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--- Test Case 10.2 (Messages performance #2)
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--- Score : 818174 msgs/S, 1636348 ctxswc/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 10.1 (Loading and emptying a memory pool)
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--- Test Case 10.3 (Messages performance #3)
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--- Score : 818173 msgs/S, 1636346 ctxswc/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 10.2 (Loading and emptying a guarded memory pool without waiting)
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--- Test Case 10.4 (Context Switch performance)
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--- Score : 3483848 ctxswc/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 10.3 (Guarded Memory Pools timeout)
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--- Test Case 10.5 (Threads performance, full cycle)
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--- Score : 606734 threads/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 11.1 (Allocation and fragmentation)
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--- Test Case 10.6 (Threads performance, create/exit only)
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--- Score : 760555 threads/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 11.2 (Default Heap)
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--- Test Case 10.7 (Mass reschedule performance)
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--- Score : 291889 reschedules/S, 1751334 ctxswc/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 12.1 (Threads creation from Memory Heap)
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--- Test Case 10.8 (Round-Robin voluntary reschedule)
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--- Score : 2102168 ctxswc/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 12.2 (Threads creation from Memory Pool)
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--- Test Case 10.9 (Virtual Timers set/reset performance)
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--- Score : 1928652 timers/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 13.1 (Messages performance #1)
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--- Score : 1079993 msgs/S, 2159986 ctxswc/S
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--- Test Case 10.10 (Semaphores wait/signal performance)
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--- Score : 2918896 wait+signal/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 13.2 (Messages performance #2)
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--- Score : 915249 msgs/S, 1830498 ctxswc/S
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--- Test Case 10.11 (Mutexes lock/unlock performance)
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--- Score : 2399976 lock+unlock/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 13.3 (Messages performance #3)
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--- Score : 915248 msgs/S, 1830496 ctxswc/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 13.4 (Context Switch performance)
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--- Score : 4645136 ctxswc/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 13.5 (Threads performance, full cycle)
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--- Score : 674996 threads/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 13.6 (Threads performance, create/exit only)
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--- Score : 885241 threads/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 13.7 (Mass reschedule performance)
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--- Score : 346153 reschedules/S, 2076918 ctxswc/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 13.8 (Round-Robin voluntary reschedule)
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--- Score : 2489900 ctxswc/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 13.9 (Virtual Timers set/reset performance)
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--- Score : 2203294 timers/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 13.10 (Semaphores wait/signal performance)
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--- Score : 3176464 wait+signal/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 13.11 (Mutexes lock/unlock performance)
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--- Score : 2602404 lock+unlock/S
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 13.12 (RAM Footprint)
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--- System: 120 bytes
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--- Test Case 10.12 (RAM Footprint)
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--- System: 2176 bytes
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--- Thread: 68 bytes
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--- Timer : 20 bytes
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--- Semaph: 12 bytes
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Final result: SUCCESS
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*** ChibiOS OS Library Test Suite
|
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***
|
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*** Compiled: Dec 7 2017 - 09:22:24
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*** Platform: STM32F746 Very High Performance with DSP and FPU
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*** Test Board: STMicroelectronics STM32F746G-Discovery
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============================================================================
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=== Test Sequence 1 (Mailboxes)
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----------------------------------------------------------------------------
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--- Test Case 1.1 (Mailbox normal API, non-blocking tests)
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 1.2 (Mailbox I-Class API, non-blocking tests)
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 1.3 (Mailbox timeouts)
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--- Result: SUCCESS
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============================================================================
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=== Test Sequence 2 (Memory Pools)
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----------------------------------------------------------------------------
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--- Test Case 2.1 (Loading and emptying a memory pool)
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 2.2 (Loading and emptying a guarded memory pool without waiting)
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 2.3 (Guarded Memory Pools timeout)
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--- Result: SUCCESS
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============================================================================
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=== Test Sequence 3 (Memory Heaps)
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----------------------------------------------------------------------------
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--- Test Case 3.1 (Allocation and fragmentation)
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 3.2 (Default Heap)
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--- Result: SUCCESS
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============================================================================
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=== Test Sequence 4 (Objects Factory)
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----------------------------------------------------------------------------
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--- Test Case 4.1 (Objects Registry)
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 4.2 (Dynamic Buffers Factory)
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 4.3 (Dynamic Semaphores Factory)
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 4.4 (Dynamic Mailboxes Factory)
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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--- Test Case 4.5 (Dynamic Objects FIFOs Factory)
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--- Result: SUCCESS
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----------------------------------------------------------------------------
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Final result: SUCCESS
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/**
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* @brief Name of the implemented architecture.
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*/
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#define PORT_ARCHITECTURE_NAME "Power Architecture"
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#define PORT_ARCHITECTURE_NAME "Power Architecture e200"
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/**
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* @brief Compiler name and version.
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*/
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#if defined(__GNUC__) || defined(__DOXYGEN__)
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#if (defined(__GNUC__) && !defined(__ghs__)) || defined(__DOXYGEN__)
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#define PORT_COMPILER_NAME "GCC " __VERSION__
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#elif defined(__MWERKS__)
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@ -1,159 +0,0 @@
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/*
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ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_end__ = ORIGIN(ram) + LENGTH(ram);
|
||||
|
||||
ENTRY(_reset_address)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = ORIGIN(flash);
|
||||
.boot0 : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(.boot))
|
||||
} > flash
|
||||
|
||||
.boot1 : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(.handlers))
|
||||
KEEP(*(.crt0))
|
||||
/* The vectors table requires a 2kB alignment.*/
|
||||
. = ALIGN(0x800);
|
||||
KEEP(*(.vectors))
|
||||
/* The IVPR register requires a 4kB alignment.*/
|
||||
. = ALIGN(0x1000);
|
||||
__ivpr_base__ = .;
|
||||
KEEP(*(.ivors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text_vle : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text_vle)
|
||||
*(.text_vle.*)
|
||||
*(.gnu.linkonce.t_vle.*)
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.gnu.linkonce.t.*)
|
||||
} > flash
|
||||
|
||||
.rodata : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.rodata1)
|
||||
} > flash
|
||||
|
||||
.sdata2 : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
__sdata2_start__ = . + 0x8000;
|
||||
*(.sdata2)
|
||||
*(.sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.sbss2)
|
||||
*(.sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.romdata : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
__romdata_start__ = .;
|
||||
} > flash
|
||||
|
||||
.stacks : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__irq_stack_base__ = .;
|
||||
. += __irq_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__irq_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data : AT(__romdata_start__)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__data_start__ = .;
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
__sdata_start__ = . + 0x8000;
|
||||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
*(.gnu.linkonce.s.*)
|
||||
__data_end__ = .;
|
||||
} > ram
|
||||
|
||||
.sbss :
|
||||
{
|
||||
__bss_start__ = .;
|
||||
*(.sbss)
|
||||
*(.sbss.*)
|
||||
*(.gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
} > ram
|
||||
|
||||
.bss :
|
||||
{
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
__bss_end__ = .;
|
||||
} > ram
|
||||
|
||||
__heap_base__ = __bss_end__;
|
||||
__heap_end__ = __ram_end__;
|
||||
}
|
|
@ -1,156 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_end__ = ORIGIN(ram) + LENGTH(ram);
|
||||
|
||||
ENTRY(_reset_address)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = ORIGIN(flash);
|
||||
.boot0 : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
__ivpr_base__ = .;
|
||||
KEEP(*(.boot))
|
||||
} > flash
|
||||
|
||||
.boot1 : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(.handlers))
|
||||
KEEP(*(.crt0))
|
||||
/* The vectors table requires a 2kB alignment.*/
|
||||
. = ALIGN(0x800);
|
||||
KEEP(*(.vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text_vle : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text_vle)
|
||||
*(.text_vle.*)
|
||||
*(.gnu.linkonce.t_vle.*)
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.gnu.linkonce.t.*)
|
||||
} > flash
|
||||
|
||||
.rodata : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.rodata1)
|
||||
} > flash
|
||||
|
||||
.sdata2 : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
__sdata2_start__ = . + 0x8000;
|
||||
*(.sdata2)
|
||||
*(.sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.sbss2)
|
||||
*(.sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.romdata : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
__romdata_start__ = .;
|
||||
} > flash
|
||||
|
||||
.stacks : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__irq_stack_base__ = .;
|
||||
. += __irq_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__irq_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data : AT(__romdata_start__)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__data_start__ = .;
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
__sdata_start__ = . + 0x8000;
|
||||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
*(.gnu.linkonce.s.*)
|
||||
__data_end__ = .;
|
||||
} > ram
|
||||
|
||||
.sbss :
|
||||
{
|
||||
__bss_start__ = .;
|
||||
*(.sbss)
|
||||
*(.sbss.*)
|
||||
*(.gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
} > ram
|
||||
|
||||
.bss :
|
||||
{
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
__bss_end__ = .;
|
||||
} > ram
|
||||
|
||||
__heap_base__ = __bss_end__;
|
||||
__heap_end__ = __ram_end__;
|
||||
}
|
|
@ -1,156 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_end__ = ORIGIN(ram) + LENGTH(ram);
|
||||
|
||||
ENTRY(_reset_address)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = ORIGIN(flash);
|
||||
.boot0 : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
__ivpr_base__ = .;
|
||||
KEEP(*(.boot))
|
||||
} > flash
|
||||
|
||||
.boot1 : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(.handlers))
|
||||
KEEP(*(.crt0))
|
||||
/* The vectors table requires a 2kB alignment.*/
|
||||
. = ALIGN(0x800);
|
||||
KEEP(*(.vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text_vle : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text_vle)
|
||||
*(.text_vle.*)
|
||||
*(.gnu.linkonce.t_vle.*)
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.gnu.linkonce.t.*)
|
||||
} > flash
|
||||
|
||||
.rodata : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.rodata1)
|
||||
} > flash
|
||||
|
||||
.sdata2 : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
__sdata2_start__ = . + 0x8000;
|
||||
*(.sdata2)
|
||||
*(.sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.sbss2)
|
||||
*(.sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.romdata : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
__romdata_start__ = .;
|
||||
} > flash
|
||||
|
||||
.stacks : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__irq_stack_base__ = .;
|
||||
. += __irq_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__irq_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data : AT(__romdata_start__)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__data_start__ = .;
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
__sdata_start__ = . + 0x8000;
|
||||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
*(.gnu.linkonce.s.*)
|
||||
__data_end__ = .;
|
||||
} > ram
|
||||
|
||||
.sbss :
|
||||
{
|
||||
__bss_start__ = .;
|
||||
*(.sbss)
|
||||
*(.sbss.*)
|
||||
*(.gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
} > ram
|
||||
|
||||
.bss :
|
||||
{
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
__bss_end__ = .;
|
||||
} > ram
|
||||
|
||||
__heap_base__ = __bss_end__;
|
||||
__heap_end__ = __ram_end__;
|
||||
}
|
|
@ -89,6 +89,7 @@
|
|||
*****************************************************************************
|
||||
|
||||
*** Next ***
|
||||
- NEW: Added GHS compiler support to the Power e200 port.
|
||||
- NEW: Added tool for board files generation from command line.
|
||||
- NEW: Added STM32L496xx/STM32L4A6xx support.
|
||||
- NEW: Added STM32F030x4 support.
|
||||
|
|
|
@ -168,6 +168,63 @@ systime_t test_wait_tick(void) {
|
|||
<value><![CDATA[#include "ch.h"]]></value>
|
||||
</shared_code>
|
||||
<cases>
|
||||
<case>
|
||||
<brief>
|
||||
<value>Port Info.</value>
|
||||
</brief>
|
||||
<description>
|
||||
<value>Port-related info are reported.</value>
|
||||
</description>
|
||||
<condition>
|
||||
<value />
|
||||
</condition>
|
||||
<various_code>
|
||||
<setup_code>
|
||||
<value />
|
||||
</setup_code>
|
||||
<teardown_code>
|
||||
<value />
|
||||
</teardown_code>
|
||||
<local_variables>
|
||||
<value />
|
||||
</local_variables>
|
||||
</various_code>
|
||||
<steps>
|
||||
<step>
|
||||
<description>
|
||||
<value>Prints the version string.</value>
|
||||
</description>
|
||||
<tags>
|
||||
<value />
|
||||
</tags>
|
||||
<code>
|
||||
<value><![CDATA[#if defined(PORT_ARCHITECTURE_NAME)
|
||||
test_print("--- Architecture: ");
|
||||
test_println(PORT_ARCHITECTURE_NAME);
|
||||
#endif
|
||||
#if defined(PORT_COMPILER_NAME)
|
||||
test_print("--- Compiler: ");
|
||||
test_println(PORT_COMPILER_NAME);
|
||||
#endif
|
||||
#if defined(PORT_NATURAL_ALIGN)
|
||||
test_print("--- Natural alignment: ");
|
||||
test_printn(PORT_NATURAL_ALIGN);
|
||||
test_println("");
|
||||
#endif
|
||||
#if defined(PORT_STACK_ALIGN)
|
||||
test_print("--- Stack alignment: ");
|
||||
test_printn(PORT_STACK_ALIGN);
|
||||
test_println("");
|
||||
#endif
|
||||
#if defined(PORT_WORKING_AREA_ALIGN)
|
||||
test_print("--- Working area alignment: ");
|
||||
test_printn(PORT_WORKING_AREA_ALIGN);
|
||||
test_println("");
|
||||
#endif]]></value>
|
||||
</code>
|
||||
</step>
|
||||
</steps>
|
||||
</case>
|
||||
<case>
|
||||
<brief>
|
||||
<value>Kernel Info.</value>
|
||||
|
|
|
@ -32,6 +32,7 @@
|
|||
* <h2>Test Cases</h2>
|
||||
* - @subpage rt_test_001_001
|
||||
* - @subpage rt_test_001_002
|
||||
* - @subpage rt_test_001_003
|
||||
* .
|
||||
*/
|
||||
|
||||
|
@ -46,10 +47,10 @@
|
|||
****************************************************************************/
|
||||
|
||||
/**
|
||||
* @page rt_test_001_001 [1.1] Kernel Info
|
||||
* @page rt_test_001_001 [1.1] Port Info
|
||||
*
|
||||
* <h2>Description</h2>
|
||||
* The version numbers are reported.
|
||||
* Port-related info are reported.
|
||||
*
|
||||
* <h2>Test Steps</h2>
|
||||
* - [1.1.1] Prints the version string.
|
||||
|
@ -60,6 +61,55 @@ static void rt_test_001_001_execute(void) {
|
|||
|
||||
/* [1.1.1] Prints the version string.*/
|
||||
test_set_step(1);
|
||||
{
|
||||
#if defined(PORT_ARCHITECTURE_NAME)
|
||||
test_print("--- Architecture: ");
|
||||
test_println(PORT_ARCHITECTURE_NAME);
|
||||
#endif
|
||||
#if defined(PORT_COMPILER_NAME)
|
||||
test_print("--- Compiler: ");
|
||||
test_println(PORT_COMPILER_NAME);
|
||||
#endif
|
||||
#if defined(PORT_NATURAL_ALIGN)
|
||||
test_print("--- Natural alignment: ");
|
||||
test_printn(PORT_NATURAL_ALIGN);
|
||||
test_println("");
|
||||
#endif
|
||||
#if defined(PORT_STACK_ALIGN)
|
||||
test_print("--- Stack alignment: ");
|
||||
test_printn(PORT_STACK_ALIGN);
|
||||
test_println("");
|
||||
#endif
|
||||
#if defined(PORT_WORKING_AREA_ALIGN)
|
||||
test_print("--- Working area alignment: ");
|
||||
test_printn(PORT_WORKING_AREA_ALIGN);
|
||||
test_println("");
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
static const testcase_t rt_test_001_001 = {
|
||||
"Port Info",
|
||||
NULL,
|
||||
NULL,
|
||||
rt_test_001_001_execute
|
||||
};
|
||||
|
||||
/**
|
||||
* @page rt_test_001_002 [1.2] Kernel Info
|
||||
*
|
||||
* <h2>Description</h2>
|
||||
* The version numbers are reported.
|
||||
*
|
||||
* <h2>Test Steps</h2>
|
||||
* - [1.2.1] Prints the version string.
|
||||
* .
|
||||
*/
|
||||
|
||||
static void rt_test_001_002_execute(void) {
|
||||
|
||||
/* [1.2.1] Prints the version string.*/
|
||||
test_set_step(1);
|
||||
{
|
||||
test_println("--- Product: ChibiOS/RT");
|
||||
test_print("--- Stable Flag: ");
|
||||
|
@ -79,27 +129,27 @@ static void rt_test_001_001_execute(void) {
|
|||
}
|
||||
}
|
||||
|
||||
static const testcase_t rt_test_001_001 = {
|
||||
static const testcase_t rt_test_001_002 = {
|
||||
"Kernel Info",
|
||||
NULL,
|
||||
NULL,
|
||||
rt_test_001_001_execute
|
||||
rt_test_001_002_execute
|
||||
};
|
||||
|
||||
/**
|
||||
* @page rt_test_001_002 [1.2] Kernel Settings
|
||||
* @page rt_test_001_003 [1.3] Kernel Settings
|
||||
*
|
||||
* <h2>Description</h2>
|
||||
* The static kernel settings are reported.
|
||||
*
|
||||
* <h2>Test Steps</h2>
|
||||
* - [1.2.1] Prints the configuration options settings.
|
||||
* - [1.3.1] Prints the configuration options settings.
|
||||
* .
|
||||
*/
|
||||
|
||||
static void rt_test_001_002_execute(void) {
|
||||
static void rt_test_001_003_execute(void) {
|
||||
|
||||
/* [1.2.1] Prints the configuration options settings.*/
|
||||
/* [1.3.1] Prints the configuration options settings.*/
|
||||
test_set_step(1);
|
||||
{
|
||||
test_print("--- CH_CFG_ST_RESOLUTION: ");
|
||||
|
@ -207,11 +257,11 @@ static void rt_test_001_002_execute(void) {
|
|||
}
|
||||
}
|
||||
|
||||
static const testcase_t rt_test_001_002 = {
|
||||
static const testcase_t rt_test_001_003 = {
|
||||
"Kernel Settings",
|
||||
NULL,
|
||||
NULL,
|
||||
rt_test_001_002_execute
|
||||
rt_test_001_003_execute
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
|
@ -224,6 +274,7 @@ static const testcase_t rt_test_001_002 = {
|
|||
const testcase_t * const rt_test_sequence_001_array[] = {
|
||||
&rt_test_001_001,
|
||||
&rt_test_001_002,
|
||||
&rt_test_001_003,
|
||||
NULL
|
||||
};
|
||||
|
||||
|
|
Loading…
Reference in New Issue