andreika-git
/
ChibiOS
mirror of https://github.com/andreika-git/ChibiOS.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Added debug asserts. 

Fixed slow clock select.
Added mainf measurement
Tested XT main clock.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10438 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
isiora 2017-08-16 21:37:20 +00:00
parent be8de9f456
commit 2de41265e3
2 changed files with 17 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
os/hal/ports/SAMA/SAMA5D2x/hal_lld.c
View File

@ -75,7 +75,7 @@ void hal_lld_init(void) {
*/ */
void sama_clock_init(void) { void sama_clock_init(void) {
#if !SAMA_NO_INIT #if !SAMA_NO_INIT
uint32_t mor, pllar, mckr; uint32_t mor, pllar, mckr, mainf;
/* Disabling PMC write protection. */ /* Disabling PMC write protection. */
pmcDisableWP(); pmcDisableWP();
@ -107,7 +107,7 @@ void sama_clock_init(void) {
while (!(PMC->PMC_SR & PMC_SR_MCKRDY)) while (!(PMC->PMC_SR & PMC_SR_MCKRDY))
; /* Waits until Master Clock is stable.*/ ; /* Waits until Master Clock is stable.*/
/* Switching Main Frequency Source to MOSCRC. */ /* Counter Clock Source to MOSCRC. */
PMC->CKGR_MCFR &= ~CKGR_MCFR_CCSS; PMC->CKGR_MCFR &= ~CKGR_MCFR_CCSS;
} }
@ -116,12 +116,23 @@ void sama_clock_init(void) {
* Main oscillator configuration block. * Main oscillator configuration block.
*/ */
{ {
/* Setting Slow clock source. */
SCKC->SCKC_CR = SAMA_OSC_SEL;
while ((SAMA_OSC_SEL && !(PMC->PMC_SR & PMC_SR_OSCSELS)) ||
(!SAMA_OSC_SEL && (PMC->PMC_SR & PMC_SR_OSCSELS)))
; /* Waits until MOSCxxS switch is done.*/
mor = PMC->CKGR_MOR | CKGR_MOR_KEY_PASSWD; mor = PMC->CKGR_MOR | CKGR_MOR_KEY_PASSWD;
#if SAMA_MOSCXT_ENABLED #if SAMA_MOSCXT_ENABLED
mor |= CKGR_MOR_MOSCXTEN; mor |= CKGR_MOR_MOSCXTEN;
PMC->CKGR_MOR = mor; PMC->CKGR_MOR = mor;
while (!(PMC->PMC_SR & PMC_SR_MOSCXTS)) while (!(PMC->PMC_SR & PMC_SR_MOSCXTS))
; /* Waits until MOSCXT is stable.*/ ; /* Waits until MOSCXT is stable.*/
/* Counter Clock Source to MOSCXT. */
PMC->CKGR_MCFR |= CKGR_MCFR_CCSS;
PMC->CKGR_MCFR |= CKGR_MCFR_RCMEAS;
while (!(PMC->CKGR_MCFR & CKGR_MCFR_MAINFRDY))
;
mainf = CKGR_MCFR_MAINF(PMC->CKGR_MCFR);
#else #else
mor &= ~CKGR_MOR_MOSCXTEN; mor &= ~CKGR_MOR_MOSCXTEN;
PMC->CKGR_MOR = mor; PMC->CKGR_MOR = mor;
@ -176,8 +187,6 @@ void sama_clock_init(void) {
while (!(PMC->PMC_SR & PMC_SR_MCKRDY)) while (!(PMC->PMC_SR & PMC_SR_MCKRDY))
; /* Waits until MCK is stable. */ ; /* Waits until MCK is stable. */
/* Setting Slow clock source. */
SCKC->SCKC_CR = SAMA_OSC_SEL;
} }
/* Enabling write protection. */ /* Enabling write protection. */

6
os/hal/ports/SAMA/SAMA5D2x/hal_st_lld.c
View File

@ -61,11 +61,13 @@
* @isr * @isr
*/ */
OSAL_IRQ_HANDLER(PIT_Handler) { OSAL_IRQ_HANDLER(PIT_Handler) {
uint32_t ivr;
OSAL_IRQ_PROLOGUE(); OSAL_IRQ_PROLOGUE();
osalSysLockFromISR(); osalSysLockFromISR();
(void)PIT->PIT_PIVR; /* acknowledge PIT interrupt */ ivr = PIT->PIT_PIVR; /* acknowledge PIT interrupt */
osalDbgAssert((ivr & PIT_PIVR_PICNT_Msk) == (1 << PIT_PIVR_PICNT_Pos),
"check for lost tick");
osalOsTimerHandlerI(); osalOsTimerHandlerI();
osalSysUnlockFromISR(); osalSysUnlockFromISR();
aicAckInt(); aicAckInt();