Added debug asserts.
Fixed slow clock select. Added mainf measurement Tested XT main clock. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10438 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -75,7 +75,7 @@ void hal_lld_init(void) {
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*/
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void sama_clock_init(void) {
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#if !SAMA_NO_INIT
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uint32_t mor, pllar, mckr;
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uint32_t mor, pllar, mckr, mainf;
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/* Disabling PMC write protection. */
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pmcDisableWP();
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@ -107,7 +107,7 @@ void sama_clock_init(void) {
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while (!(PMC->PMC_SR & PMC_SR_MCKRDY))
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; /* Waits until Master Clock is stable.*/
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/* Switching Main Frequency Source to MOSCRC. */
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/* Counter Clock Source to MOSCRC. */
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PMC->CKGR_MCFR &= ~CKGR_MCFR_CCSS;
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}
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@ -116,12 +116,23 @@ void sama_clock_init(void) {
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* Main oscillator configuration block.
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*/
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{
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/* Setting Slow clock source. */
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SCKC->SCKC_CR = SAMA_OSC_SEL;
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while ((SAMA_OSC_SEL && !(PMC->PMC_SR & PMC_SR_OSCSELS)) ||
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(!SAMA_OSC_SEL && (PMC->PMC_SR & PMC_SR_OSCSELS)))
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; /* Waits until MOSCxxS switch is done.*/
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mor = PMC->CKGR_MOR | CKGR_MOR_KEY_PASSWD;
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#if SAMA_MOSCXT_ENABLED
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mor |= CKGR_MOR_MOSCXTEN;
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PMC->CKGR_MOR = mor;
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while (!(PMC->PMC_SR & PMC_SR_MOSCXTS))
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; /* Waits until MOSCXT is stable.*/
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/* Counter Clock Source to MOSCXT. */
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PMC->CKGR_MCFR |= CKGR_MCFR_CCSS;
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PMC->CKGR_MCFR |= CKGR_MCFR_RCMEAS;
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while (!(PMC->CKGR_MCFR & CKGR_MCFR_MAINFRDY))
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;
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mainf = CKGR_MCFR_MAINF(PMC->CKGR_MCFR);
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#else
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mor &= ~CKGR_MOR_MOSCXTEN;
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PMC->CKGR_MOR = mor;
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@ -176,8 +187,6 @@ void sama_clock_init(void) {
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while (!(PMC->PMC_SR & PMC_SR_MCKRDY))
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; /* Waits until MCK is stable. */
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/* Setting Slow clock source. */
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SCKC->SCKC_CR = SAMA_OSC_SEL;
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}
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/* Enabling write protection. */
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@ -61,11 +61,13 @@
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* @isr
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*/
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OSAL_IRQ_HANDLER(PIT_Handler) {
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uint32_t ivr;
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OSAL_IRQ_PROLOGUE();
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osalSysLockFromISR();
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(void)PIT->PIT_PIVR; /* acknowledge PIT interrupt */
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ivr = PIT->PIT_PIVR; /* acknowledge PIT interrupt */
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osalDbgAssert((ivr & PIT_PIVR_PICNT_Msk) == (1 << PIT_PIVR_PICNT_Pos),
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"check for lost tick");
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osalOsTimerHandlerI();
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osalSysUnlockFromISR();
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aicAckInt();
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