Added new bitmask and updated platform names in STM32F0xx/hal_lld.h
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/stable_16.1.x@9994 35acf78f-673a-0410-8e92-d51de3d6d3f4
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Rocco Marco Guglielmi
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0293e7adc2
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2f2a976475
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@ -28,10 +28,11 @@
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* One of the following macros must also be defined:
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* - STM32F030x6, STM32F030x8, STM32F030xC, STM32F070x6,
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* STM32F070xB for Value Line devices.
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* - STM32F031x6, STM32F038xx, STM32F042x6, STM32F048xx
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* for Low Density devices.
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* - STM32F051x8, STM32F058xx, STM32F071xB, STM32F072xB,
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* STM32F078xx for Medium Density devices.
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* - STM32F031x6, STM32F051x8, STM32F071xB, STM32F091xC
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* for Access Line devices.
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* - STM32F042x6, STM32F072xB for USB Line devices.
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* - STM32F038xx, STM32F048xx, STM32F058xx, STM32F078xx,
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* STM32F098xx for Low Voltage Line devices.
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* .
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*
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* @addtogroup HAL
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@ -54,34 +55,7 @@
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* @name Platform identification macros
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* @{
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*/
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#if defined(STM32F051x8) || defined(__DOXYGEN__)
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#define PLATFORM_NAME "STM32F051x8 Entry Level Medium Density devices"
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#elif defined(STM32F058xx)
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#define PLATFORM_NAME "STM32F058xx Entry Level Medium Density devices"
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#elif defined(STM32F071xB)
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#define PLATFORM_NAME "STM32F071xB Entry Level Medium Density devices"
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#elif defined(STM32F072xB)
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#define PLATFORM_NAME "STM32F072xB Entry Level Medium Density devices"
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#elif defined(STM32F078xx)
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#define PLATFORM_NAME "STM32F078xx Entry Level Medium Density devices"
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#elif defined(STM32F031x6)
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#define PLATFORM_NAME "STM32F031x6 Entry Level Low Density devices"
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#elif defined(STM32F038xx)
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#define PLATFORM_NAME "STM32F038xx Entry Level Low Density devices"
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#elif defined(STM32F042x6)
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#define PLATFORM_NAME "STM32F042x6 Entry Level Low Density devices"
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#elif defined(STM32F048xx)
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#define PLATFORM_NAME "STM32F048xx Entry Level Low Density devices"
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#elif defined(STM32F030x6)
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#if defined(STM32F030x6) || defined(__DOXYGEN__)
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#define PLATFORM_NAME "STM32F030x6 Entry Level Value Line devices"
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#elif defined(STM32F030x8)
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@ -96,14 +70,41 @@
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#elif defined(STM32F070xB)
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#define PLATFORM_NAME "STM32F070xB Entry Level Value Line devices"
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#elif defined(STM32F031x6)
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#define PLATFORM_NAME "STM32F031x6 Entry Level Access Line devices"
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#elif defined(STM32F051x8)
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#define PLATFORM_NAME "STM32F051x8 Entry Level Access Line devices"
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#elif defined(STM32F071xB)
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#define PLATFORM_NAME "STM32F071xB Entry Level Access Line devices"
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#elif defined(STM32F091xC)
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#define PLATFORM_NAME "STM32F091xC Entry Level Medium Density devices"
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#define PLATFORM_NAME "STM32F091xC Entry Level Access Line devices"
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#elif defined(STM32F042x6)
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#define PLATFORM_NAME "STM32F042x6 Entry Level USB Line devices"
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#elif defined(STM32F072xB)
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#define PLATFORM_NAME "STM32F072xB Entry Level USB Line devices"
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#elif defined(STM32F038xx)
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#define PLATFORM_NAME "STM32F038xx Entry Level Low Voltage Line devices"
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#elif defined(STM32F048xx)
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#define PLATFORM_NAME "STM32F048xx Entry Level Low Voltage Line devices"
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#elif defined(STM32F058xx)
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#define PLATFORM_NAME "STM32F058xx Entry Level Low Voltage Line devices"
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#elif defined(STM32F078xx)
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#define PLATFORM_NAME "STM32F078xx Entry Level Low Voltage Line devices"
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#elif defined(STM32F098xx)
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#define PLATFORM_NAME "STM32F098xx Entry Level Medium Density devices"
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#define PLATFORM_NAME "STM32F098xx Entry Level Low Voltage Line devices"
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#else
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#error "STM32F0xx device not specified"
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#error "STM32F0xx device unsupported or not specified"
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#endif
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/** @} */
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@ -242,15 +243,25 @@
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/** @} */
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/**
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* @name RCC_BDCR register bits definitions
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* @name RCC_CFGR2 register bits definitions
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* @{
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*/
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#define STM32_RTCSEL_MASK (3 << 8) /**< RTC clock source mask. */
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#define STM32_RTCSEL_NOCLOCK (0 << 8) /**< No clock. */
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#define STM32_RTCSEL_LSE (1 << 8) /**< LSE used as RTC clock. */
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#define STM32_RTCSEL_LSI (2 << 8) /**< LSI used as RTC clock. */
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#define STM32_RTCSEL_HSEDIV (3 << 8) /**< HSE divided by 32 used as
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RTC clock. */
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#define STM32_PRE_DIV1 (0 << 0) /**< PLLSRC divided by 1. */
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#define STM32_PRE_DIV2 (1 << 0) /**< SYSCLK divided by 2. */
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#define STM32_PRE_DIV3 (2 << 0) /**< SYSCLK divided by 3. */
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#define STM32_PRE_DIV4 (3 << 0) /**< PLLSRC divided by 4. */
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#define STM32_PRE_DIV5 (4 << 0) /**< SYSCLK divided by 5. */
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#define STM32_PRE_DIV6 (5 << 0) /**< SYSCLK divided by 6. */
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#define STM32_PRE_DIV7 (6 << 0) /**< PLLSRC divided by 7. */
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#define STM32_PRE_DIV8 (7 << 0) /**< SYSCLK divided by 8. */
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#define STM32_PRE_DIV9 (8 << 0) /**< SYSCLK divided by 9. */
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#define STM32_PRE_DIV10 (9 << 0) /**< PLLSRC divided by 10. */
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#define STM32_PRE_DIV11 (10 << 0) /**< SYSCLK divided by 11. */
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#define STM32_PRE_DIV12 (11 << 0) /**< SYSCLK divided by 12. */
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#define STM32_PRE_DIV13 (12 << 0) /**< PLLSRC divided by 13. */
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#define STM32_PRE_DIV14 (13 << 0) /**< SYSCLK divided by 14. */
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#define STM32_PRE_DIV15 (14 << 0) /**< SYSCLK divided by 15. */
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#define STM32_PRE_DIV16 (15 << 0) /**< PLLSRC divided by 16. */
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/** @} */
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/**
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@ -274,6 +285,18 @@
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#define STM32_USBSW_PCLK (1 << 7) /**< USB clock is PCLK. */
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/** @} */
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/**
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* @name RCC_BDCR register bits definitions
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* @{
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*/
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#define STM32_RTCSEL_MASK (3 << 8) /**< RTC clock source mask. */
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#define STM32_RTCSEL_NOCLOCK (0 << 8) /**< No clock. */
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#define STM32_RTCSEL_LSE (1 << 8) /**< LSE used as RTC clock. */
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#define STM32_RTCSEL_LSI (2 << 8) /**< LSI used as RTC clock. */
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#define STM32_RTCSEL_HSEDIV (3 << 8) /**< HSE divided by 32 used as
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RTC clock. */
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/** @} */
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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