Added support for UART9 and USART10 on STM32H7.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@15580 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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3020c7eae7
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@ -128,6 +128,16 @@ SerialDriver SD7;
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SerialDriver SD8;
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SerialDriver SD8;
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#endif
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#endif
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/** @brief UART9 serial driver identifier.*/
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#if STM32_SERIAL_USE_UART9 || defined(__DOXYGEN__)
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SerialDriver SD9;
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#endif
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/** @brief USART10 serial driver identifier.*/
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#if STM32_SERIAL_USE_USART10 || defined(__DOXYGEN__)
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SerialDriver SD10;
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#endif
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/** @brief LPUART1 serial driver identifier.*/
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/** @brief LPUART1 serial driver identifier.*/
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#if STM32_SERIAL_USE_LPUART1 || defined(__DOXYGEN__)
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#if STM32_SERIAL_USE_LPUART1 || defined(__DOXYGEN__)
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SerialDriver LPSD1;
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SerialDriver LPSD1;
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@ -210,6 +220,22 @@ static uint8_t sd_in_buf8[STM32_SERIAL_UART8_IN_BUF_SIZE];
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static uint8_t sd_out_buf8[STM32_SERIAL_UART8_OUT_BUF_SIZE];
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static uint8_t sd_out_buf8[STM32_SERIAL_UART8_OUT_BUF_SIZE];
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#endif
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#endif
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#if STM32_SERIAL_USE_UART9 || defined(__DOXYGEN__)
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/** @brief Input buffer for SD9.*/
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static uint8_t sd_in_buf9[STM32_SERIAL_UART9_IN_BUF_SIZE];
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/** @brief Output buffer for SD9.*/
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static uint8_t sd_out_buf9[STM32_SERIAL_UART9_OUT_BUF_SIZE];
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#endif
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#if STM32_SERIAL_USE_USART10 || defined(__DOXYGEN__)
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/** @brief Input buffer for SD10.*/
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static uint8_t sd_in_buf10[STM32_SERIAL_USART10_IN_BUF_SIZE];
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/** @brief Output buffer for SD10.*/
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static uint8_t sd_out_buf10[STM32_SERIAL_USART10_OUT_BUF_SIZE];
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#endif
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#if STM32_SERIAL_USE_LPUART1 || defined(__DOXYGEN__)
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#if STM32_SERIAL_USE_LPUART1 || defined(__DOXYGEN__)
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/** @brief Input buffer for LPSD1.*/
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/** @brief Input buffer for LPSD1.*/
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static uint8_t sd_in_buflp1[STM32_SERIAL_LPUART1_IN_BUF_SIZE];
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static uint8_t sd_in_buflp1[STM32_SERIAL_LPUART1_IN_BUF_SIZE];
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@ -387,6 +413,22 @@ static void notify8(io_queue_t *qp) {
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}
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}
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#endif
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#endif
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#if STM32_SERIAL_USE_UART9 || defined(__DOXYGEN__)
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static void notify9(io_queue_t *qp) {
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(void)qp;
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UART9->CR1 |= USART_CR1_TXEIE | USART_CR1_TCIE;
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}
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#endif
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#if STM32_SERIAL_USE_USART10 || defined(__DOXYGEN__)
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static void notify10(io_queue_t *qp) {
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(void)qp;
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USART10->CR1 |= USART_CR1_TXEIE | USART_CR1_TCIE;
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}
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#endif
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#if STM32_SERIAL_USE_LPUART1 || defined(__DOXYGEN__)
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#if STM32_SERIAL_USE_LPUART1 || defined(__DOXYGEN__)
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static void notifylp1(io_queue_t *qp) {
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static void notifylp1(io_queue_t *qp) {
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@ -567,6 +609,48 @@ OSAL_IRQ_HANDLER(STM32_UART8_HANDLER) {
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#endif
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#endif
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#endif
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#endif
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#if STM32_SERIAL_USE_UART9 || defined(__DOXYGEN__)
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#if !defined(STM32_UART9_SUPPRESS_ISR)
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#if !defined(STM32_UART9_HANDLER)
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#error "STM32_UART9_HANDLER not defined"
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#endif
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/**
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* @brief UART9 interrupt handler.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(STM32_UART9_HANDLER) {
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OSAL_IRQ_PROLOGUE();
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sd_lld_serve_interrupt(&SD9);
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OSAL_IRQ_EPILOGUE();
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}
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#endif
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#endif
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#if STM32_SERIAL_USE_USART10 || defined(__DOXYGEN__)
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#if !defined(STM32_USART10_SUPPRESS_ISR)
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#if !defined(STM32_USART10_HANDLER)
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#error "STM32_USART10_HANDLER not defined"
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#endif
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/**
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* @brief USART10 interrupt handler.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(STM32_USART10_HANDLER) {
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OSAL_IRQ_PROLOGUE();
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sd_lld_serve_interrupt(&SD10);
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OSAL_IRQ_EPILOGUE();
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}
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#endif
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#endif
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#if STM32_SERIAL_USE_LPUART1 || defined(__DOXYGEN__)
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#if STM32_SERIAL_USE_LPUART1 || defined(__DOXYGEN__)
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#if !defined(STM32_LPUART1_SUPPRESS_ISR)
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#if !defined(STM32_LPUART1_SUPPRESS_ISR)
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#if !defined(STM32_LPUART1_HANDLER)
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#if !defined(STM32_LPUART1_HANDLER)
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@ -687,6 +771,28 @@ void sd_lld_init(void) {
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#endif
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#endif
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#endif
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#endif
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#if STM32_SERIAL_USE_UART9
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sdObjectInit(&SD9);
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iqObjectInit(&SD9.iqueue, sd_in_buf9, sizeof sd_in_buf9, NULL, &SD8);
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oqObjectInit(&SD9.oqueue, sd_out_buf9, sizeof sd_out_buf9, notify9, &SD8);
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SD8.usart = UART9;
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SD8.clock = STM32_UART9CLK;
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#if !defined(STM32_UART9_SUPPRESS_ISR) && defined(STM32_UART9_NUMBER)
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nvicEnableVector(STM32_UART9_NUMBER, STM32_SERIAL_UART9_PRIORITY);
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#endif
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#endif
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#if STM32_SERIAL_USE_USART10
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sdObjectInit(&SD10);
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iqObjectInit(&SD10.iqueue, sd_in_buf10, sizeof sd_in_buf10, NULL, &SD10);
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oqObjectInit(&SD10.oqueue, sd_out_buf10, sizeof sd_out_buf10, notify10, &SD10);
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SD10.usart = USART10;
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SD10.clock = STM32_USART10CLK;
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#if !defined(STM32_USART10_SUPPRESS_ISR) && defined(STM32_USART10_NUMBER)
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nvicEnableVector(STM32_USART10_NUMBER, STM32_SERIAL_USART10_PRIORITY);
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#endif
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#endif
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#if STM32_SERIAL_USE_LPUART1
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#if STM32_SERIAL_USE_LPUART1
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sdObjectInit(&LPSD1);
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sdObjectInit(&LPSD1);
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iqObjectInit(&LPSD1.iqueue, sd_in_buflp1, sizeof sd_in_buflp1, NULL, &LPSD1);
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iqObjectInit(&LPSD1.iqueue, sd_in_buflp1, sizeof sd_in_buflp1, NULL, &LPSD1);
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@ -755,6 +861,16 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
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rccEnableUART8(true);
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rccEnableUART8(true);
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}
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}
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#endif
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#endif
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#if STM32_SERIAL_USE_UART9
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if (&SD9 == sdp) {
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rccEnableUART9(true);
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}
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#endif
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#if STM32_SERIAL_USE_USART10
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if (&SD10 == sdp) {
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rccEnableUSART10(true);
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}
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#endif
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#if STM32_SERIAL_USE_LPUART1
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#if STM32_SERIAL_USE_LPUART1
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if (&LPSD1 == sdp) {
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if (&LPSD1 == sdp) {
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rccEnableLPUART1(true);
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rccEnableLPUART1(true);
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@ -827,6 +943,18 @@ void sd_lld_stop(SerialDriver *sdp) {
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return;
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return;
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}
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}
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#endif
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#endif
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#if STM32_SERIAL_USE_UART9
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if (&SD9 == sdp) {
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rccDisableUART9();
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return;
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}
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#endif
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#if STM32_SERIAL_USE_USART10
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if (&SD10 == sdp) {
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rccDisableUSART10();
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return;
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}
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#endif
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#if STM32_SERIAL_USE_LPUART1
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#if STM32_SERIAL_USE_LPUART1
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if (&LPSD1 == sdp) {
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if (&LPSD1 == sdp) {
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rccDisableLPUART1();
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rccDisableLPUART1();
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@ -122,6 +122,24 @@
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#define STM32_SERIAL_USE_UART8 FALSE
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#define STM32_SERIAL_USE_UART8 FALSE
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#endif
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#endif
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/**
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* @brief UART9 driver enable switch.
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* @details If set to @p TRUE the support for UART9 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(STM32_SERIAL_USE_UART9) || defined(__DOXYGEN__)
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#define STM32_SERIAL_USE_UART9 FALSE
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#endif
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/**
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* @brief USART10 driver enable switch.
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* @details If set to @p TRUE the support for USART10 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(STM32_SERIAL_USE_USART10) || defined(__DOXYGEN__)
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#define STM32_SERIAL_USE_USART10 FALSE
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#endif
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/**
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/**
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* @brief LPUART1 driver enable switch.
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* @brief LPUART1 driver enable switch.
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* @details If set to @p TRUE the support for LPUART is included.
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* @details If set to @p TRUE the support for LPUART is included.
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@ -187,6 +205,20 @@
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#define STM32_SERIAL_UART8_PRIORITY 12
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#define STM32_SERIAL_UART8_PRIORITY 12
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#endif
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#endif
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/**
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* @brief UART9 interrupt priority level setting.
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*/
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#if !defined(STM32_SERIAL_UART9_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_SERIAL_UART9_PRIORITY 12
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#endif
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/**
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* @brief USART10 interrupt priority level setting.
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*/
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#if !defined(STM32_SERIAL_USART10_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_SERIAL_USART10_PRIORITY 12
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#endif
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/**
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/**
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* @brief LPUART1 interrupt priority level setting.
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* @brief LPUART1 interrupt priority level setting.
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*/
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*/
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@ -306,6 +338,34 @@
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#define STM32_SERIAL_UART8_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
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#define STM32_SERIAL_UART8_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
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#endif
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#endif
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/**
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* @brief Input buffer size for UART9.
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*/
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#if !defined(STM32_SERIAL_UART9_IN_BUF_SIZE) || defined(__DOXYGEN__)
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#define STM32_SERIAL_UART9_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
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#endif
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/**
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* @brief Output buffer size for UART9.
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*/
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#if !defined(STM32_SERIAL_UART9_OUT_BUF_SIZE) || defined(__DOXYGEN__)
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#define STM32_SERIAL_UART9_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
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#endif
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/**
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* @brief Input buffer size for USART10.
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*/
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#if !defined(STM32_SERIAL_USART10_IN_BUF_SIZE) || defined(__DOXYGEN__)
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#define STM32_SERIAL_USART10_IN_BUF_SIZE SERIAL_BUFFERS_SIZE
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#endif
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/**
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* @brief Output buffer size for USART10.
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*/
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#if !defined(STM32_SERIAL_USART10_OUT_BUF_SIZE) || defined(__DOXYGEN__)
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#define STM32_SERIAL_USART10_OUT_BUF_SIZE SERIAL_BUFFERS_SIZE
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#endif
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/**
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/**
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* @brief Input buffer size for LPUART1.
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* @brief Input buffer size for LPUART1.
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*/
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*/
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#error "UART8 not present in the selected device"
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#error "UART8 not present in the selected device"
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#endif
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#endif
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#if STM32_SERIAL_USE_UART9 && !STM32_HAS_UART9
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#error "UART9 not present in the selected device"
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#endif
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#if STM32_SERIAL_USE_USART10 && !STM32_HAS_USART10
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#error "USART10 not present in the selected device"
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#endif
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#if STM32_SERIAL_USE_LPUART1 && !STM32_HAS_LPUART1
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#if STM32_SERIAL_USE_LPUART1 && !STM32_HAS_LPUART1
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#error "LPUART1 not present in the selected device"
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#error "LPUART1 not present in the selected device"
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#endif
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#endif
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#if !STM32_SERIAL_USE_USART1 && !STM32_SERIAL_USE_USART2 && \
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#if !STM32_SERIAL_USE_USART1 && !STM32_SERIAL_USE_USART2 && \
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!STM32_SERIAL_USE_USART3 && !STM32_SERIAL_USE_UART4 && \
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!STM32_SERIAL_USE_USART3 && !STM32_SERIAL_USE_UART4 && \
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!STM32_SERIAL_USE_UART5 && !STM32_SERIAL_USE_USART6 && \
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!STM32_SERIAL_USE_UART5 && !STM32_SERIAL_USE_USART6 && \
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!STM32_SERIAL_USE_UART7 && !STM32_SERIAL_USE_UART8 && \
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!STM32_SERIAL_USE_UART7 && !STM32_SERIAL_USE_UART8 && \
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!STM32_SERIAL_USE_UART9 && !STM32_SERIAL_USE_USART10 && \
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!STM32_SERIAL_USE_LPUART1
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!STM32_SERIAL_USE_LPUART1
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#error "SERIAL driver activated but no USART/UART peripheral assigned"
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#error "SERIAL driver activated but no USART/UART peripheral assigned"
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#endif
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#endif
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#error "Invalid IRQ priority assigned to UART8"
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#error "Invalid IRQ priority assigned to UART8"
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#endif
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#endif
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#if !defined(STM32_UART9_SUPPRESS_ISR) && \
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STM32_SERIAL_USE_UART9 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_UART9_PRIORITY)
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#error "Invalid IRQ priority assigned to UART9"
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#endif
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#if !defined(STM32_USART10_SUPPRESS_ISR) && \
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STM32_SERIAL_USE_USART10 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART10_PRIORITY)
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#error "Invalid IRQ priority assigned to USART10"
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#endif
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#if !defined(STM32_LPUART1_SUPPRESS_ISR) && \
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#if !defined(STM32_LPUART1_SUPPRESS_ISR) && \
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STM32_SERIAL_USE_LPUART1 && \
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STM32_SERIAL_USE_LPUART1 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_LPUART1_PRIORITY)
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!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_LPUART1_PRIORITY)
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#endif
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#endif
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#endif
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#endif
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#if STM32_SERIAL_USE_UART9
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#if defined(STM32_UART9_IS_USED)
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#error "SD9 requires UART9 but it is already used"
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#else
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#define STM32_UART9_IS_USED
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#endif
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#endif
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#if STM32_SERIAL_USE_USART10
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#if defined(STM32_USART10_IS_USED)
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#error "SD10 requires USART10 but it is already used"
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#else
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#define STM32_USART10_IS_USED
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#endif
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||||||
|
#endif
|
||||||
|
|
||||||
#if STM32_SERIAL_USE_LPUART1
|
#if STM32_SERIAL_USE_LPUART1
|
||||||
#if defined(STM32_LPUART1_IS_USED)
|
#if defined(STM32_LPUART1_IS_USED)
|
||||||
#error "LPSD1 requires LPUART1 but it is already used"
|
#error "LPSD1 requires LPUART1 but it is already used"
|
||||||
|
@ -579,6 +676,12 @@ extern SerialDriver SD7;
|
||||||
#if STM32_SERIAL_USE_UART8 && !defined(__DOXYGEN__)
|
#if STM32_SERIAL_USE_UART8 && !defined(__DOXYGEN__)
|
||||||
extern SerialDriver SD8;
|
extern SerialDriver SD8;
|
||||||
#endif
|
#endif
|
||||||
|
#if STM32_SERIAL_USE_UART9 && !defined(__DOXYGEN__)
|
||||||
|
extern SerialDriver SD9;
|
||||||
|
#endif
|
||||||
|
#if STM32_SERIAL_USE_USART10 && !defined(__DOXYGEN__)
|
||||||
|
extern SerialDriver SD10;
|
||||||
|
#endif
|
||||||
#if STM32_SERIAL_USE_LPUART1 && !defined(__DOXYGEN__)
|
#if STM32_SERIAL_USE_LPUART1 && !defined(__DOXYGEN__)
|
||||||
extern SerialDriver LPSD1;
|
extern SerialDriver LPSD1;
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -112,6 +112,20 @@ SIODriver SIOD7;
|
||||||
SIODriver SIOD8;
|
SIODriver SIOD8;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief UART9 SIO driver identifier.
|
||||||
|
*/
|
||||||
|
#if (STM32_SIO_USE_UART9 == TRUE) || defined(__DOXYGEN__)
|
||||||
|
SIODriver SIOD9;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief USART10 SIO driver identifier.
|
||||||
|
*/
|
||||||
|
#if (STM32_SIO_USE_USART10 == TRUE) || defined(__DOXYGEN__)
|
||||||
|
SIODriver SIOD10;
|
||||||
|
#endif
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief LPUART1 SIO driver identifier.
|
* @brief LPUART1 SIO driver identifier.
|
||||||
*/
|
*/
|
||||||
|
@ -293,6 +307,16 @@ void sio_lld_init(void) {
|
||||||
SIOD8.usart = UART8;
|
SIOD8.usart = UART8;
|
||||||
SIOD8.clock = STM32_UART8CLK;
|
SIOD8.clock = STM32_UART8CLK;
|
||||||
#endif
|
#endif
|
||||||
|
#if STM32_SIO_USE_UART9 == TRUE
|
||||||
|
sioObjectInit(&SIOD9);
|
||||||
|
SIOD9.usart = UART9;
|
||||||
|
SIOD9.clock = STM32_UART9CLK;
|
||||||
|
#endif
|
||||||
|
#if STM32_SIO_USE_USART10 == TRUE
|
||||||
|
sioObjectInit(&SIOD10);
|
||||||
|
SIOD10.usart = USART10;
|
||||||
|
SIOD10.clock = STM32_USART10CLK;
|
||||||
|
#endif
|
||||||
#if STM32_SIO_USE_LPUART1 == TRUE
|
#if STM32_SIO_USE_LPUART1 == TRUE
|
||||||
sioObjectInit(&LPSIOD1);
|
sioObjectInit(&LPSIOD1);
|
||||||
LPSIOD1.usart = LPUART1;
|
LPSIOD1.usart = LPUART1;
|
||||||
|
@ -369,6 +393,18 @@ msg_t sio_lld_start(SIODriver *siop) {
|
||||||
rccEnableUART8(true);
|
rccEnableUART8(true);
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
#if STM32_SIO_USE_UART9 == TRUE
|
||||||
|
else if (&SIOD9 == siop) {
|
||||||
|
rccResetUART9();
|
||||||
|
rccEnableUART9(true);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#if STM32_SIO_USE_USART10 == TRUE
|
||||||
|
else if (&SIOD10 == siop) {
|
||||||
|
rccResetUSART10();
|
||||||
|
rccEnableUSART10(true);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
#if STM32_SIO_USE_LPUART1 == TRUE
|
#if STM32_SIO_USE_LPUART1 == TRUE
|
||||||
else if (&LPSIOD1 == siop) {
|
else if (&LPSIOD1 == siop) {
|
||||||
rccResetLPUART1();
|
rccResetLPUART1();
|
||||||
|
@ -456,6 +492,18 @@ void sio_lld_stop(SIODriver *siop) {
|
||||||
rccDisableUART8();
|
rccDisableUART8();
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
#if STM32_SIO_USE_UART9 == TRUE
|
||||||
|
else if (&SIOD9 == siop) {
|
||||||
|
rccResetUART9();
|
||||||
|
rccDisableUART9();
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#if STM32_SIO_USE_USART10 == TRUE
|
||||||
|
else if (&SIOD10 == siop) {
|
||||||
|
rccResetUSART10();
|
||||||
|
rccDisableUSART10();
|
||||||
|
}
|
||||||
|
#endif
|
||||||
#if STM32_SIO_USE_LPUART1 == TRUE
|
#if STM32_SIO_USE_LPUART1 == TRUE
|
||||||
else if (&LPSIOD1 == siop) {
|
else if (&LPSIOD1 == siop) {
|
||||||
rccResetLPUART1();
|
rccResetLPUART1();
|
||||||
|
|
|
@ -113,6 +113,24 @@
|
||||||
#define STM32_SIO_USE_UART8 FALSE
|
#define STM32_SIO_USE_UART8 FALSE
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief SIO driver 9 enable switch.
|
||||||
|
* @details If set to @p TRUE the support for UART9 is included.
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#if !defined(STM32_SIO_USE_UART9) || defined(__DOXYGEN__)
|
||||||
|
#define STM32_SIO_USE_UART9 FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief SIO driver 10 enable switch.
|
||||||
|
* @details If set to @p TRUE the support for USART10 is included.
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#if !defined(STM32_SIO_USE_USART10) || defined(__DOXYGEN__)
|
||||||
|
#define STM32_SIO_USE_USART10 FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief SIO driver 8 enable switch.
|
* @brief SIO driver 8 enable switch.
|
||||||
* @details If set to @p TRUE the support for LPUART1 is included.
|
* @details If set to @p TRUE the support for LPUART1 is included.
|
||||||
|
@ -163,14 +181,23 @@
|
||||||
#error "UART8 not present in the selected device"
|
#error "UART8 not present in the selected device"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if STM32_SIO_USE_UART9 && !STM32_HAS_UART9
|
||||||
|
#error "UART9 not present in the selected device"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_SIO_USE_USART10 && !STM32_HAS_USART10
|
||||||
|
#error "USART10 not present in the selected device"
|
||||||
|
#endif
|
||||||
|
|
||||||
#if STM32_SIO_USE_LPUART1 && !STM32_HAS_LPUART1
|
#if STM32_SIO_USE_LPUART1 && !STM32_HAS_LPUART1
|
||||||
#error "LPUART1 not present in the selected device"
|
#error "LPUART1 not present in the selected device"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if !STM32_SIO_USE_USART1 && !STM32_SIO_USE_USART2 && \
|
#if !STM32_SIO_USE_USART1 && !STM32_SIO_USE_USART2 && \
|
||||||
!STM32_SIO_USE_USART3 && !STM32_SIO_USE_UART4 && \
|
!STM32_SIO_USE_USART3 && !STM32_SIO_USE_UART4 && \
|
||||||
!STM32_SIO_USE_UART5 && !STM32_SIO_USE_USART6 && \
|
!STM32_SIO_USE_UART5 && !STM32_SIO_USE_USART6 && \
|
||||||
!STM32_SIO_USE_UART7 && !STM32_SIO_USE_UART8 && \
|
!STM32_SIO_USE_UART7 && !STM32_SIO_USE_UART8 && \
|
||||||
|
!STM32_SIO_USE_UART9 && !STM32_SIO_USE_USART10 && \
|
||||||
!STM32_SIO_USE_LPUART1
|
!STM32_SIO_USE_LPUART1
|
||||||
#error "SIO driver activated but no USART/UART peripheral assigned"
|
#error "SIO driver activated but no USART/UART peripheral assigned"
|
||||||
#endif
|
#endif
|
||||||
|
@ -240,6 +267,22 @@
|
||||||
#endif
|
#endif
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if STM32_SIO_USE_UART9
|
||||||
|
#if defined(STM32_UART9_IS_USED)
|
||||||
|
#error "SIOD9 requires UART9 but it is already used"
|
||||||
|
#else
|
||||||
|
#define STM32_UART9_IS_USED
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_SIO_USE_USART10
|
||||||
|
#if defined(STM32_USART10_IS_USED)
|
||||||
|
#error "SIOD6 requires USART10 but it is already used"
|
||||||
|
#else
|
||||||
|
#define STM32_USART10_IS_USED
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
#if STM32_SIO_USE_LPUART1
|
#if STM32_SIO_USE_LPUART1
|
||||||
#if defined(STM32_LPUART1_IS_USED)
|
#if defined(STM32_LPUART1_IS_USED)
|
||||||
#error "LPSIOD1 requires LPUART1 but it is already used"
|
#error "LPSIOD1 requires LPUART1 but it is already used"
|
||||||
|
@ -360,6 +403,14 @@ extern SIODriver SIOD7;
|
||||||
extern SIODriver SIOD8;
|
extern SIODriver SIOD8;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if (STM32_SIO_USE_UART9 == TRUE) && !defined(__DOXYGEN__)
|
||||||
|
extern SIODriver SIOD9;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if (STM32_SIO_USE_USART10 == TRUE) && !defined(__DOXYGEN__)
|
||||||
|
extern SIODriver SIOD10;
|
||||||
|
#endif
|
||||||
|
|
||||||
#if (STM32_SIO_USE_LPUART1 == TRUE) && !defined(__DOXYGEN__)
|
#if (STM32_SIO_USE_LPUART1 == TRUE) && !defined(__DOXYGEN__)
|
||||||
extern SIODriver LPSIOD1;
|
extern SIODriver LPSIOD1;
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -113,6 +113,22 @@
|
||||||
STM32_DMA_GETCHANNEL(STM32_UART_UART8_TX_DMA_STREAM, \
|
STM32_DMA_GETCHANNEL(STM32_UART_UART8_TX_DMA_STREAM, \
|
||||||
STM32_UART8_TX_DMA_CHN)
|
STM32_UART8_TX_DMA_CHN)
|
||||||
|
|
||||||
|
#define UART9_RX_DMA_CHANNEL \
|
||||||
|
STM32_DMA_GETCHANNEL(STM32_UART_UART9_RX_DMA_STREAM, \
|
||||||
|
STM32_UART9_RX_DMA_CHN)
|
||||||
|
|
||||||
|
#define UART9_TX_DMA_CHANNEL \
|
||||||
|
STM32_DMA_GETCHANNEL(STM32_UART_UART9_TX_DMA_STREAM, \
|
||||||
|
STM32_UART9_TX_DMA_CHN)
|
||||||
|
|
||||||
|
#define USART10_RX_DMA_CHANNEL \
|
||||||
|
STM32_DMA_GETCHANNEL(STM32_UART_USART10_RX_DMA_STREAM, \
|
||||||
|
STM32_USART10_RX_DMA_CHN)
|
||||||
|
|
||||||
|
#define USART10_TX_DMA_CHANNEL \
|
||||||
|
STM32_DMA_GETCHANNEL(STM32_UART_USART10_TX_DMA_STREAM, \
|
||||||
|
STM32_USART10_TX_DMA_CHN)
|
||||||
|
|
||||||
/* Workarounds for those devices where UARTs are USARTs.*/
|
/* Workarounds for those devices where UARTs are USARTs.*/
|
||||||
#if defined(USART4)
|
#if defined(USART4)
|
||||||
#define UART4 USART4
|
#define UART4 USART4
|
||||||
|
@ -176,6 +192,16 @@ UARTDriver UARTD7;
|
||||||
UARTDriver UARTD8;
|
UARTDriver UARTD8;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
/** @brief UART9 UART driver identifier.*/
|
||||||
|
#if STM32_UART_USE_UART9 || defined(__DOXYGEN__)
|
||||||
|
UARTDriver UARTD9;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/** @brief USART10 UART driver identifier.*/
|
||||||
|
#if STM32_UART_USE_USART10 || defined(__DOXYGEN__)
|
||||||
|
UARTDriver UARTD10;
|
||||||
|
#endif
|
||||||
|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
/* Driver local variables and types. */
|
/* Driver local variables and types. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
@ -521,6 +547,48 @@ OSAL_IRQ_HANDLER(STM32_UART8_HANDLER) {
|
||||||
#endif
|
#endif
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_UART9 || defined(__DOXYGEN__)
|
||||||
|
#if !defined(STM32_UART9_SUPPRESS_ISR)
|
||||||
|
#if !defined(STM32_UART9_HANDLER)
|
||||||
|
#error "STM32_UART9_HANDLER not defined"
|
||||||
|
#endif
|
||||||
|
/**
|
||||||
|
* @brief UART9 IRQ handler.
|
||||||
|
*
|
||||||
|
* @isr
|
||||||
|
*/
|
||||||
|
OSAL_IRQ_HANDLER(STM32_UART9_HANDLER) {
|
||||||
|
|
||||||
|
OSAL_IRQ_PROLOGUE();
|
||||||
|
|
||||||
|
uart_lld_serve_interrupt(&UARTD9);
|
||||||
|
|
||||||
|
OSAL_IRQ_EPILOGUE();
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_USART10 || defined(__DOXYGEN__)
|
||||||
|
#if !defined(STM32_USART10_SUPPRESS_ISR)
|
||||||
|
#if !defined(STM32_USART10_HANDLER)
|
||||||
|
#error "STM32_USART10_HANDLER not defined"
|
||||||
|
#endif
|
||||||
|
/**
|
||||||
|
* @brief USART10 IRQ handler.
|
||||||
|
*
|
||||||
|
* @isr
|
||||||
|
*/
|
||||||
|
OSAL_IRQ_HANDLER(STM32_USART10_HANDLER) {
|
||||||
|
|
||||||
|
OSAL_IRQ_PROLOGUE();
|
||||||
|
|
||||||
|
uart_lld_serve_interrupt(&UARTD10);
|
||||||
|
|
||||||
|
OSAL_IRQ_EPILOGUE();
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
/* Driver exported functions. */
|
/* Driver exported functions. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
@ -635,6 +703,32 @@ void uart_lld_init(void) {
|
||||||
nvicEnableVector(STM32_UART8_NUMBER, STM32_UART_UART8_IRQ_PRIORITY);
|
nvicEnableVector(STM32_UART8_NUMBER, STM32_UART_UART8_IRQ_PRIORITY);
|
||||||
#endif
|
#endif
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_UART9
|
||||||
|
uartObjectInit(&UARTD9);
|
||||||
|
UARTD9.usart = UART9;
|
||||||
|
UARTD9.clock = STM32_UART9CLK;
|
||||||
|
UARTD9.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
|
||||||
|
UARTD9.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
|
||||||
|
UARTD9.dmarx = NULL;
|
||||||
|
UARTD9.dmatx = NULL;
|
||||||
|
#if !defined(STM32_UART9_SUPPRESS_ISR) && defined(STM32_UART9_NUMBER)
|
||||||
|
nvicEnableVector(STM32_UART9_NUMBER, STM32_UART_UART9_IRQ_PRIORITY);
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_USART10
|
||||||
|
uartObjectInit(&UARTD10);
|
||||||
|
UARTD10.usart = USART10;
|
||||||
|
UARTD10.clock = STM32_USART10CLK;
|
||||||
|
UARTD10.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
|
||||||
|
UARTD10.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
|
||||||
|
UARTD10.dmarx = NULL;
|
||||||
|
UARTD10.dmatx = NULL;
|
||||||
|
#if !defined(STM32_USART10_SUPPRESS_ISR) && defined(STM32_USART10_NUMBER)
|
||||||
|
nvicEnableVector(STM32_USART10_NUMBER, STM32_UART_USART10_IRQ_PRIORITY);
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -849,6 +943,57 @@ void uart_lld_start(UARTDriver *uartp) {
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_UART9
|
||||||
|
else if (&UARTD9 == uartp) {
|
||||||
|
uartp->dmarx = dmaStreamAllocI(STM32_UART_UART9_RX_DMA_STREAM,
|
||||||
|
STM32_UART_UART9_IRQ_PRIORITY,
|
||||||
|
(stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
|
||||||
|
(void *)uartp);
|
||||||
|
osalDbgAssert(uartp->dmarx != NULL, "unable to allocate stream");
|
||||||
|
uartp->dmatx = dmaStreamAllocI(STM32_UART_UART9_TX_DMA_STREAM,
|
||||||
|
STM32_UART_UART9_IRQ_PRIORITY,
|
||||||
|
(stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
|
||||||
|
(void *)uartp);
|
||||||
|
osalDbgAssert(uartp->dmatx != NULL, "unable to allocate stream");
|
||||||
|
|
||||||
|
rccEnableUART9(true);
|
||||||
|
uartp->dmarxmode |= STM32_DMA_CR_CHSEL(UART9_RX_DMA_CHANNEL) |
|
||||||
|
STM32_DMA_CR_PL(STM32_UART_UART9_DMA_PRIORITY);
|
||||||
|
uartp->dmatxmode |= STM32_DMA_CR_CHSEL(UART9_TX_DMA_CHANNEL) |
|
||||||
|
STM32_DMA_CR_PL(STM32_UART_UART9_DMA_PRIORITY);
|
||||||
|
#if STM32_DMA_SUPPORTS_DMAMUX
|
||||||
|
dmaSetRequestSource(uartp->dmarx, STM32_DMAMUX1_UART9_RX);
|
||||||
|
dmaSetRequestSource(uartp->dmatx, STM32_DMAMUX1_UART9_TX);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_USART10
|
||||||
|
else if (&UARTD10 == uartp) {
|
||||||
|
uartp->dmarx = dmaStreamAllocI(STM32_UART_USART10_RX_DMA_STREAM,
|
||||||
|
STM32_UART_USART10_IRQ_PRIORITY,
|
||||||
|
(stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
|
||||||
|
(void *)uartp);
|
||||||
|
osalDbgAssert(uartp->dmarx != NULL, "unable to allocate stream");
|
||||||
|
uartp->dmatx = dmaStreamAllocI(STM32_UART_USART10_TX_DMA_STREAM,
|
||||||
|
STM32_UART_USART10_IRQ_PRIORITY,
|
||||||
|
(stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
|
||||||
|
(void *)uartp);
|
||||||
|
osalDbgAssert(uartp->dmatx != NULL, "unable to allocate stream");
|
||||||
|
|
||||||
|
rccEnableUSART10(true);
|
||||||
|
uartp->dmarxmode |= STM32_DMA_CR_CHSEL(USART10_RX_DMA_CHANNEL) |
|
||||||
|
STM32_DMA_CR_PL(STM32_UART_USART10_DMA_PRIORITY);
|
||||||
|
uartp->dmatxmode |= STM32_DMA_CR_CHSEL(USART10_TX_DMA_CHANNEL) |
|
||||||
|
STM32_DMA_CR_PL(STM32_UART_USART10_DMA_PRIORITY);
|
||||||
|
#if STM32_DMA_SUPPORTS_DMAMUX
|
||||||
|
dmaSetRequestSource(uartp->dmarx, STM32_DMAMUX1_USART10_RX);
|
||||||
|
dmaSetRequestSource(uartp->dmatx, STM32_DMAMUX1_USART10_TX);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
else {
|
else {
|
||||||
osalDbgAssert(false, "invalid USART instance");
|
osalDbgAssert(false, "invalid USART instance");
|
||||||
}
|
}
|
||||||
|
@ -940,6 +1085,21 @@ void uart_lld_stop(UARTDriver *uartp) {
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_UART9
|
||||||
|
if (&UARTD9 == uartp) {
|
||||||
|
rccDisableUART9();
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_USART10
|
||||||
|
if (&UARTD10 == uartp) {
|
||||||
|
rccDisableUSART10();
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -111,6 +111,24 @@
|
||||||
#define STM32_UART_USE_UART8 FALSE
|
#define STM32_UART_USE_UART8 FALSE
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief UART driver on UART9 enable switch.
|
||||||
|
* @details If set to @p TRUE the support for UART9 is included.
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#if !defined(STM32_UART_USE_UART9) || defined(__DOXYGEN__)
|
||||||
|
#define STM32_UART_USE_UART9 FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief UART driver on USART10 enable switch.
|
||||||
|
* @details If set to @p TRUE the support for USART10 is included.
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#if !defined(STM32_UART_USE_USART10) || defined(__DOXYGEN__)
|
||||||
|
#define STM32_UART_USE_USART10 FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief USART1 interrupt priority level setting.
|
* @brief USART1 interrupt priority level setting.
|
||||||
*/
|
*/
|
||||||
|
@ -167,6 +185,20 @@
|
||||||
#define STM32_UART_UART8_IRQ_PRIORITY 12
|
#define STM32_UART_UART8_IRQ_PRIORITY 12
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief UART9 interrupt priority level setting.
|
||||||
|
*/
|
||||||
|
#if !defined(STM32_UART_UART9_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
||||||
|
#define STM32_UART_UART9_IRQ_PRIORITY 12
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief USART10 interrupt priority level setting.
|
||||||
|
*/
|
||||||
|
#if !defined(STM32_UART_USART10_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
||||||
|
#define STM32_UART_USART10_IRQ_PRIORITY 12
|
||||||
|
#endif
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief USART1 DMA priority (0..3|lowest..highest).
|
* @brief USART1 DMA priority (0..3|lowest..highest).
|
||||||
* @note The priority level is used for both the TX and RX DMA channels but
|
* @note The priority level is used for both the TX and RX DMA channels but
|
||||||
|
@ -247,6 +279,26 @@
|
||||||
#define STM32_UART_UART8_DMA_PRIORITY 0
|
#define STM32_UART_UART8_DMA_PRIORITY 0
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief UART9 DMA priority (0..3|lowest..highest).
|
||||||
|
* @note The priority level is used for both the TX and RX DMA channels but
|
||||||
|
* because of the channels ordering the RX channel has always priority
|
||||||
|
* over the TX channel.
|
||||||
|
*/
|
||||||
|
#if !defined(STM32_UART_UART9_DMA_PRIORITY) || defined(__DOXYGEN__)
|
||||||
|
#define STM32_UART_UART9_DMA_PRIORITY 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief USART10 DMA priority (0..3|lowest..highest).
|
||||||
|
* @note The priority level is used for both the TX and RX DMA channels but
|
||||||
|
* because of the channels ordering the RX channel has always priority
|
||||||
|
* over the TX channel.
|
||||||
|
*/
|
||||||
|
#if !defined(STM32_UART_USART10_DMA_PRIORITY) || defined(__DOXYGEN__)
|
||||||
|
#define STM32_UART_USART10_DMA_PRIORITY 0
|
||||||
|
#endif
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief UART DMA error hook.
|
* @brief UART DMA error hook.
|
||||||
* @note The default action for DMA errors is a system halt because DMA
|
* @note The default action for DMA errors is a system halt because DMA
|
||||||
|
@ -281,6 +333,10 @@
|
||||||
#error "UART5 not present in the selected device"
|
#error "UART5 not present in the selected device"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_USART6 && !STM32_HAS_USART6
|
||||||
|
#error "USART6 not present in the selected device"
|
||||||
|
#endif
|
||||||
|
|
||||||
#if STM32_UART_USE_UART7 && !STM32_HAS_UART7
|
#if STM32_UART_USE_UART7 && !STM32_HAS_UART7
|
||||||
#error "UART7 not present in the selected device"
|
#error "UART7 not present in the selected device"
|
||||||
#endif
|
#endif
|
||||||
|
@ -289,10 +345,19 @@
|
||||||
#error "UART8 not present in the selected device"
|
#error "UART8 not present in the selected device"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_UART9 && !STM32_HAS_UART9
|
||||||
|
#error "UART9 not present in the selected device"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_USART10 && !STM32_HAS_USART10
|
||||||
|
#error "USART10 not present in the selected device"
|
||||||
|
#endif
|
||||||
|
|
||||||
#if !STM32_UART_USE_USART1 && !STM32_UART_USE_USART2 && \
|
#if !STM32_UART_USE_USART1 && !STM32_UART_USE_USART2 && \
|
||||||
!STM32_UART_USE_USART3 && !STM32_UART_USE_UART4 && \
|
!STM32_UART_USE_USART3 && !STM32_UART_USE_UART4 && \
|
||||||
!STM32_UART_USE_UART5 && !STM32_UART_USE_USART6 && \
|
!STM32_UART_USE_UART5 && !STM32_UART_USE_USART6 && \
|
||||||
!STM32_UART_USE_UART7 && !STM32_UART_USE_UART8
|
!STM32_UART_USE_UART7 && !STM32_UART_USE_UART8 && \
|
||||||
|
!STM32_UART_USE_UART9 && !STM32_UART_USE_USART10
|
||||||
#error "UART driver activated but no USART/UART peripheral assigned"
|
#error "UART driver activated but no USART/UART peripheral assigned"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
@ -344,6 +409,18 @@
|
||||||
#error "Invalid IRQ priority assigned to UART8"
|
#error "Invalid IRQ priority assigned to UART8"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if !defined(STM32_UART9_SUPPRESS_ISR) && \
|
||||||
|
STM32_UART_USE_UART9 && \
|
||||||
|
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_UART_UART9_IRQ_PRIORITY)
|
||||||
|
#error "Invalid IRQ priority assigned to UART9"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(STM32_USART10_SUPPRESS_ISR) && \
|
||||||
|
STM32_UART_USE_USART10 && \
|
||||||
|
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_UART_USART10_IRQ_PRIORITY)
|
||||||
|
#error "Invalid IRQ priority assigned to USART10"
|
||||||
|
#endif
|
||||||
|
|
||||||
/* Check on DMA priorities.*/
|
/* Check on DMA priorities.*/
|
||||||
#if STM32_UART_USE_USART1 && \
|
#if STM32_UART_USE_USART1 && \
|
||||||
!STM32_DMA_IS_VALID_PRIORITY(STM32_UART_USART1_DMA_PRIORITY)
|
!STM32_DMA_IS_VALID_PRIORITY(STM32_UART_USART1_DMA_PRIORITY)
|
||||||
|
@ -385,6 +462,16 @@
|
||||||
#error "Invalid DMA priority assigned to UART8"
|
#error "Invalid DMA priority assigned to UART8"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_UART9 && \
|
||||||
|
!STM32_DMA_IS_VALID_PRIORITY(STM32_UART_UART9_DMA_PRIORITY)
|
||||||
|
#error "Invalid DMA priority assigned to UART9"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_USART10 && \
|
||||||
|
!STM32_DMA_IS_VALID_PRIORITY(STM32_UART_USART10_DMA_PRIORITY)
|
||||||
|
#error "Invalid DMA priority assigned to USART10"
|
||||||
|
#endif
|
||||||
|
|
||||||
/* Check on the presence of the DMA streams settings in mcuconf.h.*/
|
/* Check on the presence of the DMA streams settings in mcuconf.h.*/
|
||||||
#if STM32_UART_USE_USART1 && (!defined(STM32_UART_USART1_RX_DMA_STREAM) || \
|
#if STM32_UART_USE_USART1 && (!defined(STM32_UART_USART1_RX_DMA_STREAM) || \
|
||||||
!defined(STM32_UART_USART1_TX_DMA_STREAM))
|
!defined(STM32_UART_USART1_TX_DMA_STREAM))
|
||||||
|
@ -426,6 +513,16 @@
|
||||||
#error "UART8 DMA streams not defined"
|
#error "UART8 DMA streams not defined"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_UART9 && (!defined(STM32_UART_UART9_RX_DMA_STREAM) || \
|
||||||
|
!defined(STM32_UART_UART9_TX_DMA_STREAM))
|
||||||
|
#error "UART9 DMA streams not defined"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_USART10 && (!defined(STM32_UART_USART10_RX_DMA_STREAM) || \
|
||||||
|
!defined(STM32_UART_USART10_TX_DMA_STREAM))
|
||||||
|
#error "USART10 DMA streams not defined"
|
||||||
|
#endif
|
||||||
|
|
||||||
/* Check on the validity of the assigned DMA channels.*/
|
/* Check on the validity of the assigned DMA channels.*/
|
||||||
#if STM32_UART_USE_USART1 && \
|
#if STM32_UART_USE_USART1 && \
|
||||||
!STM32_DMA_IS_VALID_STREAM(STM32_UART_USART1_RX_DMA_STREAM)
|
!STM32_DMA_IS_VALID_STREAM(STM32_UART_USART1_RX_DMA_STREAM)
|
||||||
|
@ -507,6 +604,16 @@
|
||||||
#error "Invalid DMA channel assigned to UART8 TX"
|
#error "Invalid DMA channel assigned to UART8 TX"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_UART9 && \
|
||||||
|
!STM32_DMA_IS_VALID_STREAM(STM32_UART_UART9_TX_DMA_STREAM)
|
||||||
|
#error "Invalid DMA channel assigned to UART9 TX"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_USART10 && \
|
||||||
|
!STM32_DMA_IS_VALID_STREAM(STM32_UART_USART10_TX_DMA_STREAM)
|
||||||
|
#error "Invalid DMA channel assigned to USART10 TX"
|
||||||
|
#endif
|
||||||
|
|
||||||
/* Devices without DMAMUX require an additional check.*/
|
/* Devices without DMAMUX require an additional check.*/
|
||||||
#if STM32_ADVANCED_DMA && !STM32_DMA_SUPPORTS_DMAMUX
|
#if STM32_ADVANCED_DMA && !STM32_DMA_SUPPORTS_DMAMUX
|
||||||
|
|
||||||
|
@ -607,6 +714,30 @@
|
||||||
#error "invalid DMA stream associated to UART8 TX"
|
#error "invalid DMA stream associated to UART8 TX"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_UART9 && \
|
||||||
|
!STM32_DMA_IS_VALID_ID(STM32_UART_UART9_RX_DMA_STREAM, \
|
||||||
|
STM32_UART9_RX_DMA_MSK)
|
||||||
|
#error "invalid DMA stream associated to UART9 RX"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_UART9 && \
|
||||||
|
!STM32_DMA_IS_VALID_ID(STM32_UART_UART9_TX_DMA_STREAM, \
|
||||||
|
STM32_UART9_TX_DMA_MSK)
|
||||||
|
#error "invalid DMA stream associated to UART9 TX"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_USART10 && \
|
||||||
|
!STM32_DMA_IS_VALID_ID(STM32_UART_USART10_RX_DMA_STREAM, \
|
||||||
|
STM32_USART10_RX_DMA_MSK)
|
||||||
|
#error "invalid DMA stream associated to USART10 RX"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_USART10 && \
|
||||||
|
!STM32_DMA_IS_VALID_ID(STM32_UART_USART10_TX_DMA_STREAM, \
|
||||||
|
STM32_USART10_TX_DMA_MSK)
|
||||||
|
#error "invalid DMA stream associated to USART10 TX"
|
||||||
|
#endif
|
||||||
|
|
||||||
#endif /* STM32_ADVANCED_DMA && !STM32_DMA_SUPPORTS_DMAMUX */
|
#endif /* STM32_ADVANCED_DMA && !STM32_DMA_SUPPORTS_DMAMUX */
|
||||||
|
|
||||||
#if !defined(STM32_DMA_REQUIRED)
|
#if !defined(STM32_DMA_REQUIRED)
|
||||||
|
@ -678,6 +809,22 @@
|
||||||
#endif
|
#endif
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_UART9
|
||||||
|
#if defined(STM32_UART9_IS_USED)
|
||||||
|
#error "SD9 requires UART9 but it is already used"
|
||||||
|
#else
|
||||||
|
#define STM32_UART9_IS_USED
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_USART10
|
||||||
|
#if defined(STM32_USART10_IS_USED)
|
||||||
|
#error "SD10 requires USART10 but it is already used"
|
||||||
|
#else
|
||||||
|
#define STM32_USART10_IS_USED
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
/* Driver data structures and types. */
|
/* Driver data structures and types. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
@ -885,6 +1032,14 @@ extern UARTDriver UARTD7;
|
||||||
extern UARTDriver UARTD8;
|
extern UARTDriver UARTD8;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_UART9 && !defined(__DOXYGEN__)
|
||||||
|
extern UARTDriver UARTD9;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_UART_USE_USART10 && !defined(__DOXYGEN__)
|
||||||
|
extern UARTDriver UARTD10;
|
||||||
|
#endif
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
extern "C" {
|
extern "C" {
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -56,6 +56,8 @@
|
||||||
#define STM32_USART6_SUPPRESS_ISR
|
#define STM32_USART6_SUPPRESS_ISR
|
||||||
#define STM32_UART7_SUPPRESS_ISR
|
#define STM32_UART7_SUPPRESS_ISR
|
||||||
#define STM32_UART8_SUPPRESS_ISR
|
#define STM32_UART8_SUPPRESS_ISR
|
||||||
|
#define STM32_UART9_SUPPRESS_ISR
|
||||||
|
#define STM32_USART10_SUPPRESS_ISR
|
||||||
#define STM32_LPUART1_SUPPRESS_ISR
|
#define STM32_LPUART1_SUPPRESS_ISR
|
||||||
/** @} */
|
/** @} */
|
||||||
|
|
||||||
|
@ -299,6 +301,8 @@
|
||||||
#define STM32_USART6_HANDLER Vector15C
|
#define STM32_USART6_HANDLER Vector15C
|
||||||
#define STM32_UART7_HANDLER Vector188
|
#define STM32_UART7_HANDLER Vector188
|
||||||
#define STM32_UART8_HANDLER Vector18C
|
#define STM32_UART8_HANDLER Vector18C
|
||||||
|
#define STM32_UART9_HANDLER Vector2AC
|
||||||
|
#define STM32_USART10_HANDLER Vector2B0
|
||||||
#define STM32_LPUART1_HANDLER Vector278
|
#define STM32_LPUART1_HANDLER Vector278
|
||||||
|
|
||||||
#define STM32_USART1_NUMBER 37
|
#define STM32_USART1_NUMBER 37
|
||||||
|
@ -309,6 +313,8 @@
|
||||||
#define STM32_USART6_NUMBER 71
|
#define STM32_USART6_NUMBER 71
|
||||||
#define STM32_UART7_NUMBER 82
|
#define STM32_UART7_NUMBER 82
|
||||||
#define STM32_UART8_NUMBER 83
|
#define STM32_UART8_NUMBER 83
|
||||||
|
#define STM32_UART9_NUMBER 155
|
||||||
|
#define STM32_USART10_NUMBER 156
|
||||||
#define STM32_LPUART1_NUMBER 142
|
#define STM32_LPUART1_NUMBER 142
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -2345,6 +2345,52 @@ __STATIC_INLINE void rccResetAHB4(uint32_t mask) {
|
||||||
*/
|
*/
|
||||||
#define rccResetUART8() rccResetAPB1L(RCC_APB1LRSTR_UART8RST)
|
#define rccResetUART8() rccResetAPB1L(RCC_APB1LRSTR_UART8RST)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the UART9 peripheral clock.
|
||||||
|
*
|
||||||
|
* @param[in] lp low power enable flag
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
#define rccEnableUART9(lp) rccEnableAPB2(RCC_APB2ENR_UART9EN, lp)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Disables the UART9 peripheral clock.
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
#define rccDisableUART9() rccDisableAPB2(RCC_APB2ENR_UART9EN)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Resets the UART9 peripheral.
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
#define rccResetUART9() rccResetAPB2(RCC_APB2RSTR_UART9RST)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the USART10 peripheral clock.
|
||||||
|
*
|
||||||
|
* @param[in] lp low power enable flag
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
#define rccEnableUSART10(lp) rccEnableAPB2(RCC_APB2ENR_USART10EN, lp)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Disables the USART10 peripheral clock.
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
#define rccDisableUSART10() rccDisableAPB2(RCC_APB2ENR_USART10EN)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Resets the USART10 peripheral.
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
#define rccResetUSART10() rccResetAPB2(RCC_APB2RSTR_USART10RST)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Enables the LPUART1 peripheral clock.
|
* @brief Enables the LPUART1 peripheral clock.
|
||||||
*
|
*
|
||||||
|
|
|
@ -302,6 +302,8 @@
|
||||||
#define STM32_HAS_USART6 TRUE
|
#define STM32_HAS_USART6 TRUE
|
||||||
#define STM32_HAS_UART7 TRUE
|
#define STM32_HAS_UART7 TRUE
|
||||||
#define STM32_HAS_UART8 TRUE
|
#define STM32_HAS_UART8 TRUE
|
||||||
|
#define STM32_HAS_UART9 FALSE
|
||||||
|
#define STM32_HAS_USART10 FALSE
|
||||||
#define STM32_HAS_LPUART1 TRUE
|
#define STM32_HAS_LPUART1 TRUE
|
||||||
|
|
||||||
/* USB attributes.*/
|
/* USB attributes.*/
|
||||||
|
@ -537,6 +539,8 @@
|
||||||
#define STM32_HAS_USART6 TRUE
|
#define STM32_HAS_USART6 TRUE
|
||||||
#define STM32_HAS_UART7 TRUE
|
#define STM32_HAS_UART7 TRUE
|
||||||
#define STM32_HAS_UART8 TRUE
|
#define STM32_HAS_UART8 TRUE
|
||||||
|
#define STM32_HAS_UART9 TRUE
|
||||||
|
#define STM32_HAS_USART10 TRUE
|
||||||
#define STM32_HAS_LPUART1 TRUE
|
#define STM32_HAS_LPUART1 TRUE
|
||||||
|
|
||||||
/* USB attributes.*/
|
/* USB attributes.*/
|
||||||
|
@ -763,6 +767,8 @@
|
||||||
#define STM32_HAS_USART6 TRUE
|
#define STM32_HAS_USART6 TRUE
|
||||||
#define STM32_HAS_UART7 TRUE
|
#define STM32_HAS_UART7 TRUE
|
||||||
#define STM32_HAS_UART8 TRUE
|
#define STM32_HAS_UART8 TRUE
|
||||||
|
#define STM32_HAS_UART9 FALSE
|
||||||
|
#define STM32_HAS_USART10 FALSE
|
||||||
#define STM32_HAS_LPUART1 TRUE
|
#define STM32_HAS_LPUART1 TRUE
|
||||||
|
|
||||||
/* USB attributes.*/
|
/* USB attributes.*/
|
||||||
|
|
Loading…
Reference in New Issue