Added SAMA5D2x registry
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10372 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -33,6 +33,8 @@
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#ifndef _HAL_LLD_H_
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#define _HAL_LLD_H_
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#include "sama_registry.h"
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/* If the device type is not externally defined, for example from the Makefile,
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then a file named board.h is included. This file must contain a device
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definition compatible with the vendor include file.*/
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@ -0,0 +1,119 @@
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/*
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ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file SAMA5D2x/sama_registry.h
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* @brief SAMA5D2x capabilities registry.
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*
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* @addtogroup HAL
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* @{
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*/
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#ifndef SAMA_REGISTRY_H
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#define SAMA_REGISTRY_H
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/**
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* @brief Sub-family identifier.
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*/
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#if !defined(SAMA5D2X) || defined(__DOXYGEN__)
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#define SAMA5D2X
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#endif
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/*===========================================================================*/
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/* Common features. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Platform capabilities. */
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/*===========================================================================*/
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/**
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* @name SAMA5D27 capabilities
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* @{
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*/
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/*===========================================================================*/
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/* SAMA5D27. */
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/*===========================================================================*/
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#if defined(SAMA5D27) || defined(__DOXYGEN__)
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/* PCM Peripheral IDs.*/
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#define SAMA_PID_SAIC0 (1 << 0) /**< SAIC0 FIQ PID. */
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#define SAMA_PID_ARM (1 << 2) /**< ARM PID. */
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#define SAMA_PID_PIT (1 << 3) /**< PIT PID. */
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#define SAMA_PID_WDT (1 << 4) /**< WDT PID. */
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#define SAMA_PID_GMAC (1 << 5) /**< GMAC PID. */
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#define SAMA_PID_XDMAC0 (1 << 6) /**< XDMAC0 PID. */
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#define SAMA_PID_XDMAC1 (1 << 7) /**< XDMAC1 PID. */
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#define SAMA_PID_ICM (1 << 8) /**< ICM PID. */
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#define SAMA_PID_AES (1 << 9) /**< AES PID. */
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#define SAMA_PID_AESB (1 << 10) /**< AESB PID. */
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#define SAMA_PID_TDES (1 << 11) /**< TDES PID. */
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#define SAMA_PID_SHA (1 << 12) /**< SHA PID. */
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#define SAMA_PID_MPDDRC (1 << 13) /**< MPDDRC PID. */
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#define SAMA_PID_H32MX (1 << 14) /**< H32MX PID. */
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#define SAMA_PID_H64MX (1 << 15) /**< H64MX PID. */
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#define SAMA_PID_SECUMOD (1 << 16) /**< SECUMOD PID. */
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#define SAMA_PID_HSMC (1 << 17) /**< HSMC PID. */
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#define SAMA_PID_PIOA (1 << 18) /**< PIOA PID. */
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#define SAMA_PID_FLEXCOM0 (1 << 19) /**< FLEXCOM0 PID. */
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#define SAMA_PID_FLEXCOM1 (1 << 20) /**< FLEXCOM1 PID. */
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#define SAMA_PID_FLEXCOM2 (1 << 21) /**< FLEXCOM2 PID. */
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#define SAMA_PID_FLEXCOM3 (1 << 22) /**< FLEXCOM3 PID. */
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#define SAMA_PID_FLEXCOM4 (1 << 23) /**< FLEXCOM4 PID. */
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#define SAMA_PID_UART0 (1 << 24) /**< UART0 PID. */
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#define SAMA_PID_UART1 (1 << 25) /**< UART1 PID. */
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#define SAMA_PID_UART2 (1 << 26) /**< UART2 PID. */
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#define SAMA_PID_UART3 (1 << 27) /**< UART3 PID. */
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#define SAMA_PID_UART4 (1 << 28) /**< UART4 PID. */
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#define SAMA_PID_TWIHS0 (1 << 29) /**< TWIHS0 PID. */
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#define SAMA_PID_TWIHS1 (1 << 30) /**< TWIHS1 PID. */
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#define SAMA_PID_SDMMC0 (1 << 31) /**< SDMMC0 PID. */
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#define SAMA_PID_SDMMC1 (1 << 0) /**< SDMMC1 PID. */
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#define SAMA_PID_SPI0 (1 << 1) /**< SPI0 PID. */
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#define SAMA_PID_SPI1 (1 << 2) /**< SPI1 PID. */
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#define SAMA_PID_TC0 (1 << 3) /**< TC0 PID. */
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#define SAMA_PID_TC1 (1 << 4) /**< TC1 PID. */
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#define SAMA_PID_PWM (1 << 6) /**< PWM PID. */
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#define SAMA_PID_ADC (1 << 8) /**< ADC PID. */
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#define SAMA_PID_UHPHS (1 << 9) /**< UHPHS PID. */
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#define SAMA_PID_UDPHS (1 << 10) /**< UDPHS PID. */
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#define SAMA_PID_SSC0 (1 << 11) /**< SSC0 PID. */
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#define SAMA_PID_SSC1 (1 << 12) /**< SSC1 PID. */
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#define SAMA_PID_LCDC (1 << 13) /**< LCDC PID. */
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#define SAMA_PID_ISC (1 << 14) /**< ISC PID. */
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#define SAMA_PID_TRNG (1 << 15) /**< TRNG PID. */
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#define SAMA_PID_PDMIC (1 << 16) /**< PDMIC PID. */
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#define SAMA_PID_AIC0 (1 << 17) /**< AIC PID. */
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#define SAMA_PID_SFC (1 << 18) /**< SFC PID. */
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#define SAMA_PID_SECURAM (1 << 19) /**< SECURAM PID. */
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#define SAMA_PID_QSPI0 (1 << 20) /**< QSPI0 PID. */
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#define SAMA_PID_QSPI1 (1 << 21) /**< QSPI1 PID. */
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#define SAMA_PID_I2SC0 (1 << 22) /**< I2SC0 PID. */
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#define SAMA_PID_I2SC1 (1 << 23) /**< I2SC1 PID. */
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#define SAMA_PID_MCAN0 (1 << 24) /**< MCAN0 PID. */
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#define SAMA_PID_MCAN1 (1 << 25) /**< MCAN1 PID. */
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#define SAMA_PID_PTC (1 << 26) /**< PTC PID. */
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#define SAMA_PID_CLASSD (1 << 27) /**< CLASSD PID. */
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#define SAMA_PID_SFR (1 << 28) /**< SFR PID. */
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#define SAMA_PID_SAIC1 (1 << 29) /**< SAIC PID. */
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#define SAMA_PID_AIC1 (1 << 30) /**< AIC PID. */
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#define SAMA_PID_L2CC (1 << 31) /**< L2CC PID. */
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#endif /* defined(SAMA5D27) */
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/** @} */
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#endif /* SAMA_REGISTRY_H */
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/** @} */
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