andreika-git
/
ChibiOS
mirror of https://github.com/andreika-git/ChibiOS.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6251 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2013-09-03 09:51:32 +00:00
parent 9d0c6fb8bf
commit 3368f57424
17 changed files with 122 additions and 105 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
demos/rt/RT-STM32F051-DISCOVERY/main.c
View File

@ -21,7 +21,7 @@
/*
* Blue LED blinker thread, times are in milliseconds.
*/
static WORKING_AREA(waThread1, 128);
static THD_WORKING_AREA(waThread1, 128);
static msg_t Thread1(void *arg) {
(void)arg;
@ -37,7 +37,7 @@ static msg_t Thread1(void *arg) {
/*
* Green LED blinker thread, times are in milliseconds.
*/
static WORKING_AREA(waThread2, 128);
static THD_WORKING_AREA(waThread2, 128);
static msg_t Thread2(void *arg) {
(void)arg;

4
demos/rt/RT-STM32F303-DISCOVERY/main.c
View File

@ -56,7 +56,7 @@ static msg_t Thread1(void *arg) {
}
#endif
static WORKING_AREA(waThread1, 128);
static THD_WORKING_AREA(waThread1, 128);
static msg_t Thread1(void *arg) {
(void)arg;
@ -69,7 +69,7 @@ static msg_t Thread1(void *arg) {
}
}
static WORKING_AREA(waThread2, 128);
static THD_WORKING_AREA(waThread2, 128);
static msg_t Thread2(void *arg) {
(void)arg;

2
demos/rt/RT-STM32F407-DISCOVERY/main.c
View File

@ -22,7 +22,7 @@
* This is a periodic thread that does absolutely nothing except flashing
* a LED.
*/
static WORKING_AREA(waThread1, 128);
static THD_WORKING_AREA(waThread1, 128);
static msg_t Thread1(void *arg) {
(void)arg;

6
os/rt/include/chsys.h
View File

@ -179,14 +179,14 @@
/**
* @brief Returns the current value of the system real time counter.
* @note This function is only available if the port layer supports the
* option @p CH_PORT_SUPPORTS_RT.
* option @p PORT_SUPPORTS_RT.
*
* @return The value of the system realtime counter of
* type rtcnt_t.
*
* @xclass
*/
#if CH_PORT_SUPPORTS_RT || defined(__DOXYGEN__)
#if PORT_SUPPORTS_RT || defined(__DOXYGEN__)
#define chSysGetRealtimeCounterX() (rtcnt_t)port_rt_get_counter_value()
#endif
@ -220,7 +220,7 @@ extern "C" {
void chSysTimerHandlerI(void);
syssts_t chSysGetStatusAndLockX(void);
void chSysRestoreStatusX(syssts_t sts);
#if CH_PORT_SUPPORTS_RT
#if PORT_SUPPORTS_RT
bool chSysIsCounterWithinX(rtcnt_t cnt, rtcnt_t start, rtcnt_t end);
void chSysPolledDelayX(rtcnt_t cycles);
#endif

40
os/rt/include/chthreads.h
View File

@ -107,6 +107,46 @@ typedef msg_t (*tfunc_t)(void *);
/* Module macros. */
/*===========================================================================*/
/**
* @name Working Areas and Alignment
*/
/**
* @brief Enforces a correct alignment for a stack area size value.
*
* @param[in] n the stack size to be aligned to the next stack
* alignment boundary
* @return The aligned stack size.
*
* @api
*/
#define THD_ALIGN_STACK_SIZE(n) \
((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
/**
* @brief Calculates the total Working Area size.
*
* @param[in] n the stack size to be assigned to the thread
* @return The total used memory in bytes.
*
* @api
*/
#define THD_WORKING_AREA_SIZE(n) \
THD_ALIGN_STACK_SIZE(sizeof(thread_t) + PORT_WA_SIZE(n))
/**
* @brief Static working area allocation.
* @details This macro is used to allocate a static thread working area
* aligned as both position and size.
*
* @param[in] s the name to be assigned to the stack array
* @param[in] n the stack size to be assigned to the thread
*
* @api
*/
#define THD_WORKING_AREA(s, n) \
stkalign_t s[THD_WORKING_AREA_SIZE(n) / sizeof(stkalign_t)]
/** @} */
/**
* @name Macro Functions
* @{

4
os/rt/include/chtm.h
View File

@ -43,8 +43,8 @@
/* Derived constants and error checks. */
/*===========================================================================*/
#if !CH_PORT_SUPPORTS_RT
#error "CH_CFG_USE_TM requires CH_PORT_SUPPORTS_RT"
#if !PORT_SUPPORTS_RT
#error "CH_CFG_USE_TM requires PORT_SUPPORTS_RT"
#endif
/*===========================================================================*/

8
os/rt/ports/ARMCMx/chcore.h
View File

@ -40,19 +40,19 @@
/**
* @brief Macro defining a generic ARM architecture.
*/
#define CH_ARCHITECTURE_ARM
#define PORT_ARCHITECTURE_ARM
/**
* @brief Compiler name and version.
*/
#if defined(__GNUC__) || defined(__DOXYGEN__)
#define CH_COMPILER_NAME "GCC " __VERSION__
#define PORT_COMPILER_NAME "GCC " __VERSION__
#elif defined(__ICCARM__)
#define CH_COMPILER_NAME "IAR"
#define PORT_COMPILER_NAME "IAR"
#elif defined(__CC_ARM)
#define CH_COMPILER_NAME "RVCT"
#define PORT_COMPILER_NAME "RVCT"
#else
#error "unsupported compiler"

45
os/rt/ports/ARMCMx/chcore_v6m.h
View File

@ -41,38 +41,38 @@
/**
* @brief Macro defining the specific ARM architecture.
*/
#define CH_ARCHITECTURE_ARM_v6M
#define PORT_ARCHITECTURE_ARM_v6M
/**
* @brief Name of the implemented architecture.
*/
#define CH_ARCHITECTURE_NAME "ARMv6-M"
#define PORT_ARCHITECTURE_NAME "ARMv6-M"
/**
* @brief Name of the architecture variant.
*/
#define CH_CORE_VARIANT_NAME "Cortex-M0"
#define PORT_CORE_VARIANT_NAME "Cortex-M0"
#elif (CORTEX_MODEL == CORTEX_M0PLUS)
#define CH_ARCHITECTURE_ARM_v6M
#define CH_ARCHITECTURE_NAME "ARMv6-M"
#define CH_CORE_VARIANT_NAME "Cortex-M0+"
#define PORT_ARCHITECTURE_ARM_v6M
#define PORT_ARCHITECTURE_NAME "ARMv6-M"
#define PORT_CORE_VARIANT_NAME "Cortex-M0+"
#endif
/**
* @brief Port-specific information string.
*/
#if !CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)
#define CH_PORT_INFO "Preemption through NMI"
#define PORT_INFO "Preemption through NMI"
#else
#define CH_PORT_INFO "Preemption through PendSV"
#define PORT_INFO "Preemption through PendSV"
#endif
/** @} */
/**
* @brief This port does not support a realtime counter.
*/
#define CH_PORT_SUPPORTS_RT FALSE
#define PORT_SUPPORTS_RT FALSE
/**
* @brief PendSV priority level.
@ -95,8 +95,8 @@
* a stack frame when compiling without optimizations. You may
* reduce this value to zero when compiling with optimizations.
*/
#if !defined(CH_PORT_IDLE_THREAD_STACK_SIZE)
#define CH_PORT_IDLE_THREAD_STACK_SIZE 16
#if !defined(PORT_IDLE_THREAD_STACK_SIZE)
#define PORT_IDLE_THREAD_STACK_SIZE 16
#endif
/**
@ -108,8 +108,8 @@
* with compiler optimizations disabled. The value can be reduced
* when compiler optimizations are enabled.
*/
#if !defined(CH_PORT_INT_REQUIRED_STACK)
#define CH_PORT_INT_REQUIRED_STACK 32
#if !defined(PORT_INT_REQUIRED_STACK)
#define PORT_INT_REQUIRED_STACK 32
#endif
/**
@ -202,7 +202,7 @@ struct context {
* @details This code usually setup the context switching frame represented
* by an @p port_intctx structure.
*/
#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
#define PORT_SETUP_CONTEXT(workspace, wsize, pf, arg) { \
tp->p_ctx.r13 = (struct port_intctx *)((uint8_t *)workspace + \
wsize - \
sizeof(struct port_intctx)); \
@ -211,25 +211,12 @@ struct context {
tp->p_ctx.r13->lr = (regarm_t)(_port_thread_start); \
}
/**
* @brief Enforces a correct alignment for a stack area size value.
*/
#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
/**
* @brief Computes the thread working area global size.
*/
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(thread_t) + \
sizeof(struct port_intctx) + \
#define PORT_WA_SIZE(n) (sizeof(struct port_intctx) + \
sizeof(struct port_extctx) + \
(n) + (CH_PORT_INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.
* @details This macro is used to allocate a static thread working area
* aligned as both position and size.
*/
#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
(n) + (PORT_INT_REQUIRED_STACK))
/**
* @brief IRQ prologue code.

47
os/rt/ports/ARMCMx/chcore_v7m.h
View File

@ -41,25 +41,25 @@
/**
* @brief Macro defining the specific ARM architecture.
*/
#define CH_ARCHITECTURE_ARM_v7M
#define PORT_ARCHITECTURE_ARM_v7M
/**
* @brief Name of the implemented architecture.
*/
#define CH_ARCHITECTURE_NAME "ARMv7-M"
#define PORT_ARCHITECTURE_NAME "ARMv7-M"
/**
* @brief Name of the architecture variant.
*/
#define CH_CORE_VARIANT_NAME "Cortex-M3"
#define PORT_CORE_VARIANT_NAME "Cortex-M3"
#elif (CORTEX_MODEL == CORTEX_M4)
#define CH_ARCHITECTURE_ARM_v7ME
#define CH_ARCHITECTURE_NAME "ARMv7-ME"
#define PORT_ARCHITECTURE_ARM_v7ME
#define PORT_ARCHITECTURE_NAME "ARMv7-ME"
#if CORTEX_USE_FPU
#define CH_CORE_VARIANT_NAME "Cortex-M4F"
#define PORT_CORE_VARIANT_NAME "Cortex-M4F"
#else
#define CH_CORE_VARIANT_NAME "Cortex-M4"
#define PORT_CORE_VARIANT_NAME "Cortex-M4"
#endif
#endif
@ -67,16 +67,16 @@
* @brief Port-specific information string.
*/
#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
#define CH_PORT_INFO "Advanced kernel mode"
#define PORT_INFO "Advanced kernel mode"
#else
#define CH_PORT_INFO "Compact kernel mode"
#define PORT_INFO "Compact kernel mode"
#endif
/** @} */
/**
* @brief This port supports a realtime counter.
*/
#define CH_PORT_SUPPORTS_RT TRUE
#define PORT_SUPPORTS_RT TRUE
/**
* @brief Disabled value for BASEPRI register.
@ -96,8 +96,8 @@
* a stack frame when compiling without optimizations. You may
* reduce this value to zero when compiling with optimizations.
*/
#if !defined(CH_PORT_IDLE_THREAD_STACK_SIZE) || defined(__DOXYGEN__)
#define CH_PORT_IDLE_THREAD_STACK_SIZE 16
#if !defined(PORT_IDLE_THREAD_STACK_SIZE) || defined(__DOXYGEN__)
#define PORT_IDLE_THREAD_STACK_SIZE 16
#endif
/**
@ -109,8 +109,8 @@
* with compiler optimizations disabled. The value can be reduced
* when compiler optimizations are enabled.
*/
#if !defined(CH_PORT_INT_REQUIRED_STACK) || defined(__DOXYGEN__)
#define CH_PORT_INT_REQUIRED_STACK 32
#if !defined(PORT_INT_REQUIRED_STACK) || defined(__DOXYGEN__)
#define PORT_INT_REQUIRED_STACK 32
#endif
/**
@ -301,7 +301,7 @@ struct context {
* @details This code usually setup the context switching frame represented
* by an @p port_intctx structure.
*/
#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
#define PORT_SETUP_CONTEXT(workspace, wsize, pf, arg) { \
tp->p_ctx.r13 = (struct port_intctx *)((uint8_t *)workspace + \
wsize - \
sizeof(struct port_intctx)); \
@ -310,25 +310,12 @@ struct context {
tp->p_ctx.r13->lr = (regarm_t)(_port_thread_start); \
}
/**
* @brief Enforces a correct alignment for a stack area size value.
*/
#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
/**
* @brief Computes the thread working area global size.
*/
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(thread_t) + \
sizeof(struct port_intctx) + \
#define PORT_WA_SIZE(n) (sizeof(struct port_intctx) + \
sizeof(struct port_extctx) + \
(n) + (CH_PORT_INT_REQUIRED_STACK))
/**
* @brief Static working area allocation.
* @details This macro is used to allocate a static thread working area
* aligned as both position and size.
*/
#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
(n) + (PORT_INT_REQUIRED_STACK))
/**
* @brief IRQ prologue code.

2
os/rt/src/chsys.c
View File

@ -57,7 +57,7 @@ ch_system_t ch;
/**
* @brief Idle thread working area.
*/
static WORKING_AREA(_idle_thread_wa, CH_PORT_IDLE_THREAD_STACK_SIZE);
static THD_WORKING_AREA(_idle_thread_wa, PORT_IDLE_THREAD_STACK_SIZE);
#endif /* CH_CFG_NO_IDLE_THREAD */
/*===========================================================================*/

4
os/rt/src/chthreads.c
View File

@ -181,10 +181,10 @@ thread_t *chThdCreateI(void *wsp, size_t size,
thread_t *tp = wsp;
chDbgCheckClassI();
chDbgCheck((wsp != NULL) && (size >= THD_WA_SIZE(0)) &&
(prio <= HIGHPRIO) && (pf != NULL));
SETUP_CONTEXT(wsp, size, pf, arg);
PORT_SETUP_CONTEXT(wsp, size, pf, arg);
return _thread_init(tp, prio);
}

12
os/various/shell.c
View File

@ -73,15 +73,15 @@ static void cmd_info(BaseSequentialStream *chp, int argc, char *argv[]) {
}
chprintf(chp, "Kernel: %s\r\n", CH_KERNEL_VERSION);
#ifdef CH_COMPILER_NAME
chprintf(chp, "Compiler: %s\r\n", CH_COMPILER_NAME);
#ifdef PORT_COMPILER_NAME
chprintf(chp, "Compiler: %s\r\n", PORT_COMPILER_NAME);
#endif
chprintf(chp, "Architecture: %s\r\n", CH_ARCHITECTURE_NAME);
#ifdef CH_CORE_VARIANT_NAME
chprintf(chp, "Core Variant: %s\r\n", CH_CORE_VARIANT_NAME);
#ifdef PORT_CORE_VARIANT_NAME
chprintf(chp, "Core Variant: %s\r\n", PORT_CORE_VARIANT_NAME);
#endif
#ifdef CH_PORT_INFO
chprintf(chp, "Port Info: %s\r\n", CH_PORT_INFO);
#ifdef PORT_INFO
chprintf(chp, "Port Info: %s\r\n", PORT_INFO);
#endif
#ifdef PLATFORM_NAME
chprintf(chp, "Platform: %s\r\n", PLATFORM_NAME);

14
test/test.c
View File

@ -322,19 +322,19 @@ msg_t TestThread(void *p) {
test_println(CH_KERNEL_VERSION);
test_print("*** Compiled: ");
test_println(__DATE__ " - " __TIME__);
#ifdef CH_COMPILER_NAME
#ifdef PORT_COMPILER_NAME
test_print("*** Compiler: ");
test_println(CH_COMPILER_NAME);
test_println(PORT_COMPILER_NAME);
#endif
test_print("*** Architecture: ");
test_println(CH_ARCHITECTURE_NAME);
#ifdef CH_CORE_VARIANT_NAME
test_println(PORT_ARCHITECTURE_NAME);
#ifdef PORT_CORE_VARIANT_NAME
test_print("*** Core Variant: ");
test_println(CH_CORE_VARIANT_NAME);
test_println(PORT_CORE_VARIANT_NAME);
#endif
#ifdef CH_PORT_INFO
#ifdef PORT_INFO
test_print("*** Port Info: ");
test_println(CH_PORT_INFO);
test_println(PORT_INFO);
#endif
#ifdef PLATFORM_NAME
test_print("*** Platform: ");

12
test/test.h
View File

@ -51,7 +51,7 @@
#else
#define THREADS_STACK_SIZE 128
#endif
#define WA_SIZE THD_WA_SIZE(THREADS_STACK_SIZE)
#define WA_SIZE THD_WORKING_AREA_SIZE(THREADS_STACK_SIZE)
/**
* @brief Structure representing a test case.
@ -66,11 +66,11 @@ struct testcase {
#ifndef __DOXYGEN__
union test_buffers {
struct {
WORKING_AREA(T0, THREADS_STACK_SIZE);
WORKING_AREA(T1, THREADS_STACK_SIZE);
WORKING_AREA(T2, THREADS_STACK_SIZE);
WORKING_AREA(T3, THREADS_STACK_SIZE);
WORKING_AREA(T4, THREADS_STACK_SIZE);
THD_WORKING_AREA(T0, THREADS_STACK_SIZE);
THD_WORKING_AREA(T1, THREADS_STACK_SIZE);
THD_WORKING_AREA(T2, THREADS_STACK_SIZE);
THD_WORKING_AREA(T3, THREADS_STACK_SIZE);
THD_WORKING_AREA(T4, THREADS_STACK_SIZE);
} wa;
uint8_t buffer[WA_SIZE * 5];
};

4
test/testbmk.c
View File

@ -637,10 +637,10 @@ static void bmk13_execute(void) {
test_print("--- System: ");
test_printn(sizeof(ready_list_t) + sizeof(virtual_timers_list_t) +
CH_PORT_IDLE_THREAD_STACK_SIZE +
PORT_IDLE_THREAD_STACK_SIZE +
(sizeof(thread_t) + sizeof(struct port_intctx) +
sizeof(struct port_extctx) +
CH_PORT_INT_REQUIRED_STACK) * 2);
PORT_INT_REQUIRED_STACK) * 2);
test_println(" bytes");
test_print("--- Thread: ");
test_printn(sizeof(thread_t));

11
test/testdyn.c
View File

@ -87,14 +87,17 @@ static void dyn1_execute(void) {
(void)chHeapStatus(&heap1, &sz);
/* Starting threads from the heap. */
threads[0] = chThdCreateFromHeap(&heap1, THD_WA_SIZE(THREADS_STACK_SIZE),
threads[0] = chThdCreateFromHeap(&heap1,
THD_WORKING_AREA_SIZE(THREADS_STACK_SIZE),
prio-1, thread, "A");
threads[1] = chThdCreateFromHeap(&heap1, THD_WA_SIZE(THREADS_STACK_SIZE),
threads[1] = chThdCreateFromHeap(&heap1,
THD_WORKING_AREA_SIZE(THREADS_STACK_SIZE),
prio-2, thread, "B");
/* Allocating the whole heap in order to make the thread creation fail.*/
(void)chHeapStatus(&heap1, &n);
p1 = chHeapAlloc(&heap1, n);
threads[2] = chThdCreateFromHeap(&heap1, THD_WA_SIZE(THREADS_STACK_SIZE),
threads[2] = chThdCreateFromHeap(&heap1,
THD_WORKING_AREA_SIZE(THREADS_STACK_SIZE),
prio-3, thread, "C");
chHeapFree(p1);
@ -135,7 +138,7 @@ ROMCONST struct testcase testdyn1 = {
static void dyn2_setup(void) {
chPoolObjectInit(&mp1, THD_WA_SIZE(THREADS_STACK_SIZE), NULL);
chPoolObjectInit(&mp1, THD_WORKING_AREA_SIZE(THREADS_STACK_SIZE), NULL);
}
static void dyn2_execute(void) {

4
test/testpools.c
View File

@ -46,7 +46,7 @@
#if CH_CFG_USE_MEMPOOLS || defined(__DOXYGEN__)
static MEMORYPOOL_DECL(mp1, THD_WA_SIZE(THREADS_STACK_SIZE), NULL);
static MEMORYPOOL_DECL(mp1, THD_WORKING_AREA_SIZE(THREADS_STACK_SIZE), NULL);
/**
* @page test_pools_001 Allocation and enqueuing test
@ -65,7 +65,7 @@ static void *null_provider(size_t size) {
static void pools1_setup(void) {
chPoolObjectInit(&mp1, THD_WA_SIZE(THREADS_STACK_SIZE), NULL);
chPoolObjectInit(&mp1, THD_WORKING_AREA_SIZE(THREADS_STACK_SIZE), NULL);
}
static void pools1_execute(void) {